Datasheet PHP33N10 Datasheet (Philips)

Page 1
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
GENERAL DESCRIPTION QUICK REFERENCE DATA
N-channel enhancement mode SYMBOL PARAMETER MAX. UNIT field-effect power transistor in a plastic envelope featuring stable V blocking voltage, fast switching and I high thermal cycling performance P withlowthermalresistance.Intended R for use in Switched Mode Power
DS
D
tot
DS(ON)
Supplies (SMPS), motor control circuits and general purpose switching applications.
PINNING - TO220AB PIN CONFIGURATION SYMBOL
Drain-source voltage 100 V Drain current (DC) 34 A Total power dissipation 175 W Drain-source on-state resistance 0.057
PIN DESCRIPTION
tab
d
1 gate 2 drain 3 source
tab drain
123
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
I
D
I
DM
P
D
PD/TmbLinear derating factor Tmb > 25 ˚C - 1.167 W/K V
GS
Tj, T
Continuous drain current Tmb = 25 ˚C; VGS = 10 V - 34 A
Tmb = 100 ˚C; VGS = 10 V - 24 A Pulsed drain current Tmb = 25 ˚C - 136 A Total dissipation Tmb = 25 ˚C - 150 W
Gate-source voltage - ± 30 V Operating junction and - 55 175 ˚C
stg
storage temperature range
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R R
th j-mb
th j-a
Thermal resistance junction to - - 1 K/W mounting base Thermal resistance junction to - 60 - K/W ambient
April 1998 1 Rev 1.100
Page 2
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
ELECTRICAL CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
VT
R
DS(ON)
V
GS(TO)
g
fs
I
DSS
I
GSS
Q
g(tot)
Q
gs
Q
gd
t
d(on)
t
r
t
d(off)
t
f
L
d
L
d
L
s
C
iss
C
oss
C
rss
(BR)DSS j
Drain-source breakdown VGS = 0 V; ID = 0.25 mA 100 - - V voltage
/ Drain-source breakdown VDS = VGS; ID = 0.25 mA - 0.15 - V/K
voltage temperature coefficient Drain-source on resistance VGS = 10 V; ID = 17 A - 0.052 0.057 Gate threshold voltage VDS = VGS; ID = 0.25 mA 2.0 3.0 4.0 V Forward transconductance VDS = 50 V; ID = 17 A 12 16 - S Drain-source leakage current VDS = 100 V; VGS = 0 V - 1 25 µA
VDS = 80 V; VGS = 0 V; Tj = 150 ˚C - 100 250 µA
Gate-source leakage current VGS = ±30 V; VDS = 0 V - 10 100 nA Total gate charge ID = 17 A; V
Gate-source charge - 8 11 nC
= 80 V; VGS = 10 V - 42 50 nC
DD
Gate-drain (Miller) charge - 20 30 nC Turn-on delay time VDD = 50 V; ID = 17 A; - 18 - ns
Turn-on rise time RG = 9.1 ; RD = 2.9 -40-ns Turn-off delay time - 125 - ns Turn-off fall time - 50 - ns
Internal drain inductance Measured from contact screw on - 3.5 - nH
tab to centre of die
Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH
from package to centre of die
Internal source inductance Measured from source lead 6 mm - 7.5 - nH
from package to source bond pad
Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1500 - pF Output capacitance - 450 - pF Feedback capacitance - 130 - pF
SOURCE-DRAIN DIODE RATINGS AND CHARACTERISTICS
Tj = 25 ˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
I
S
I
SM
V
SD
t
rr
Q
rr
Continuous source current Tmb = 25˚C - - 34 A (body diode) Pulsed source current (body Tmb = 25˚C - - 136 A diode) Diode forward voltage IS = 34 A; VGS = 0 V - - 1.5 V
Reverse recovery time IS = 17 A; VGS = 0 V; - 200 - ns
dI/dt = 100 A/µs
Reverse recovery charge - 1.0 - µC
April 1998 2 Rev 1.100
Page 3
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
PD%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140 160 180
Normalised Power Derating
Tmb / C
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/P
ID%
120 110 100
90 80 70 60 50 40 30 20 10
0
0 20 40 60 80 100 120 140 160 180
Tmb / C
= f(Tmb)
D 25 ˚C
Normalised Current Derating
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/I
= f(Tmb); conditions: VGS ≥ 10 V
D 25 ˚C
10
1
0.1
0.01
0.001
Zth j-mb / (K/W)
D =
0.5
0.2
0.1
0.05
0.02
0
1E-05 1E-03 1E-01 1E+01
t / s
P
D
BUKx56-lv
p
t
D =
T
Fig.4. Transient thermal impedance.
Z
= f(t); parameter D = tp/T
th j-mb
ID / A
70 60 50 40 30 20 10
0
VGS / V =
0 2 4 6 8 10
20
15
VDS / V
10
BUK456-100A
8
Fig.5. Typical output characteristics
ID = f(VDS); parameter V
GS
p
t T
t
7
6
5
4
.
1000
100
10
ID / A
RDS(ON) = VDS/ID
DC
1
1
10
VDS / V
BUK456-100A,B
A B
tp = 10 us
100 us
1 ms 10 ms
100 ms
100
1000
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter t
RDS(ON) / Ohm
0.2
0.1
4.5 5 5.5
0
0 20 40 60 80
6
ID / A
Fig.6. Typical on-state resistance
R
p
= f(ID); parameter V
DS(ON)
6.5
BUK456-100A
VGS / V =
7
7.5
.
GS
8
10
20
April 1998 3 Rev 1.100
Page 4
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
ID / A
70 60 50 40 30 20 10
0
0 2 4 6 8 10
Tj / C =
VGS / V
BUK456-100A
25
150
Fig.7. Typical transfer characteristics.
ID = f(VGS); parameter T
gfs / S
20
10
j
BUK456-100A
VGS(TO) / V
4
3
2
1
0
-60 -20 20 60 100 140 180
max.
typ.
min.
Tj / C
Fig.10. Gate threshold voltage
V
= f(Tj); conditions: ID = 0.25 mA; VDS = V
GS(TO)
1E-01
1E-02
1E-03
1E-04
ID / A
SUB-THRESHOLD CONDUCTION
2 %
typ
.
GS
98 %
0
0 20 40 60
Fig.8. Typical transconductance
gfs = f(ID); parameter T
a
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2 0
-60 -20 20 60 100 140 180
ID / A
.
j
Normalised RDS(ON) = f(Tj)
Tj / C
Fig.9. Normalised drain-source on-state resistance.
a = R
DS(ON)/RDS(ON)25 ˚C
= f(Tj); ID = 17 A; VGS = 10 V
1E-05
1E-06
0 1 2 3 4
VGS / V
Fig.11. Sub-threshold drain current.
ID = f(V
10000
1000
100
10
Fig.12. Typical capacitances, C
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
; conditions: Tj = 25 ˚C; VDS = V
GS)
C / pF
0 20 40
VDS / V
BUK4y6-100
, C
iss
oss
Ciss
Coss
Crss
, C
GS
rss
.
April 1998 4 Rev 1.100
Page 5
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
VGS / V
12
10
8
6
4
2
0
0 20 40
VDS / V =20
QG / nC
BUK456-100
80
Fig.13. Typical turn-on gate-charge characteristics.
V
= f(QG); parameter V
GS
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj V(BR)DSS @ 25 C
1.1
1.05
1
0.95
DS
EAS, Normalised unclamped inductive energy (%)
120 110 100
90 80 70 60 50 40 30 20 10
0
20 40 60 80 100 120 140 160 180
Starting Tj ( C)
Fig.16. Normalised unclamped inductive energy.
EAS% = f(Tj)
VDD
+
L
VDS
VGS
0
T.U.T.
-
-ID/100
0.9
0.85
-100 -50 0 50 100 150 Tj, Junction temperature (C)
Fig.14. Normalised drain-source breakdown voltage
V
(BR)DSS/V(BR)DSS 25 ˚C
IF / A
70
60 50
40
30 20
10
0
0 1 2
Tj / C = 150
VSDS / V
= f(Tj)
BUK456-100A
25
Fig.15. Source-Drain diode characteristic.
IF = f(V
); parameter T
SDS
j
RGS
.
Fig.17. Unclamped inductive test circuit.
EAS= 0.5LI
2
V
D
(BR)DSS
/(V
R 01
shunt
(BR)DSSVDD
)
April 1998 5 Rev 1.100
Page 6
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
10,3 max
1,3
3,7
4,5 max
3,0 max
not tinned
1,3
max
(2x)
123
2,54 2,54
2,8
3,0
13,5
min
0,9 max (3x)
5,9
min
15,8
max
0,6
2,4
Fig.18. SOT78 (TO220AB); pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide.
2. Refer to mounting instructions for SOT78 (TO220) envelopes.
3. Epoxy meets UL94 V0 at 1/8".
April 1998 6 Rev 1.100
Page 7
Philips Semiconductors Product specification
PowerMOS transistor PHP33N10
DEFINITIONS
Data sheet status
Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
Philips Electronics N.V. 1998
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
April 1998 7 Rev 1.100
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