Page 1
DISCRETE SEMICONDUCTORS
DATA SH EET
PHC21025
Complementary enhancement
mode MOS transistors
Product specification
Supersedes data of November 1994
File under Discrete Semiconductors, SC13b
1997 Jun 20
Page 2
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
FEATURES
• High-speed switching
• No secondary breakdown
• Very low on-resistance.
APPLICATIONS
• Motor and actuator driver
• Power management
• Synchronized rectification.
DESCRIPTION
One N-channel and one P-channel enhancement mode
MOS transistor in an 8-pin plastic SOT96-1 (SO8)
package.
CAUTION
The device is supplied in an antistatic package.
The gate-source input must be protected against static
discharge during transport or handling.
PINNING - SOT96-1 (SO8)
PIN SYMBOL DESCRIPTION
1s
2g
3s
4g
5d
6d
7d
8d
handbook, halfpage
58
1
4
MAM118
1
1
2
2
2
2
1
1
source 1
gate 1
source 2
gate 2
drain 2
drain 2
drain 1
drain 1
d
d
1
1
g
s
1
PHC21025
d
d
2
2
g
s
1
2
2
Fig.1 Simplified outline and symbol.
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per channel
V
DS
drain-source voltage (DC)
N-channel − 30 V
P-channel −−30 V
V
V
V
I
D
SD
GSO
GSth
source-drain diode forward voltage
N-channel I
P-channel I
= 1.25 A − 1.2 V
S
= −1.25 A −−1.6 V
S
gate-source voltage (DC) open drain −±20 V
gate-source threshold voltage V
N-channel V
P-channel V
DS=VGS;ID
DS=VGS
= 1 mA 1 2.8 V
; ID= −1mA −1 −2.8 V
drain current (DC)
N-channel − 3.5 A
P-channel −−2.3 A
R
P
DSon
tot
drain-source on-state resistance
N-channel V
P-channel V
=10V; ID= 2.2 A − 0.1 Ω
GS
= −10 V; ID= −1A − 0.25 Ω
GS
total power dissipation Ts=80°C − 2W
1997 Jun 20 2
Page 3
Philips Semiconductors Product specification
Complementary enhancement
PHC21025
mode MOS transistors
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
Per channel
V
DS
V
GSO
I
D
I
DM
P
tot
T
stg
T
j
Source-drain diode
I
S
I
SM
drain-source voltage (DC)
N-channel − 30 V
P-channel −−30 V
gate-source voltage (DC) open drain −±20 V
drain current (DC) Ts≤ 80 °C
N-channel − 3.5 A
P-channel −−2.3 A
peak drain current note 1
N-channel − 14 A
P-channel −−10 A
total power dissipation Ts=80°C; note 2 − 2W
T
=25°C; note 3 − 2W
amb
T
=25°C; note 4 − 1W
amb
T
=25°C; note 5 − 1.3 W
amb
storage temperature −65 +150 °C
operating junction temperature − 150 °C
source current (DC) Ts≤ 80 °C
N-channel − 1.5 A
P-channel −−1.25 A
peak pulsed source current note 1
N-channel − 6A
P-channel −−5A
Notes
1. Pulse width and duty cycle limited by maximum junction temperature.
2. Maximum permissible dissipation per MOS transistor. Both devices may be loaded up to 2 W at the same time.
3. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 27.5 K/W.
4. Maximum permissible dissipation per MOS transistor. Device mounted on printed-circuit board with an R
th a-tp
(ambient to tie-point) of 90 K/W.
5. Maximum permissible dissipation if only one MOS transistor dissipates. Device mounted on printed-circuit board with
an R
(ambient to tie-point) of 90 K/W.
th a-tp
1997 Jun 20 3
Page 4
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
2.5
handbook, halfpage
P
tot
(W)
2.0
1.5
1.0
0.5
0
0 200
50 100 150
T ( C)
s
MLB836
o
2
10
handbook, halfpage
I
D
(A)
10
1
1
10
2
10
1
10
δ =0.01.
Ts=80°C.
(1) R
DSon
limitation.
PHC21025
MLB833 - 1
(1)
t
P
t
p
T
p
=
δ
T
DC
t
11010
tp =
10 µs
1 ms
0.1 s
(V)
2
V
DS
2
10
handbook, halfpage
I
D
(A)
10
1
1
10
2
10
1
10
δ = 0.01.
Ts=80°C.
(1) R
DSon
limitation.
Fig.2 Power derating curve.
(1)
t
P
t
p
T
p
=
δ
T
DC
t
11010
MBE155
tp =
10 µs
1 ms
0.1 s
V
(V)
DS
Fig.3 SOAR; N-channel.
2
Fig.4 SOAR; P-channel.
1997 Jun 20 4
Page 5
Philips Semiconductors Product specification
Complementary enhancement
PHC21025
mode MOS transistors
THERMAL CHARACTERISTICS
SYMBOL PARAMETER VALUE UNIT
R
th j-s
CHARACTERISTICS
=25°C unless otherwise specified.
T
j
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Per channel
V
(BR)DSS
V
GSth
I
DSS
I
GSS
I
Don
R
DSon
y
forward transfer admittance
fs
C
iss
C
oss
thermal resistance from junction to soldering point 35 K/W
drain-source breakdown voltage
N-channel V
P-channel V
= 0; ID=10µA30−−V
GS
= 0; ID= −10 µA −30 −−V
GS
gate-source threshold voltage
N-channel V
P-channel V
GS=VDS
GS=VDS
; ID= 1 mA 1 − 2.8 V
; ID= −1mA −1 −−2.8 V
drain-source leakage current
N-channel V
P-channel V
= 0; VDS=24V −−100 nA
GS
= 0; VDS= −24 V −−−100 nA
GS
gate leakage current VGS= ±20 V; VDS=0
N-channel −−±100 nA
P-channel −−±100 nA
on-state drain current
N-channel V
P-channel V
=10V; VDS= 1 V 3.5 −−A
GS
V
= 4.5 V; VDS=5V 2 −−A
GS
= −10 V; VDS=−1V −2.3 −−A
GS
V
= −4.5 V; VDS= −5V −1 −−A
GS
drain-source on-state resistance
N-channel V
P-channel V
N-channel V
P-channel V
= 4.5 V; ID=1A − 0.11 0.2 Ω
GS
V
=10V; ID= 2.2 A − 0.08 0.1 Ω
GS
= −4.5 V; ID= − 0.5 A − 0.33 0.4 Ω
GS
= −10 V; ID= −1A − 0.22 0.25 Ω
V
GS
=20V; ID= 2.2 A 2 4.5 − S
DS
= −20 V; ID= −1A 1 2 − S
DS
input capacitance
N-channel V
P-channel V
= 0; VDS= 20 V; f = 1 MHz − 250 − pF
GS
= 0; VDS= −20 V; f = 1 MHz − 250 − pF
GS
output capacitance
N-channel V
P-channel V
= 0; VDS= 20 V; f = 1 MHz − 140 − pF
GS
= 0; VDS= −20 V; f = 1 MHz − 140 − pF
GS
1997 Jun 20 5
Page 6
Philips Semiconductors Product specification
Complementary enhancement
PHC21025
mode MOS transistors
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
C
rss
Q
G
Q
GS
Q
GD
Switching times
t
on
t
off
reverse transfer capacitance
N-channel V
P-channel V
total gate charge
N-channel V
P-channel V
gate-source charge
N-channel V
P-channel V
gate-drain charge
N-channel V
P-channel V
turn-on time
N-channel V
P-channel V
turn-off time
N-channel V
P-channel V
= 0; VDS= 20 V; f = 1 MHz − 50 − pF
GS
= 0; VDS= −20 V; f = 1 MHz − 50 − pF
GS
=10V; VDS= 15 V; ID= 2.3 A − 10 30 nC
GS
= −10 V; VDS= −15 V; ID= −2.3 A − 10 25 nC
GS
=10V; VDS= 15 V; ID= 2.3 A − 1 − nC
GS
= −10 V; VDS= −15 V; ID= −2.3 A − 1 − nC
GS
=10V; VDS= 15 V; ID= 2.3 A − 2.5 − nC
GS
= −10 V; VDS= −15 V; ID= −2.3 A − 3 − nC
GS
= 0to10V; VDD=20V;
GS
− 15 40 ns
ID= 1 A; RL=20Ω
=0to−10 V; VDD= −20 V;
GS
− 20 80 ns
ID= −1 A; RL=20Ω
=10to0V; VDD=20V;
GS
− 25 140 ns
ID= 1 A; RL=20Ω
= −10 to 0 V; VDD= −20 V;
GS
− 50 140 ns
ID= −1 A; RL=20Ω
Source-drain diode
V
SD
source-drain diode forward
voltage
N-channel V
P-channel V
t
rr
reverse recovery time
N-channel I
P-channel I
= 0; IS= 1.25 A −−1.2 V
GD
= 0; IS= −1.25 A −−−1.6 V
GD
= 1.25 A; di/dt = 100 A/µs − 35 100 ns
S
= −1.25 A; di/dt = 100 A/µs − 150 200 ns
S
1997 Jun 20 6
Page 7
Philips Semiconductors Product specification
handbook, half
Complementary enhancement
mode MOS transistors
600
handbook, halfpage
C
(pF)
400
C
iss
200
C
oss
C
rss
0
0
VGS=0.
Tj=25°C.
10 20 30
V (V)
DS
MBE137
600
handbook, halfpage
C
(pF)
400
200
0
0
VGS=0.
Tj=25°C.
PHC21025
MBE144
C
iss
C
oss
C
rss
10 20 30
V (V)
DS
Fig.5 Capacitance as a function of drain-source
voltage; N-channel; typical values.
16
handbook, halfpage
I
D
(A)
12
8
4
0
0 2 10 12
V =
GS
10 V 6 V
468
MBE142
5 V
4.5 V
4 V
3.5 V
3 V
V (V)
DS
Fig.6 Capacitance as a function of drain source
voltage; P-channel; typical values.
page
10
V =
GS
I
D
(A)
10 V
8
6
4
2
0
0 2 10 12
7.5 V
468
MBE154
V (V)
DS
6 V
5 V
4.5 V
4 V
3.5 V
3 V
2.5 V
Tj=25°C.
Fig.7 Output characteristics; typical values;
N-channel.
1997 Jun 20 7
Tj=25°C.
Fig.8 Output characteristics; typical values;
P-channel.
Page 8
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
16
handbook, halfpage
I
D
(A)
12
8
4
0
024 8
VDS=10V.
Tj=25°C.
6
V (V)
GS
MBE141
10
handbook, halfpage
I
D
(A)
8
6
4
2
0
024 8
VDS= −10 V.
Tj=25°C.
PHC21025
MBE157
6
V (V)
GS
Fig.9 Transfer characteristic; typical values;
N-channel.
10
handbook, halfpage
V
GS
(V)
8
6
4
2
0
024 8
VDD=15V.
ID= 3.5 A.
6
Q (nC)
MBE136
g
Fig.10 Transfer characteristic; typical values;
P-channel.
10
handbook, halfpage
V
GS
(V)
8
6
4
2
0
024 108
VDD= −15 V.
ID= −2.3 A.
6
Q (nC)
MBE145
g
Fig.11 Gate-source voltage as a function of total
gate charge; N-channel.
1997 Jun 20 8
Fig.12 Gate-source voltage as a function of total
gate charge; P-channel.
Page 9
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
handbook, halfpage
6
I
S
(A)
4
(1) (2) (3)
2
0
0 0.5 1 1.5
VGD=0.
(1) Tj= 150 °C.
(2) Tj=25°C.
(3) Tj= −55 °C.
V (V)
SD
MBE159
6
handbook, halfpage
I
S
(A)
4
2
0
0 0.5 1 21.5
VGD=0.
(1) Tj= 150 °C.
(2) Tj=25°C.
(3) Tj= −55 °C.
PHC21025
(1) (2) (3)
V (V)
MBE158
SD
Fig.13 Source current as a function of source-drain
diode forward voltage; N-channel.
4
10
handbook, halfpage
R
DSon
(mΩ)
3
10
2
10
10
VDS≥ ID× R
= 0.1 A.
(1) I
D
(2) ID= 0.5 A.
(3) ID=1A.
(1)(2) (6)
(3)(4)(5)
2468
; Tj=25°C.
DSon
(4) ID= 2.2 A.
(5) ID= 3.5 A.
(6) ID=7A.
MDA217
VGS (V)
Fig.14 Source current as a function of source-drain
diode forward voltage; P-channel.
4
10
handbook, halfpage
R
DSon
(mΩ)
3
10
2
100
10
−VDS≥−ID×R
= −0.1 A.
(1) I
D
(2) ID= −0.5 A.
(3) ID= −1A.
(1) (4) (5)(2)(3)
−2 −4 −6 −8
; Tj=25°C.
DSon
(4) ID= −2.3 A.
(5) ID= −4.5 A.
MDA165
VGS (V)
−100
Fig.15 Drain-source on-state resistance as a
function of gate-source voltage; typical
values; N-channel.
1997 Jun 20 9
Fig.16 Drain-source on-state resistance as a
function of gate-source voltage; typical
values; P-channel.
Page 10
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
1.2
handbook, halfpage
k
1.1
1.0
0.9
0.8
0.7
0.6
V
k
=
-------------------------------------V
GSth
Typical V
GSth
GSth
0 50 100 15050
at T
j
at 25°C
at ID= 1 mA; VDS=VGS=V
GSth
.
T ( C)
j
MBE138
o
1.8
handbook, halfpage
k
1.6
1.4
1.2
1.0
0.8
0.6
R
at T
DSon
k
=
----------------------------------------R
at 25 °C
DSon
Typical R
(1) ID= 2.2 A; VGS=10V.
(2) ID= 1 A; VGS= 4.5 V.
DSon
at:
PHC21025
MBE139
(1)
(2)
0 50 100 15050
j
o
T ( C)
j
Fig.17 Temperature coefficient of gate-source
threshold voltage; N and P-channels.
1.8
handbook, halfpage
k
1.6
1.4
1.2
1.0
0.8
0.6
R
DSon
k
=
----------------------------------------R
DSon
Typical R
DSon
(1) ID= −1 A; VGS= −10 V.
(2) ID= −0.5 A; VGS= −4.5 V.
at T
j
at 25 °C
at:
0 50 100 15050
T ( C)
j
Fig.18 Temperature coefficient of drain-source
on-resistance; N-channel.
MBE146
(1)
(2)
o
Fig.19 Temperature coefficient of drain-source
on-resistance; P-channel.
1997 Jun 20 10
Page 11
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
2
10
R
th j-s
(K/W)
10
10
1
1
6
10
δ =
0.75
0.5
0.33
0.2
0.1
0.05
0.02
0.01
0
5
10
10
PHC21025
MBE152
t
tp(s)
p
=
δ
T
t
1
P
t
p
T
4
3
10
2
10
1
10
Fig.20 Transient thermal resistance from junction to soldering point as a function of pulse time; typical values.
1997 Jun 20 11
Page 12
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
PACKAGE OUTLINE
SO8: plastic small outline package; 8 leads; body width 3.9 mm
D
c
y
Z
8
5
PHC21025
SOT96-1
E
H
E
A
X
v M
A
A
pin 1 index
1
e
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
mm
inches
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
A
max.
1.75
0.069
A
1
0.25
0.10
0.010
0.004
A
2
1.45
1.25
0.057
0.049
A
0.25
0.01
b
3
p
0.49
0.25
0.36
0.19
0.019
0.0100
0.014
0.0075
4
w M
b
p
0 2.5 5 mm
scale
(1)E(2)
cD
5.0
4.8
0.20
0.19
eHELLpQZywv θ
4.0
1.27
3.8
0.16
0.050
0.15
2
A
6.2
5.8
0.244
0.228
Q
3
A
θ
0.25 0.10.25
0.010.010.041 0.004
(1)
0.7
0.3
0.028
0.012
o
8
o
0
L
p
L
0.7
0.6
0.028
0.024
(A )
1
detail X
1.0
1.05
0.4
0.039
0.016
OUTLINE
VERSION
SOT96-1
IEC JEDEC EIAJ
076E03S MS-012AA
REFERENCES
1997 Jun 20 12
EUROPEAN
PROJECTION
ISSUE DATE
95-02-04
97-05-22
Page 13
Philips Semiconductors Product specification
Complementary enhancement
PHC21025
mode MOS transistors
DEFINITIONS
Data Sheet Status
Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1997 Jun 20 13
Page 14
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
PHC21025
NOTES
1997 Jun 20 14
Page 15
Philips Semiconductors Product specification
Complementary enhancement
mode MOS transistors
PHC21025
NOTES
1997 Jun 20 15
Page 16
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South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,
2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. +27 11 470 5911, Fax. +27 11 470 5494
South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. +55 11 821 2333, Fax. +55 11 829 1849
Spain: Balmes 22, 08007 BARCELONA,
Tel. +34 3 301 6312, Fax. +34 3 301 4107
Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. +46 8 632 2000, Fax. +46 8 632 2745
Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. +41 1 488 2686, Fax. +41 1 481 7730
Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874
Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. +66 2 745 4090, Fax. +66 2 398 0793
Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. +90 212 279 2770, Fax. +90 212 282 6707
Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461
United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 625 344, Fax.+381 11 635 777
For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
© Philips Electronics N.V. 1997 SCA54
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands 137107/00/02/pp16 Date of release: 1997 Jun 20 Document order number: 9397 750 02509
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