INTEGRATED CIRCUITS
PDI1284P11
3.3V Parallel interface transceiver/buffer
Product specification
Supersedes data of 1997 Sep 15
1999 Sep 17
Philips Semiconductors Product specification
PDI1284P1 13.3V Parallel interface transceiver/buffer
FEA TURES
•Asynchronous operation
•8-Bit transceivers
•6 additional buffer/driver lines peripheral to cable
•5 additional control lines from cable
•5V tolerant
•ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
•Latch up protection exceeds 500 mA per JEDEC Std 19
•Input Hysteresis
•Low Noise Operation
DESCRIPTION
The PDI1284P1 1 parallel interface chip is designed to provide an
asynchronous, 8-bit, bi-directional, parallel interface for personal
computers. The part includes all 19 signal lines defined by the
IEEE1284 interface specification for Byte, Nibble, EPP, and ECP
modes. The part is designed for hosts or peripherals operating at
3.3V to interface 3.3V or 5.0V devices.
The 8 transceiver pairs (A/B 1-8) allow data transmission from the A
bus to the B bus, or from the B bus to the A bus, depending on the
state of the direction pin DIR.
The B bus and the Y9-Y13 lines have either totem pole or resistor
pull up outputs, depending on the state of the high drive enable pin
HD. The A bus has only totem pole style outputs. All inputs are TTL
compatible with at least 400mV of input hysteresis at V
•IEEE 1284 Compliant Level 1 & 2
•Overvoltage Protection on B/Y side for OFF-state
•A side 3-State option
•B side active or resistive pull up option
•Cable side V
QUICK REFERENCE DATA
SYMBOL PARAMETER
R
D
R
PU
SR B/Y Side slew rate RL = 62Ω; CL = 50pF (See Waveform 4) 0.2 V/ns
I
CC
V
HYS
t
PLH/tPHL
A –B/Y
for 5V or 3V operation
CC
CONDITIONS
T
= 25°C; GND = 0V
amb
B/Y Side output resistance VCC = 3.3V; VO = 1.65V ±0.2V (See Figure 2) 45 Ω
B/Y side pull up resistance VCC = 3.3V; Outputs, resistive pull up 1.4K Ω
Total static current VI = VCC/GND; IO = 0 5 µA
Input hysteresis VCC= 3.3V 0.47 V
Propagation delay
to the B/Y side outputs
VCC = 3.3V 12.5/13.9 ns
TYPICAL UNIT
= 3.3V.
CC
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE ORDER CODE DRAWING NUMBER
48-pin plastic SSOP Type II 0°C to +70°C PDI1284P1 1 DL SOT370-1
48-pin plastic TSSOP Type II 0°C to +70°C PDI1284P11 DGG SOT362-1
1999 Sep 17 853–2036 22356
2
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
PIN CONFIGURATION
1
HD
2
A9
3
A10
4
A11
5
A12
6
A13
7
V
CC
8
A1
9
A2
10
GND
11
A3
12
A4
13
A5
14
A6
15
GND
16
A7
A8
17
18
V
CC
19
PLHI
20
A14
21
A15
22
A16
23
A17
24
HLHO
PIN DESCRIPTION
PIN NUMBER SYMBOL FUNCTION
DIR
48
47
Y9
46
Y10
Y11
45
44
Y12
Y13
43
V
42
CCB
B1
41
B2
40
39
GND
38
B3
37
B4
36
B5
35
B6
34
OEA
33
B7
32
B8
31
V
CCB
30
PLHO
C14
29
C15
28
C16
27
26
C17
25
HLHI
8, 9, 11, 12, 13,
14, 16, 17
41, 40, 38, 37,
36, 35, 33, 32
A1 - A8 Data inputs/outputs
B1 - B8
IEEE 1284 Std.
outputs/inputs
2, 3, 4, 5, 6 A9 - A13 Data inputs
47, 46, 45, 44, 43 Y9 - Y3 IEEE 1284 Std. outputs
29, 28, 27, 26 C14 - C17 Control inputs (cable)
20, 21, 22, 23 A19 - A17
1 HD
48 DIR
19 PLHI
30 PLHO
25 HLHI
24 HLHO
Control outputs
(peripheral)
B/Y–side high drive
enable/disable
Direction selection
A to B / B to A
Peripheral logic high input
(peripheral)
Peripheral logic high
output (cable)
Host logic high input
(cable)
Host logic high output
(cable)
10, 15, 39 GND Ground (0V)
7, 18 V
31, 42 V
CC
CCB
Positive supply voltage
Cable side power supply
voltage 3V/5V
34 OEA A side output enable
1999 Sep 17
SV00496
3
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
LOGIC SYMBOL
HD
A9
A10
A11
A12
A13
A1
A2
A3
A4
A5
A6
A7
A8
PLHI
CNTL
CNTL
CNTL
CNTL
CNTL
CNTL
CNTL
CNTL
HD
HD
HD
HD
HD
HD
HD
HD
HD
HD
HD
HD
HD
HD
HD
CNTL
DIR
OEA
Y9
Y10
Y11
Y12
Y13
B1
B2
B3
B4
B5
B6
B7
B8
PLHO
FUNCTION TABLE
DIR OEA HD INPUTS OUTPUTS
X X X C14-17 A14-17 t
X X X HLHI HLHO t
X X L A9-13 Y9-13 r
X X H A9-13 Y9-13 t
X X L PLHI PLHO O.C.
X X H PLHI PLHO t
H X L A1-8 B1-8 r
H X H A1-8 B1-8 t
L L X B1-8 A1-8 t
L H X A1-8 Z*
L H X B1-8 r
A = Side driving internal IC
B = Side driving external cable (bidirectional)
C = Side receiving control signals from internal cable
Y = Side driving external cable (unidirectional)
X = Don’t care – control signals in
Z = High Z or 3-State
O.C.= Open collector
= Totem pole output
t
P
r
= Resistive pull up: 1.4kΩ (nominal) on B/Y/C cable side and
P
* When DIR = L and OEA
. However, while a B/Y side output is Low as driven by a
V
CC
Low signal on the A side, that particular B/Y side resistor is
switched out to stop current drain from V
= H, the output signal is isolated
through it.
CC
from the input signal. B1 – 8 signals maintain an r
on the input for this mode.
OUTPUT
TYPES
P
P
P
P
P
P
P
P
P*
= 1.4kΩ
P
A14
A15
A16
A17
HLHO
PERIPHERAL
SIDE
C14
C15
C16
C17
HLHI
CABLE
SIDE
SV00136
PINS WITH PUL L UP RESISTORS TO LOAD CABLE
PINS SYMBOL FUNCTION
47, 46, 45, 44, 43 Y9 – Y13 Output cable drivers
41, 40, 38, 37, 36,
35, 33, 32
29, 28, 27, 26 C14 – C17
B1 – B8 Output cable drivers
External cables control signal
input
1999 Sep 17
4
Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
PDI1284P113.3V Parallel interface transceiver/buffer
ABSOLUTE MAXIMUM RATINGS
SYMBOL
1, 2
PARAMETER CONDITIONS RATING UNIT
ESD Immunity, per Mil Std 883C method 3015 "1 kV
V
CC
V
CCB
I
IK
I
OK
V
IN
V
B/Y DC output voltage on B/Y side
OUT
V
B/Y Transient output voltage on B/Y side
OUT
V
OUT
I
O
T
stg
ICC/I
GND
DC supply voltage –0.5 to +4.6 V
DC cable supply voltage –0.5 to +6.5 V
DC input diode current VI < 0 ±20 mA
DC output diode current VO < 0 ±50 mA
DC input voltage
A DC output voltage on A side –0.5 to V
3
3
4
40ns transient –2 to +7 V
–0.5 to +5.5 V
–0.5 to +5.5 V
CC
DC output current Outputs in High or Low state ±50 mA
Storage temperature range –60 to +150 °C
Continuous current through VCC or GND ±200 mA
+0.5 V
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability .
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
4. V
B/Y (tr) guarantees only that this part will not be damaged by reflections in application so long as the voltage levels remain in the
OUT
specified range.
RECOMMENDED OPERATING CONDITIONS
LIMITS
MIN MAX
V
OUT
V
V
V
OUT
T
CC
CCB
V
V
I
OH
I
OL
amb
DC supply voltage 3.0 3.6 V
DC cable supply voltage 3.0 5.5 V
High level Input voltage 2.0 V
IH
Low level input voltage 0.8 V
IL
B/Y B/Y output voltage –0.5 5.5 V
A A side output voltage 0 V
B/Y side output current High –14 mA
B/Y side output current Low 14 mA
Operating free-air temperature range 0 +70 °C
CC
V
1999 Sep 17
5
Philips Semiconductors Product specification
O
OH
,
High-level output voltage
V
O
OL
,
Low-level output voltage
V
V
PLH
V
I
2
for VCCB when B or C in uts
o
off
Power off leakage current
A
PDI1284P113.3V Parallel interface transceiver/buffer
DC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
T
= 0°C to 70°C
amb
MIN TYP MAX
V
,
HYS
A, B
VIH,
A, B, PLHI
VIL,
A, B, PLHI
V
HYS
Input hysteresis
High-level input voltage VCC = 3.0 to 3.6V 2.0 V
Low-level input voltage VCC = 3.0 to 3.6V 0.8 V
, C Input hysteresis C Inputs, VCC = 3.3V 0.8 V
A, B, control inputs, VCC = 3.3V ,
VIL= 0.8, VIH = 2.0
0.4 V
VIH, C High-level input voltage C Inputs, VCC = 3.0 to 3.6V 2.3 V
VIL C Low-level input voltage VCC = 3.0 to 3.6V 0.8 V
VIH HLH High-level input voltage VCC = 3.6V 2.6 V
VIL HLH Low-level input voltage VCC = 3.0 1.55 V
RD
RD
R
PU
Output impedance VCC = 3.3V, VO = 1.65 "0.1V See Fig. 2 35 45 55 Ω
P
Output impedance VCC = 3.3V, VO = 1.65 "0.1V See Fig. 2 35 45 55 Ω
N
Pull up resistance VCC = 3.3V , outputs in high Z 1.15 1.4 1.65 kΩ
VOH, B/Y High-level output voltage VCC = 3.0V, IOH = –14mA 2.23 V
VOL, B/Y Low-level output voltage VCC = 3.0V, IOL = 14mA 0.77 V
V
, A
H
and HLH
V
, A
L
and HLH
O
I
CC
CCBL
I
ff
C/B/Y side
1
I
in
1
I
OZ
p
p
High-level output voltage IOH = 500µA, VCC = 3.15V 3.1
Low-level output voltage IOL = 500µA, VCC = 3.0V 0.8
Quiescent supply current
for VCC and V
conditions except when B or C
CCB
under all
inputs are LOW
Quiescent supply current
are LOW
Input leakage current Input leakage current
3-State output current V
IOH = –500µA, VCC = 3.0V 2.8
IOH = –4mA, VCC = 3.0V 2.4
IOL = 50µA, VCC = 3.0V 0.2
IOL = 4mA, VCC = 3.0V 0.4
VCC = 3.6V, V
Vin = 0 or VCC; V
Vcin = V
VCC = V
Vin = 0 or VCC; V
VCC = V
Vin = 0 or VCC; V
p
VCC = V
Vin =0 or VCC; V
VCC = 3.6V, V
V
= 0 or VCC; V
in
VO = 5.5V, VCC = V
VO = 5.5V, VCC = 0, V
OUT
CCB
CCB
dir
CCB
= VCC or GND ±20 µA
CCB
Bin
or Floating
= V
dir
cin
= 3.6V; V
cin
= 3.6V; V
Bin
CCB
Bin
= 3.6V to 5.5V
= V
CCB
= 3.6V
= 0V
= 5.5V
CCB
= 0V
= 0V
dir
= V
= 0V
cin
= 5.5V; V
= V
CCB
= 0V
dir
= 0 V
cin
= 0 )100
= 4.5V ±100
CCB
1 V
= 0 to V
in
CC
0.1 100 µA
10 15 mA
16 20
30 40
47 60
±1 µA
NOTES:
1. The pull up resistor on the B side outputs makes it impossible to test I
as well.
2. Includes extra ICCB current from pull-up resistors, i.e. ICCBL = (#B + #C LOW inputs) * (VCCB/R
on the B side. This applies to the input current on the C side inputs
OZ
).
PU
UNIT
mA
µ
1999 Sep 17
6
Philips Semiconductors Product specification
Propagation dela
Path A to B or Y
2, 5
ns
Propagation dela
Path B to A
2, 5
ns
Propagation dela
Path C to A
2, 5
ns
Propagation dela
Path PLH
2, 5
ns
Propagation dela
Path HLH
2, 5
ns
3
ns
Output enable time
ns
R
250Ω
ns
ns
ns
PDI1284P113.3V Parallel interface transceiver/buffer
AC CHARACTERISTICS
GND = 0V, tR = tF = 3.0ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL PARAMETER TEST CONDITIONS WAVEFORMS
tp
tp
tp
tp
tp
tp
tp
tp
tp
tp
t
slew
tp
tp
t
DIFF
tp
tp
tp
tp
tp
tp
tp
tp
tp
tp
tp
tp
tp
tp
LH
HL
LH
HL
LH
HL
LH
HL
LH
HL
HZ
ZH
HZ
ZH
HZ
ZH
LZ
ZL
HZ
ZH
LZ
ZL
HZ
ZH
LZ
ZL
p
p
p
p
p
y
y
y
y
y
Slew rate B or Y side outputs 4 0.05 0.4 V/ns
Output enable/ HD to Y or B
disable time RL = 500Ω
Propagation delay difference HD prop tpZH–tp
p
Output enable/
disable time
HD to PLHO
RL = 500Ω
Dir to B
=
L
on the B/Y side tP load
HZ
3 20
Fig 1. 30
1 15
Output enable/ Dir to A
Fig 1. 50
disable time RL = 250Ω
3 6
Output enable/ OEA to A
Fig 1. 12
disable time RL = 250Ω
T
= 0°C to +70°C
amb
MIN TYP MAX
0 20
0 20
0 12
0 12
15
15
20
20
15
15
20
20
10 ns
20
50
50
30
15
50
12
UNIT
6
1999 Sep 17
7
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
AC WAVEFORMS
VM = 1.5V
V
= VOL ±0.3V
X
= VOH –0.3V
V
Y
V
and VOH are the typical output voltage drops that occur with the
OL
output load. (V
INPUTS
OUTPUTS
Waveform 1. Input Bn to output An propagation delays
INPUT
OUTPUT
never goes below 3.0V).
CC
GND
V
OH
V
OL
t
t
PLH
V
PHL
1.4V
V = 2.7V
M
t
PLH
V
M
SY00001
2.4V
1.4V
0.4V
t
PHL
V
OUT
V
–1.4V1.4V
OUT
DIR
to A
DIR
to B
HD
to B
V
OUTPUT
LOW-to-OFF
OFF-to-LOW
V
V
OH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
V
M
outputs
disabled
t
PZL
V
M
t
PZH
V
M
outputs
enabled
t
PLZ
V
M
V
M
CC
V
OL
t
PHZ
outputs
enabled
X
V
Y
SY00008
Waveform 2. Voltage W aveforms Propagation Delay Times
(A To B) Measured at Output Pin
SY00002
Waveform 3. 3-State enable and disable times
2.4V
OUTPUT
INPUT
0.9V
0.4V
t1 t2 t1 t2
0.4V
2.4V
1.9V
SY00007
Waveform 4. Slew Rate Voltage Waveforms on B/Y side
(Input pulse rise and fall time are 3ns, 150ns t pulse width t10 µs,
for both a Low to High and a High to Low transition.)
Slew Rate measured between 0.4V and 0.9V - rising.
Slew Rate measured between 2.4V and 1.9V - falling.
Slew Rate measured at V
as specified in Waveform 5.
OUT
1999 Sep 17
8
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
TEST CIRCUITS AND WAVEFORMS
V
CC
SWITCH POSITION
Bn or Yn Outputs
TEST SWITCH
t
PLH
t
PHL
V
M
10%
t
(tf)
THL
(tr)
t
TLH
90%
V
M
t
W
t
W
GND
V=2.8V
10%
90%
90%
V
M
t
(tf)
THL
(tr)
t
TLH
V
M
10%
VM = 1.5V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
Amplitude Rep. Rate t
t
W
r
3.0V 1MHz 500ns 3ns 3ns
AMP (V)
0V
AMP (V)
0V
t
f
PULSE
GENERATOR
V
IN
D.U.T.
R
T
V
OUT
50pF
= 500Ω t
R
L
= 62
Test Circuit for Bn or Yn Outputs
V
CC
PULSE
GENERATOR
V
IN
R
D.U.T
T
V
OUT
C
L
R
L
Test Circuit for An Outputs
DEFINITIONS
= Load capacitance includes jig and probe capacitance;
C
L
see AC CHARACTERISTICS for value.
RL = Load resistor; see AC CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
S
1
PLH/PHL
Ω
for SR test
V=2.8V
GND
NEGATIVE
PULSE
POSITIVE
PULSE
FAMILY
PDI1284
90%
10%
S
Open
2 x V
GND
1
500Ω
500Ω
1
CC
PULSE
GENERATOR
V
I
R
T
V
CC
t 2.7V V
2.7V – 3.6V 2.7V
V
V
D.U.T.
I
CC
CC
V
O
50pF
C
L
Test S
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
Figure 1. Load Circuitry for Bn to An Switching Times
2 x V
Open
GND
SY00003
Waveform 5.
CC
V
CC
I
O
CC
VCC/2
/2 ť IO ť.
SY00005
D.U.T.
is measured by forcing VCC/2 on the output. RD can then
I
O
be calculated using the equation RD = V
Figure 2. Output Impedance RD
SV001741
1999 Sep 17
9
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm SOT370-1
1999 Sep 17
10
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm SOT362-1
1999 Sep 17
11
Philips Semiconductors Product specification
PDI1284P113.3V Parallel interface transceiver/buffer
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1999
All rights reserved. Printed in U.S.A.
Date of release: 09-99
Document order number: 9397 750 06421
1999 Sep 17
12
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