Datasheet PCD4440T Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

PCD4440T

Analog voice
scrambler/descrambler

Product specification
Supersedes data of October 1992
File under Integrated Circuits, IC03

1996 Dec 20

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

CONTENTS

1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
6 PINNING INFORMATION

6.1 Pinning

6.2 Pin description

7.1 Scrambling

7.2 Power supply (VDD, VSS)

7.3 Oscillator (OSCI)

7.4 Splitting frequency and mode selection

7.5 Serial clock input (SCL), Serial data input (SDA)

7.6 Address input (A0)

7.7 I2C-bus data configuration

7.8 Signal input (IN), Signal output (OUT)
8I

8.1 Bit transfer

8.2 Start and stop conditions

8.3 System configuration

8.4 Acknowledge

8.5 Timing specifications
9 APPLICATIONS
10 HANDLING
11 LIMITING VALUES
12 CHARACTERISTICS

14.1 Introduction

14.2 Reflow soldering

14.3 Wave soldering

14.4 Repairing soldered joints
15 DEFINITIONS+
16 LIFE SUPPORT APPLICATIONS
17 PURCHASE OF PHILIPS I2C COMPONENTS

2

C BUS INTERFACE

1996 Dec 20 2

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

1 FEATURES

• Scrambler or descrambler function

• Scrambling in frequency domain

• Selectable split frequency (up to 10 selections per

second)

• Telephony-band filtering included

• No increase in bandwidth

• No external components required

• Small signal delay

• Insensitive to distortion and group delay of transmission

channel

2

• Control via serial I

• Low transfer loss of speech

• Mute option

• Transparent mode

• High signal input impedance

• Low signal output impedance

• Low power consumption.

4 ORDERING INFORMATION

C-bus

2 APPLICATIONS

• Cordless telephones

• Security telephones

• Portable phones

• Private Mobile Radio (PMR).

3 GENERAL DESCRIPTION

The PCD4440T is a silicon gate CMOS integrated circuit
intended to be used in cordless telephony, radio, and line
telecommunications products utilizing a microcontroller for
the control functions. The purpose of the device is to
prevent unauthorized ‘listening-in’ on conversations.
A major application is protection of the vulnerable radio link
between a CT0 type cordless handset and its base unit.
Analog scrambling/descrambling is based on the split
frequency method realized in a sophisticated
switched-capacitor technology. The PCD4440T is
compatible with most microcontrollers and communicates
via a two line bidirectional I

2

C-bus.

TYPE

NUMBER

PCD4440T SO8 plastic small outline package; 8 leads; body width 7.5 mm SOT176-1

NAME DESCRIPTION VERSION

PACKAGE

1996 Dec 20 3

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

5 BLOCK DIAGRAM

handbook, full pagewidth

4

IN

LPF

BIAS GEN

LPF LPF

PCD4440T

LPF

128

SCL OSCI V

SDA A0

LPF

transparent

clocks

5

LPF

mute

CONTROL LOGICI2C-bus INTERFACE

76

3

DDVSS

OUT

MGG729

Fig.1 Block diagram.

1996 Dec 20 4

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

6 PINNING INFORMATION

6.1 Pinning

handbook, halfpage

SCL

V

SS

IN

1
2

PCD4440T

3
4

MGG728

A0

8

OSCISDA

7

V

6

DD

OUT

5

Fig.2 Pin configuration.

6.2 Pin description SYMBOL PIN TYPE DESCRIPTION

2

SCL 1 I serial clock line (I
SDA 2 I serial data line (I
V

SS

3 P negative Supply

C-bus)

2

C-bus)

IN 4 I signal input
OUT 5 O signal output
V

DD

6 P positive supply
OSCI 7 I oscillator input
A0 8 I slave address input (I

2

C-bus)

7.1 Scrambling

The PCD4440Taccomplishes this task by first filtering the
incoming signal, limiting the bandwidth to 3500 Hz. Then
the signal is split into a high (> fs) and a low (< fs) frequency
band. Both frequency bands are inverted and added again
to provide a single output signal. Values for 9 split
frequencies fS can be controlled by a scramble code table
in the microcontroller. Control of these split frequencies is
accomplished via the serial two-wire I2C-bus. In addition to
the split frequencies (fs), a transparent mode and mute
instruction can be selected (see Table 1).

Figure 3 shows the signal path for both bands. The lower
band path (on the left side of the diagram) operates on
frequencies f ≤ f

(Split Frequency), the upper band path

s

(on the right side) on frequencies f ≥ fs.
The input signal contains frequencies from f1up to f2.

In scrambling mode, the output signal is band limited from
fl (300 Hz) to fh(3500 Hz). In the left path, the input signal
is first limited to fs. The following modulator inverts the
lower band. fl is folded up to fs, fs down to fl. In general, an
input frequency fin is folded to f

out=fs+fl−fin

. Finally the

folded signal is band limited to fs again.
In the right path, the input signal is first limited to fh.

The following modulator inverts the upper band. fs is folded
up to fh, fh down to fs. In general, an input frequency fin is
folded to f

out=fs+fh−fin

. Finally, the folded signal is band
limited to fh again. In the last step, the bands are added
and buffered.

7 FUNCTIONAL DESCRIPTION

To provide privacy for the end user of a cordless telephone
set, the radio-link audio signal must be scrambled. In the
microphone of the handset and the incoming telephone
line audio path of the base unit a scrambler circuit has to
be implemented. Consequently the audio signal to the
telephone line and to the earpiece must be descrambled.
Both functions can be fulfilled by the PCD4440T by simply
inserting it in the audio path.

1996 Dec 20 5

Because of the symmetry of the scrambling process,
descrambling is achieved by passing the signal through
another PCD4440T.

In the transparent mode, the input signal is band limited to
3500 Hz. Frequencies from 0 to 300 Hz are not filtered
out.

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

handbook, full pagewidth

A

ab cd e f

0

f

1

LPF

1a

A

ab c ab cd e

0ff

f

f

1

A

0ff

f

1

s

l

f

m1 = fl + fs

c

ab

f

s

l

ab c

LPF

1b

f

fhf2ff

s

l

A

f

0ff

f

l

1

f

m2 = fh + fs

A

0ff

f

f

1

l

LPF

2a

f

s

f

s

LPF

2b

f

h

2

aabbccddee

f

h

2

A

bc

0ff

f

f

1

s

l

A

0ff

f

f

1

l

bcde

f

s

A

0ff

h

Fig.3 Scrambler signal path.

1996 Dec 20 6

de

f

f

2

f

f

1

s

l

f

h

2

MGG730

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

7.2 Power supply (VDD, VSS)

The positive supply of the circuit (V

) must meet the

DD

voltage requirement as indicated in the characteristics.
To avoid undefined states of the device at power-on, an
internal reset circuit clears the logic. The power-on reset
has the highest priority; it blocks and resets the complete
circuit.

7.3 Oscillator (OSCI)

The time base for the PCD4440T is a 3.58 MHz input
signal which can be derived from the oscillator output
(OSCO) of Philips microcontroller families PCD33xxA or
PCF84CxxxA. Figure 4 shows the OSCI connection.

handbook, full pagewidth

PCD33xxA

PCF84CxxxA

MICROCONTROLLER

OSCO

7.4 Splitting frequency and mode selection

Table 1 shows the input codes required to select the
various splitting frequencies, and the mute, transparent
and scramble/descramble modes. The codes form part of

2

the serial I

C-bus message input on the SDA line from the

microcontroller.

27 pF

3.58 MHz

OSCI



PCD4440T

MGG731

Fig.4 OSCI (oscillator input) connection.

Table 1 Input data codes for splitting frequency and mode selection; note 1

D3 D2 D1 D0 HEX APPLICATION f

000101Mute mode −
001002Select f
001103Select f
010004Select f
010105Select f
011006Select f
011107Select f
100008Select f
100109Select f
10100ASelect f

s
s
s
s
s
s
s
s
s

10110BTransparent mode −
11110FStart scramble/descramble mode −

Notes

1. Input codes other than shown in the table are not allowed.

2. Oscillator frequency = 3.58 MHz.

2641
1853
1507
1279
1117
1018
899
837
767

(2)

(Hz)

s

1996 Dec 20 7

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

7.5 Serial clock input (SCL), Serial data input (SDA)

SCL and SDA are serial clock and data lines which
conform to the I

2

C-bus specification. Both inputs must be
pulled up externally to VDD through resistors of
approximately 10 kΩ.

7.6 Address input (A0)

A0 is the slave address input and is used to set one bit of
the slave address, so as to identify one of two PCD4440T

2

devices connected to the same I

C-bus. Whether another
PCD4440T is connected to the bus or not, A0 must be
connected to VDD or VSS. The remaining bits of the slave
address are fixed internally.

handbook, full pagewidth

MSB

S 110111A00A0000D3D2D1D0AP

acknowledge

R/W

2

7.7 I

C-bus data configuration

The PCD4440T is always a slave receiver in the I2C-bus
configuration (the R/W bit = 0). The slave address consists
of 7 bits, where the least significant is set by the input on
A0. The more significant bits are fixed internally, as shown
in Fig.5. For definition of D0-D4, see Table 1.

7.8 Signal input (IN), Signal output (OUT)

Signal input for the scrambler/descrambler is coupled into
a ‘Sallen and Key’ anti-aliasing filter configuration. A DC

1

bias voltage of

⁄2VDD is built-in.

The analog signal output is buffered to achieve a relatively
low output impedance of roughly 1 kΩ which is sufficient to
drive the earpiece amplifier or similar applications.

acknowledge

MGG732

slave address data

Fig.5 I2C-bus data format.

internal STROBE

1996 Dec 20 8

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

8I2C BUS INTERFACE

The I2C-bus is for two-way communication between different ICs or modules. It uses only two lines, a serial data line
(SDA) and a serial clock line (SCL), both of which are bi-directional. Both lines must be connected to a positive supply
via a pull-up resistor when connected to the output stages of a device. Data transfer may be initiated only when the bus
is not busy.

8.1 Bit transfer (see Fig.6) One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period

of the clock pulse as changes in the data line at this time will be interpreted as control signals.

SDA

SCL

data line

stable;

data valid

change

of data

allowed

MBC621

Fig.6 Bit transfer.

8.2 Start and stop conditions (see Fig.7) Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the

clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is
defined as the stop condition (P).

SDA

SCL

S

START condition

P

STOP condition

SDA

SCL

MBC622

Fig.7 Start and stop conditions.

1996 Dec 20 9

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

8.3 System configuration (see Fig.8)
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls

message transfer is the ‘master’ and the devices that are controlled by the master are the ‘slaves’.

SDA
SCL

MASTER

TRANSMITTER /

RECEIVER

SLAVE

RECEIVER

SLAVE

TRANSMITTER /

RECEIVER

MASTER

TRANSMITTER

MASTER

TRANSMITTER /

RECEIVER

MBA605

Fig.8 System configuration.

8.4 Acknowledge (see Fig.9)
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.

Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the
transmitter whereas the master generates an extra acknowledge after the reception of each byte. Also a master must
generate an acknowledge after reception of each byte that has been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the acknowledge-related clock pulse. Set-up and hold times must
be taken into account to ensure that the SDA line is stable LOW during the whole high period of the acknowledge-related
clock pulse. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the
last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the
master to generate the stop condition.

DATA OUTPUT

BY TRANSMITTER

not acknowledge

DATA OUTPUT

BY RECEIVER

acknowledge

SCL FROM

MASTER

S

START

CONDITION

Fig.9 Acknowledgment on the I2C-bus.

1996 Dec 20 10

MBC602

9821

clock pulse for

acknowledgement

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

8.5 Timing specifications

The PCD4440T accepts data input from a microcontroller and operates as a ‘slave receiver’ via the I2C-bus. It supports
the ‘standard’ mode of the I2C-bus, but not the ‘fast’ mode detailed in
no. 9398 393 40011. The timing requirement are as follows:

Masters generate a bus clock with a maximum frequency of 100 kHz. Detailed timing is shown in Fig. 10, where the two
signal levels are LOW = VIL and HIGH = VIH, see Chapter 12. The time symbols are explained in Table 2. Figure 11
shows a complete data transfer.

handbook, full pagewidth

SDA

“The I2C-bus and how to use it”

document order

SCL

SDA

handbook, full pagewidth

SDA

SCL

MBC764

CONDITION

t

BUF

t

LOW

t

HD;STA

t

r

t

SU;STA

Fig.10 Standard mode timing.

ACKADDRESS R/W

DATASTART

t

HD;DAT

ACK

START

CONDITION

t

HIGH

t

f

t

SU;DAT

t

SU;STO

981 - 7981 - 7981 - 7

STOPACKADDRESS R/W

MBC765

Clock LOW minimum =4.7 µs; clock HIGH minimum = 4 µs.
The dashed line is the acknowledgment of the receiver.
Mark-to-space ratio = 1 : 1 (LOW-to-HIGH).
Maximum number of bytes is unrestricted.
Premature termination of transfer is allowed by generation of STOP condition.
Acknowledge clock bit must be provided by master.

Fig.11 Complete data transfer in standard mode.

1996 Dec 20 11

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

Table 2 Explanation of time symbols used in Fig.10

SYMBOL PARAMETER DESCRIPTION MIN. MAX. UNITS

f

SCL

t

SW

t

BUF

t

SU;STA

t

HD;STA

t

LOW

t

HIGH

t

r

t

f

t

SU;DAT

t

HD;DAT

t

SU;STO

SCL clock frequency 0 100 kHz
tolerable pulse spike width − 100 ns
bus free time The time that the bus is free (SDA is HIGH)

4.7 −µs
before a new transmission is initiated by
SDA going LOW.

set-up time repeated START Only valid for repeated start code. 4.7 −µs
hold time START condition The time between SDA going LOW and the

4.0 −µs
first valid negative-going transition of SCL.

SCL LOW time The LOW period of the SCL clock. 4.7 −µs
SCL HIGH time The HIGH period of the SCL clock. 4.0 −µs
rise time SDA and SCL − 1.0 µs
fall time SDA and SCL − 0.3 µs
data set-up time 250 − ns
data hold time 0 − ns
set-up time STOP condition 4.0 −µs

1996 Dec 20 12

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

9 APPLICATIONS

handbook, full pagewidth

antenna

SECTION

V

RF

REF

RSSI

RX

TX

mod
power down RX
power down TX

A/D CONVERTER

DESCRAMBLER

PCD4440T

SCRAMBLER

PCD4440T

LCD DRIVERLCD DISPLAY

2

I

C-bus

DETECTOR

EXPANDOR

1/2 NE577

COMPRESSOR

1/2 NE577

data out

MICROCONTROLLER

PCD33xxA

data in

KEYPAD

123
456
789

0#

*

Fig.12 CT0 handset with direct (Manchester code) data system.

1996 Dec 20 13

MGG733

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

antenna

handbook, full pagewidth

mod
power down RX
power down TX

2

I

C-bus

data out

RF

SECTION

V

REF

RSSI

RX

TX

A/D CONVERTER

DESCRAMBLER

PCD4440T

SCRAMBLER

PCD4440T

DETECTOR

EXPANDOR

1/2 NE577

COMPRESSOR

1/2 NE577

MICROCONTROLLER

data in

LINE INTERFACE

TEA106x

Fig.13 CT0 base unit with direct (Manchester code) data system.

PCD33xxA

DTMF

CHARGING

telephone

line

CIRCUIT

MGG734

10 HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, it is good practice to take
normal precautions appropriate to handling MOS devices (see

devices”

).

“Handbook IC03, Section General, Handling MOS

1996 Dec 20 14

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

11 LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

V

I

I

I

I

O

P

tot

P

O

T

stg

T

amb

12 CHARACTERISTICS

= 5.0 V; VSS=0V; T

V

DD

supply voltage −0.3 +7.0 V
all input voltages −0.8 VDD+ 0.8 V
DC input current −10 +10 mA
DC output current −20 +20 mA
total power dissipation − 300 mW
power dissipation per output − 50 mW
storage temperature −65 +150 °C
operating ambient temperature −25 +70 °C

=25°C; all voltages with respect to VSS; f

amb

= 3.579 MHz unless otherwise specified.

xtal

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply

V

DD

I

DD

operating supply voltage 2.8 − 6.0 V
supply current

mute mode V
operating mode V

=3V − 2.2 − mA

DD

=3V − 13 − mA

DD

Inputs/Outputs: AO, SDA, SCL

V

IL

V

IH

C

i

I

OL

LOW level input voltage 0 − 0.3V
HIGH level input voltage 0.7VDD− V

DD

DD

V

V
input capacitance −−7pF
SDA output current LOW VOL= 0.4 V 3.0 −− mA

Signal input: IN

V

DC

V

i(P-P)

| input impedance frequency = 1 kHz − 120 − kΩ

|Z

i

DC voltage level − 0.5VDD− V
allowed amplitude − 1.25 VDD− 1V

Signal output: OUT

V

DC

| output impedance frequency = 1 kHz −−1kΩ

|Z

o

UFS unwanted frequency

V

o/Vi

DC voltage level − 0.5VDD− V

suppression
transfer loss

= 1.25 V; fS= 767 or 2461 Hz;

V

i(P-P)

fin= 1 kHz; VDD=3Vor5V
transparent mode − 3.5 − dB
operating mode − 0 − dB

35 40 − dB

Oscillator frequency input: OSCI

V

DC

V

IL

V

IH

DC voltage level − 0.5VDD− V
LOW level input voltage 0 − 0.3V
HIGH level input voltage 0.7VDD− V

1996 Dec 20 15

DD

DD

V

V

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

13 PACKAGE OUTLINE

SO8: plastic small outline package; 8 leads; body width 7.5 mm

D

c

y

Z

8

pin 1 index

1

e

5

A

2

A

1

4

w M

b

p

E

H

E

detail X

SOT176-1

A

X

v M

A

Q

(A )

L

p

L

A

3

θ

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE

VERSION

SOT176-1

A

max.

2.65

0.10

A1A2A

0.3

2.45

0.1

2.25

0.012

0.096

0.004

0.089

IEC JEDEC EIAJ

0.25

0.01

b

3

p

0.49

0.32

0.36

0.23

0.019

0.013

0.014

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1)

cD

7.65

7.45

0.30

0.29

REFERENCES

7.6

7.4

0.30

0.29

1.27

0.050

1996 Dec 20 16

eHELLpQywv θ

1.45

0.057

1.1

0.45

0.043

0.018

1.1

1.0

0.043

0.039

0.25 0.1

0.25

0.01 0.004

0.01

EUROPEAN

PROJECTION

10.65

10.00

0.42

0.39

(1)

Z

2.0

1.8

0.079

0.071

ISSUE DATE

91-08-13
95-02-25

o

8

o

0

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

14 SOLDERING

14.1 Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“IC Package Databook”

14.2 Reflow soldering

Reflow soldering techniques are suitable for all SO
packages.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

(order code 9398 652 90011).

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

14.4 Repairing soldered joints

Fix the component by first soldering two diagonally­opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

14.3 Wave soldering

Wave soldering techniques can be used for all SO
packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

1996 Dec 20 17

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

15 DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

16 LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

17 PURCHASE OF PHILIPS I

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C COMPONENTS

2

C components conveys a license under the Philips’ I2C patent to use the

1996 Dec 20 18

Philips Semiconductors Product specification

Analog voice scrambler/descrambler PCD4440T

NOTES

1996 Dec 20 19

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: seeSouth America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15thfloor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]/xxx
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: seeAustria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66,
Chung Hsiao West Road, Sec. 1, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1996 SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 417021/1200/02/pp20 Date of release: 1996 Dec 20 Document order number: 9397 750 01604