Datasheet PCA8582F-2P, PCA8582F-2T, PCD8582D-2P, PCD8582D-2T, PCF8582E-2P Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

PCX8582X-2 Family

256 x 8-bit CMOS EEPROMS
with I

Product specification
Supersedes data of February 1992
File under Integrated Circuits, IC12

Philips Semiconductors

2

C-bus interface

December 1994

Philips Semiconductors Product specification

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

supply voltage 2.5 6.0 V

I

DDR

supply current READ f

SCL

= 100 kHz
VDD= 3 V − 60 µA
VDD= 6 V − 200 µA

I

DDW

supply current ERASE/WRITE f

SCL

= 100 kHz
VDD= 3 V − 0.6 mA
VDD= 6 V − 2.0 mA

I

DDSB

supply current STANDBY VDD= 3 V − 3.5 µA

VDD= 6 V − 10 µA

256 x 8-bit CMOS EEPROMS
with I

FEATURES

• Low power CMOS
– maximum active current 2.0 mA
– maximum standby current 10 µA (at 6.0 V),

• Non-volatile storage of 2-Kbits organized as 256 × 8-bits

• Single supply with full operation down to 2.5 V

• On-chip voltage multiplier

• Serial input/output I2C-bus

• Write operations

– byte write mode
– 8-byte page write mode

• Read operations
– sequential read
– random read

• Internal timer for writing (no external components)

• Power-on reset

• High reliability by using a redundant storage code

• Endurance

– >500 k E/W-cycles at T

• 40 years non-volatile data retention time (typ.)

• Pin and address compatible to

– PCX8570, PCF8571, PCF8572 and PCF8581
– PCX8494X-2, PCX8598X-2 -Family.

2

C-bus interface

typical 4 µA

(minimizes total write time per byte)

= 22 °C

amb

PCX8582X-2 Family

DESCRIPTION

The PCX8582X-2 is a 2-Kbit (256 × 8-bit) floating gate
electrically erasable programmable read only memory
(EEPROM). By using an internal redundant storage code
it is fault tolerant to single bit errors. This feature
dramatically increases reliability compared to conventional
EEPROM memories.

Power consumption is low due to the full CMOS
technology used. The programming voltage is generated
on-chip, using a voltage multiplier.

As data bytes are received and transmitted via the serial
I2C-bus, a package using eight pins is sufficient. Up to
eight PCX8582X-2 devices may be connected to the
I2C-bus. Chip select is accomplished by three address
inputs (A0, A1, A2).

Timing of the ERASE/WRITE cycle is carried out
internally, thus no external components are required. Pin 7
(PTC) must be connected to either V

There is an option of using an external clock for timing the
length of an ERASE/WRITE cycle.

or left open-circuit.

DD

December 1994 2

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

ORDERING INFORMATION

PCF8582C-2P DIP8 plastic dual in-line package;
PCD8582D-2P −25 +70 3.0 6.0
PCF8582E-2P −40 +85 4.5 5.5
PCA8582F-2P −40 +125 4.5 5.5
PCF8582C-2T SO8 plastic small outline
PCD8582D-2T −25 +70 3.0 6.0
PCF8582E-2T −40 +85 4.5 5.5
PCA8582F-2T −40 +125 4.5 5.5

DEVICE SELECTION
Table 1 Device selection code

SELECTION DEVICE CODE CHIP ENABLE R/

Bit b71 b6 b5 b4 b3 b2 b1 b0
Device 1 0 1 0 A2 A1 A0 R/W

Note

1. The MSB b7 is sent first.

C-bus interface

TYPE

NUMBER

PACKAGE TEMPERATURE (°C) SUPPLY (V)

NAME DESCRIPTION VERSION MIN. MAX. MIN. MAX.

SOT97-1 −40 +85 2.5 6.0

8 leads (300 mil)

SOT96-1 −40 +85 2.5 6.0
package;
8 leads; body width 3.9 mm

PCX8582X-2 Family

W

Table 2 Endurance and data retention guarantees

DEVICE ENDURANCE E/W CYCLES DATA RETENTION YEARS

PCF8582C-2; PCA8582F-2 500000

Note

1. At the time of publication of this data sheet the statistical history was not yet sufficient to guarantee 1000000000 E/W
cycle performance for these types.

December 1994 3

(1)

40

Philips Semiconductors Product specification

handbook, full pagewidth

MBC794

TEST MODE DECODER

POWER - ON RESET

I C - BUS CONTROL LOGIC

2

SEQUENCER

ADDRESS

HIGH

REGISTER

BYTE

COUNTER

DIVIDER

( 128)

EE

CONTROL

TIMER

( 16)

EEPROM

ADDRESS

POINTER

BYTE

LATCH

(8 bytes)

SHIFT

REGISTER

ADDRESS

SWITCH

INPUT

FILTER

OSCILLATOR

8

4

3

n

7

PTC

PCX8582X-2

4

V

SS

A1

A2

A0

321

8

V

DD

6

5

SCL

SDA

Fig.1 Block diagram.

256 x 8-bit CMOS EEPROMS

2

with I

BLOCK DIAGRAM

C-bus interface

PCX8582X-2 Family

December 1994 4

Philips Semiconductors Product specification

Fig.2 Pin configuration.

handbook, halfpage

1
2
3
4

8
7
6
5

A0
A1
A2

V

SS

SDA

SCL

PTC

V

DD

PCX8582X-2

MBC792

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

PINNING

SYMBOL PIN DESCRIPTION

A0 1 address input 0
A1 2 address input 1
A2 3 address input 2
V

SS

4 negative supply voltage
SDA 5 serial data input/output (I2C-bus)
SCL 6 serial clock input (I2C-bus)
PTC 7 programming time control output
V

DD

8 positive supply voltage

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

V

I

I

I

I

O

T

stg

T

amb

supply voltage −0.3 +7.0 V
voltage on any input pin |ZI| > 500 Ω VSS− 0.8 VDD+ 0.8 V
current on any input pin − 1 mA
output current − 10 mA
storage temperature −65 +150 °C
operating ambient temperature

PCF8582C-2; PCF8582E-2 −40 +85 °C
PCD8582D-2 −25 +70 °C
PCA8582F-2 −40 +125 °C

PCX8582X-2 Family

December 1994 5

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

CHARACTERISTICS

PCF8582C-2: VDD= 2.5 to 6.0 V; VSS= 0 V; T
PCD8582D-2: V
PCF8582E-2: V
PCA8582F-2: V

= 3.0 to 6.0 V; VSS= 0 V; T

DD

= 4.5 to 5.5 V; VSS= 0 V; T

DD

= 4.5 to 5.5 V; VSS= 0 V; T

DD

= −40 to +85 °C; unless otherwise specified.

amb

= −25 to +70 °C; unless otherwise specified.

amb

= −40 to +85 °C; unless otherwise specified.

amb

= −40 to +125 °C; unless otherwise specified.

amb

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

Supplies

V

DD

supply voltage

PCF8582C-2 2.5 6.0 V
PCD8582D-2 3.0 6.0 V
PCF8582E-2; PCA8582F-2 4.5 5.5 V

I

DDR

supply current READ f

= 100 kHz

SCL

PCF8582C-2; PCD8582D-2 VDD= 3.0 V − 60 µA

VDD= 6.0 V − 200 µA

PCF8582E-2; PCA8582F-2 VDD= 5.5 V − 200 µA

I

DDW

supply current ERASE/WRITE f

= 100 kHz

SCL

PCF8582C-2; PCD8582D-2 VDD= 3.0 V − 0.6 mA

VDD= 6.0 V − 2.0 mA

PCF8582E-2; PCA8582F-2 VDD= 5.5 V − 2.0 mA

I

DDSB

supply current STANDBY f

= 100 kHz

SCL

PCF8582C-2; PCD8582D-2 VDD= 3.0 V − 3.5 µA

VDD= 6.0 V − 10 µA

PCF8582E-2; PCA8582F-2 VDD= 5.5 V − 10 µA

PTC input (pin 7)

V

IL

V

IH

LOW level input voltage −0.8 0.1V
HIGH level input voltage 0.9V

SCL input (pin 6)

V
V
I
f
C

IL

IH
LI
SCL

I

LOW level input voltage −0.8 0.3V
HIGH level input voltage 0.7V
input leakage current VI= VDDor V

SS

clock input frequency 0 100 kHz
input capacitance VI= V

SS

SDA input/output (pin 5)

V

IL

V

IH

V

OL

I

LO

C

I

LOW level input voltage −0.8 0.3V
HIGH level input voltage 0.7V
LOW level output voltage IOL= 3 mA; V
output leakage current VOH= V
input capacitance VI= V

DD(min)

DD

SS

Data retention time

t

S

data retention time T

= 55 °C 10 − years

amb

PCX8582X-2 Family

V

DD

VDD+ 0.8 V

DD

V

DD

VDD+ 0.8 V

DD

− ±1 µA

− 7 pF

V

DD

VDD+ 0.8 V

DD

− 0.4 V

− 1 µA

− 7 pF

December 1994 6

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

WRITE CYCLE LIMITS

Selection of the chip address is achieved by connecting the A0, A1 and A2 inputs to either VSS or VDD.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
ERASE/WRITE cycle timing

t

E/W

ERASE/WRITE cycle time

internal oscillator − 7 − ms
external clock 4 − 10 ms

Endurance

N

E/W

ERASE/WRITE cycle per byte

PCF8582C-2 T

PCD8582D-2 T

PCF8582E-2 T

PCA8582F-2 T

= 85 °C; t

amb

T

= 22 °C; t

amb

= −25 to +70 °C;

amb

t

= 4 to 10 ms

E/W

T

= −25 to +40 °C; t

amb

= −40 to +85 °C;

amb

t

= 4 to 10 ms

E/W

T

= 22 °C; t

amb

= 125 °C; t

amb

T

= 85 °C; t

amb

T

= 22 °C; t

amb

= 4 to 10 ms 100000 − − cycles

E/W

= 5 ms 500000 − − cycles

E/W

= 5 ms 100000 − − cycles

E/W

= 5 ms 100000 − − cycles

E/W

= 4 to 10 ms 50000 − − cycles

E/W

= 4 to 10 ms 100000 − − cycles

E/W

= 5 ms 500000 − − cycles

E/W

PCX8582X-2 Family

10000 − − cycles

10000 − − cycles

December 1994 7

Philips Semiconductors Product specification

Fig.3 Slave address.

handbook, halfpage

MBC793

1 0 1 0 A2 A1 A0 R/W

256 x 8-bit CMOS EEPROMS

2

with I

I2C-BUS PROTOCOL

The I2C-bus is for 2-way, 2-line communication between
different ICs or modules. The serial bus consists of two
bidirectional lines: one for data signals (SDA), and one for
clock signals (SCL).

Both the SDA and SCL lines must be connected to a
positive supply voltage via a pull-up resistor.

The following protocol has been defined:

• Data transfer may be initiated only when the bus is not
busy.

• During data transfer, the data line must remain stable
whenever the clock line is HIGH. Changes in the data
line while the clock line is HIGH will be interpreted as
control signals.

The following bus conditions have been defined:

• Bus not busy: both data and clock lines remain HIGH.

• Start data transfer: a change in the state of the data

line, from HIGH-to-LOW, while the clock is HIGH,
defines the start condition.

• Stop data transfer: a change in the state of the data
line, from LOW-to-HIGH, while the clock is HIGH,
defines the stop condition.

• Data valid: the state of the data line represents valid
data when, after a start condition, the data line is stable
for the duration of the HIGH period of the clock signal.
There is one clock pulse per bit of data.

Each data transfer is initiated with a start condition and
terminated with a stop condition; the number of the data
bytes, transferred between the start and stop conditions is
limited to seven bytes in the ERASE/WRITE mode and
eight bytes in the PAGE ERASE/WRITE mode. Data
transfer is unlimited in the READ mode. The information is
transmitted in bytes and each receiver acknowledges with
a ninth bit.

Within the I2C-bus specifications a low-speed mode (2 kHz
clock rate) and a high speed mode (100 kHz clock rate)
are defined.

The PCX8582X-2 operates in both modes.
By definition a device that sends a signal is called a

‘transmitter’, and the device which receives the signal is
called a ‘receive’. The device which controls the signal is
called the ‘master’. The devices that are controlled by the
master are called ‘slaves’.

C-bus interface

PCX8582X-2 Family

Each byte is followed by one acknowledge bit. This
acknowledge bit is a HIGH level, put on the bus by the
transmitter. The master generates an extra acknowledge
related clock pulse. The slave receiver which is addressed
is obliged to generate an acknowledge after the reception
of each byte.

The master receiver must generate an acknowledge after
the reception of each byte that has been clocked out of the
slave transmitter.

The device that acknowledges has to pull down the SDA
line during the acknowledge clock pulse in such a way that
the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse.

Set-up and hold times must be taken into account. A
master receiver must signal an end of data to the slave
transmitter by not generating an acknowledge on the last
byte that has been clocked out of the slave. In this event
the transmitter must leave the data line HIGH to enable the
master generation of the stop condition.

DEVICE ADDRESSING

Following a start condition the bus master must output the
address of the slave it is accessing. The most significant
four bits of the slave address are the device type identifier
(see Fig.3). For the PCX8582X-2 this is fixed as 1010.

The next three significant bits address a particular device.
A system could have up to eight PCX8582X-2 devices on
the bus. The eight addresses are defined by the state of
the A0, A1 and A2 inputs.

The last bit of the slave address defines the operation to
be performed. When set to logic 1 a read operation is
selected.

Address bits must be connected to either VDD or VSS.

December 1994 8

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

WRITE OPERATIONS
Byte/word write

For a write operation the PCX8582X-2 requires a second
address field. This address field is a word address
providing access to the 256 words of memory. Upon
receipt of the word address the PCX8582X-2 responds
with an acknowledge and awaits the next eight bits of data,
again responding with an acknowledge. Word address is
automatically incremented. The master can now terminate
the transfer by generating a stop condition or transmit up
to six more bytes of data and then terminate by generating
a stop condition.

After this stop condition the ERASE/WRITE cycle starts
and the bus is free for another transmission. Its duration is
7 ms (typ.) per byte.

During the ERASE/WRITE cycle the slave receiver does
not send an acknowledge bit if addressed via the I

C-bus interface

2

C-bus.

PCX8582X-2 Family

PAGE WRITE

The PCX8582X-2 is capable of an eight-byte page write
operation. It is initiated in the same manner as the byte
write operation. The master can transmit eight data bytes
within one transmission. After receipt of each byte the
PCX8582X-2 will respond with an acknowledge. The
typical ERASE/WRITE time in this mode is
9 × 7 ms = 63 ms.

After the receipt of each data byte the three low order bits
of the word address are internally incremented. The high
order five bits of the address remain unchanged. If the
master transmits more than eight bytes prior to generating
the stop condition, no acknowledge will be given on the
ninth (and following) data bytes and the whole
transmission will be ignored. As in the byte write operation,
all inputs are disabled until completion of the internal write
cycles.

December 1994 9

Philips Semiconductors Product specification

Fig.4 Auto increment memory word address; two byte write.

S

0 A

SLAVE ADDRESS WORD ADDRESS

A ADATA P

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

ADATA

R/W

auto increment

word address

auto increment

word address

MBA701

Fig.5 Page write operation; eight byte.

handbook, full pagewidth

S 0 ASLAVE ADDRESS WORD ADDRESS A A

DATA N

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

R/W

auto increment

word address

acknowledge

from slave

A

DATA N + 1

auto increment

word address

MBA702

A

acknowledge

from slave

1DATA N + 7

auto increment

word address

last byte

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

PCX8582X-2 Family

December 1994 10

Philips Semiconductors Product specification

Fig.6 Master reads PCX8582X-2 slave after setting word address (WRITE word address; READ data).

handbook, full pagewidth

S 0 ASLAVE ADDRESS WORD ADDRESS A A

SLAVE ADDRESS

acknowledge

from slave

acknowledge

from slave

acknowledge

from slave

R/W

acknowledge

from master

A

DATA

auto increment

word address

MBA703 - 1

P

no acknowledge

from master

1DATA

auto increment

word address

last byte

R/W

S 1

n bytes

at this moment master
transmitter becomes
master receiver and
EEPROM slave receiver
becomes slave transmitter

Fig.7 Master reads PCX8582X-2 immediately after first byte (READ mode).

handbook, full pagewidth

S

1 A

SLAVE ADDRESS DATA

A 1DATA

acknowledge

from slave

acknowledge

from master

no acknowledge

from master

R/W

auto increment

word address

MBA704 - 1

auto increment

word address

n bytes last bytes

P

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

READ OPERATIONS

Read operations are initiated in the same manner as write operations with the exception that the LSB of the slave address
is set to logic 1. There are three basic read operations; current address read, random read and sequential read.

PCX8582X-2 Family

December 1994 11

Philips Semiconductors Product specification

handbook, full pagewidth

MBA705

t

BUF

HD;STA

t

SCL

SDA

P S

t

LOW

t

r

HD;DAT

t

SU;DAT

t

t

f

t

HIGH

S

HD;STA

t

SU;STA

t

SU;STO

t

P

Fig.8 Timing requirements for the I

2

C-bus.

256 x 8-bit CMOS EEPROMS

2

with I

I2C-BUS TIMING

C-bus interface

PCX8582X-2 Family

December 1994 12

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

I2C-BUS CHARACTERISTICS

All of the timing values are valid within the operating supply voltage and ambient temperature range and refer to VIL and
VIH with an input voltage swing from VSS to VDD.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

f

SCL

t

BUF

t

HD;STA

t

LOW

t

HIGH

t

SU;STA

t

HD;DAT

t

HD;DAT

t

SU;DAT

t

r

t

f

t

SU;STO

clock frequency 0 100 kHz
time the bus must be free before new transmission can start 4.7 − µs
start condition hold time after which first clock pulse is generated 4.0 − µs
LOW level clock period 4.7 − µs
HIGH level clock period 4.0 − µs
set-up time for start condition repeated start 4.7 − µs
data hold time for bus compatible masters 5 − µs
data hold time for bus devices note 1 0 − ns
data set-up time 250 − ns
SDA and SCL rise time − 1 µs
SDA and SCL fall time − 300 ns
set-up time for stop condition 4.7 − µs

Note

1. The hold time required (not greater than 300 ns) to bridge the undefined region of the falling edge of SCL must be

internally provided by a transmitter.

PCX8582X-2 Family

December 1994 13

Philips Semiconductors Product specification

Fig.9 One byte ERASE/WRITE cycle.

handbook, full pagewidth

tdt

HIGH

f

t

r

t

LOW

t

STOP

1 2

257

PTC

SDA

SCL

MBA697

Fig.10 n byte ERASE/WRITE cycle (n = 2 to 7).

handbook, full pagewidth

tdt

HIGH

f

t

r

t

LOW

t

STOP

1 2PTC

SDA

SCL

MBA698

n x 256 + 1

Fig.11 Page mode.

handbook, full pagewidth

tdt

HIGH

f

t

r

t

LOW

t

STOP

1 2PTC

SDA

SCL

MBA699

1153

256 x 8-bit CMOS EEPROMS

2

with I

EXTERNAL CLOCK TIMING

C-bus interface

PCX8582X-2 Family

December 1994 14

Philips Semiconductors Product specification

Fig.12 External clock.

(1) If an external clock is chosen, this information is latched internally by setting pin 7 (PTC) LOW

after transmission of the eighth bit of the word address (negative edge of SCL).

Thus the state of pin 7 may be previously undefined. Leaving pin 7 LOW causes a higher standby current.
(2) 1-byte programming.
(3) 2-byte programming.
(4) One page (8 byte) programming.

handbook, full pagewidth

S

0 A A DATA A DATA A

P

SLAVE ADDRESS WORD ADDRESS

(1)

undefined

1
1
1

2
2
2

257
513

1153

clock (2)
clock (3)
clock (4)

d

t 0

negative edge

SCL 8-bit

undefined

LOW

HIGH

PTC

2

I C-bus

MBA700

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

PCX8582X-2 Family

December 1994 15

Philips Semiconductors Product specification

Fig.13 Plastic dual in-line package; 8 leads (300 mil) DIP8; SOT97-1.

Dimensions in mm.

handbook, full pagewidth

8.25

7.80

0.38 max

10.0

8.3

7.62

MSA252 - 1

6.48

6.20

1.73 max

5

8

41

1.15
max

0.53
max

0.254 M

3.2

max

4.2

max

3.60

3.05

9.8

9.2

2.54
(3x)

0.51
min

seating plane

256 x 8-bit CMOS EEPROMS

2

with I

PACKAGE OUTLINES

C-bus interface

PCX8582X-2 Family

December 1994 16

Philips Semiconductors Product specification

Fig.14 Plastic small outline package; 8 leads; body width 3.9 mm (SO8; SOT96-1).

Dimensions in mm.

handbook, full pagewidth

pin 1
index

0.7

0.3

0.49

0.36

1.27

0.25 M
(8x)

1

4

5

0.1 SS

5.0

4.8

4.0

3.8

6.2

5.8

A

8

MBC180 - 1

0.25

0.19

0.7

0.6

1.75

1.35

1.45

1.25

detail A

1.0

0.5

0.25

0.10

0 to 8

o

256 x 8-bit CMOS EEPROMS

2

with I

C-bus interface

PCX8582X-2 Family

December 1994 17

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

SOLDERING
Plastic dual in-line packages

B

Y DIP OR WAVE

The maximum permissible temperature of the solder is
260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

REPAIRING SOLDERED JOINTS
Apply a low-voltage soldering iron below the seating plane

(or not more than 2 mm above it). If its temperature is
below 300 °C, it must not be in contact for more than 10 s;
if between 300 and 400 °C, for not more than 5 s.

Plastic small-outline packages

BY WAVE
During placement and before soldering, the component

must be fixed with a droplet of adhesive. After curing the
adhesive, the component can be soldered. The adhesive
can be applied by screen printing, pin transfer or syringe
dispensing.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder bath is
10 s, if allowed to cool to less than 150 °C within 6 s.
Typical dwell time is 4 s at 250 °C.

A modified wave soldering technique is recommended
using two solder waves (dual-wave), in which a turbulent
wave with high upward pressure is followed by a smooth
laminar wave. Using a mildly-activated flux eliminates the
need for removal of corrosive residues in most
applications.

C-bus interface

PCX8582X-2 Family

Y SOLDER PASTE REFLOW

B
Reflow soldering requires the solder paste (a suspension

of fine solder particles, flux and binding agent) to be
applied to the substrate by screen printing, stencilling or
pressure-syringe dispensing before device placement.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt, infrared, and
vapour-phase reflow. Dwell times vary between 50 and
300 s according to method. Typical reflow temperatures
range from 215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 min at 45 °C.

R

EPAIRING SOLDERED JOINTS (BY HAND-HELD SOLDERING

IRON OR PULSE

Fix the component by first soldering two, diagonally
opposite, end pins. Apply the heating tool to the flat part of
the pin only. Contact time must be limited to 10 s at up to
300 °C. When using proper tools, all other pins can be
soldered in one operation within 2 to 5 s at between 270
and 320 °C. (Pulse-heated soldering is not recommended
for SO packages.)

For pulse-heated solder tool (resistance) soldering of VSO
packages, solder is applied to the substrate by dipping or
by an extra thick tin/lead plating before package
placement.

-HEATED SOLDER TOOL)

December 1994 18

Philips Semiconductors Product specification

256 x 8-bit CMOS EEPROMS

2

with I

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

C-bus interface

2

C COMPONENTS

PCX8582X-2 Family

2

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

December 1994 19

C components conveys a license under the Philips’ I2C patent to use the

Philips Semiconductors – a worldwide company

Argentina: IEROD, Av. Juramento 1992 - 14.b, (1428)

BUENOS AIRES, Tel. [phone], Fax. [phone]

Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]

Austria: Triester Str. 64, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]

Belgium: Postbus 90050, 5600 PB EINDHOVEN, The Netherlands,

Tel. [phone], Fax. [phone]

Brazil: Rua do Rocio 220 - 5

CEP: 04552-903-SÃO PAULO-SP, Brazil.
P.O. Box 7383 (01064-970).
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS:

Tel. [phone], Fax. [phone]

Chile: Av. Santa Maria 0760, SANTIAGO,

Tel. [phone], Fax. [phone]

Colombia: IPRELENSO LTDA, Carrera 21 No. 56-17,

77621 BOGOTA, Tel. [phone],
Fax. [phone]

Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]

Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]

France: 4 Rue du Port-aux-Vins, BP317,

92156 SURESNES Cedex,
Tel. [phone], Fax. [phone]

Germany: P.O. Box 10 63 23, 20043 HAMBURG,

Tel. [phone], Fax. [phone].

Greece: No. 15, 25th March Street, GR 17778 TAVROS,

Tel. [phone] 911, Fax. [phone]

Hong Kong: PHILIPS HONG KONG Ltd., 6/F Philips Ind. Bldg.,

24-28 Kung Yip St., KWAI CHUNG, N.T.,
Tel. [phone], Fax. [phone]

India: Philips INDIA Ltd, Shivsagar Estate, A Block ,

Dr. Annie Besant Rd. Worli, Bombay 400 018
Tel. [phone], Fax. [phone]

Indonesia: Philips House, Jalan H.R. Rasuna Said Kav. 3-4,

P.O. Box 4252, JAKARTA 12950,
Tel. [phone], Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS S.r.l.,

Piazza IV Novembre 3, 20124 MILANO,
Tel. [phone], Fax. [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]

Korea: (Republic of) Philips House, 260-199 Itaewon-dong,

Yongsan-ku, SEOUL, Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA,

SELANGOR, Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TX 79905,

Tel. [phone], Fax. [phone]

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB

Tel. [phone], Fax. [phone]

New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]

Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

th

floor, Suite 51,

Pakistan: Philips Electrical Industries of Pakistan Ltd.,

Exchange Bldg. ST-2/A, Block 9, KDA Scheme 5, Clifton,
KARACHI 75600, Tel. [phone],
Fax. [phone].

Philippines: PHILIPS SEMICONDUCTORS PHILIPPINES Inc,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Portugal: PHILIPS PORTUGUESA, S.A.,

Rua dr. António Loureiro Borges 5, Arquiparque - Miraflores,
Apartado 300, 2795 LINDA-A-VELHA,
Tel. [phone], Fax. [phone].

Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

South Africa: S.A. PHILIPS Pty Ltd.,

195-215 Main Road Martindale, 2092 JOHANNESBURG,
P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone].

Spain: Balmes 22, 08007 BARCELONA,

Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla. S-164 85 STOCKHOLM,

Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,

Tel. [phone], Fax. [phone]

Taiwan: PHILIPS TAIWAN Ltd., 23-30F, 66, Chung Hsiao West

Road, Sec. 1. Taipeh, Taiwan ROC, P.O. Box 22978,
TAIPEI 100, Tel. [phone], Fax. [phone].

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,

209/2 Sanpavuth-Bangna Road Prakanong,
Bangkok 10260, THAILAND,
Tel. [phone], Fax. [phone].

Turkey:Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,

Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors LTD.,

276 Bath Road, Hayes, MIDDLESEX UB3 5BX,
Tel. [phone], Fax. [phone]

United States:811 East Arques Avenue, SUNNYVALE,

CA 94088-3409, Tel. [phone], Fax. [phone]

Uruguay: Coronel Mora 433, MONTEVIDEO,

Tel. [phone], Fax. [phone]

For all other countries apply to: Philips Semiconductors,
International Marketing and Sales, Building BE-p,
P.O. Box 218, 5600 MD, EINDHOVEN, The Netherlands,
Telex 35000 phtcnl, Fax. [phone]

SCD36 © Philips Electronics N.V. 1994

All rights are reserved. Reproduction in whole or in part is prohibited without the
prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation
or contract, is believed to be accurate and reliable and may be changed without
notice. No liability will be accepted by the publisher for any consequence of its
use. Publication thereof does not convey nor imply any license under patent- or
other industrial or intellectual property rights.

Printed in The Netherlands

493061/1500/02/pp20 Date of release: December 1994
Document order number: 9397 743 70011

Philips Semiconductors