The PA19 is a high voltage, high current operational amplifier optimized to drive a variety of loads from DC through the
video frequency range. Excellent input accuracy is achieved
with a dual monolithic FET input transistor which is cascoded
by two high voltage transistors to provide outstanding common mode characteristics. All internal current and voltage
levels are referenced to a zener diode biased on by a current
source. As a result, the PA19 exhibits superior DC and AC
stability over a wide supply and temperature range.
High speed and freedom from second breakdown is assured by a complementary power MOS output stage. For
optimum linearity, especially at low levels, the power MOS
transistors are biased in a class A/B mode. Thermal shutoff
provides full protection against overheating and limits the
heatsink requirements to dissipate the internal power losses
under normal operating conditions. A built-in current limit of
0.5A can be increased with the addition of two external
resistors. Transient inductive load kickback protection is provided by two internal clamping diodes. External phase compensation allows the user maximum flexibility in obtaining the
optimum slew rate and gain bandwidth product at all gain
settings. A heatsink of proper rating is recommended.
This hybrid circuit utilizes thick film (cermet) resistors,
ceramic capacitors, and silicon semiconductor chips to maximize reliability, minimize size, and give top performance.
Ultrasonically bonded aluminum wires provide reliable interconnections at all operating temperatures. The 8-pin TO-3
package is hermetically sealed and electrically isolated. The
use of compressible thermal washers and/or improper mounting torque will void the product warranty. Please see “General
Operating Considerations”.
PA19 • PA19A
TYPICAL APPLICATION
This fast power driver utilizes the 900V/µs slew rate of the
PA19 and provides a unique interface with a current output
DAC. By using the DAC’s internal 1KΩ feedback resistor,
temperature drift errors are minimized, since the temperature
drift coefficients of the internal current source and the internal
feedback resistor of the DAC are closely matched. Gain of
to IIN is –6.5/mA. The DAC’s internal 1K resistor together
V
OUT
with the external 500Ω and 110Ω form a “tee network” in the
feedback path around the PA19. This effective resistance
equals 6.5KΩ . Therefore the entire circuit can be modeled as
6.5KΩ feedback resistor from output to inverting input and a
5mA current source into the inverting input of the PA19. Now
we see the familiar current to voltage conversion for a DAC
where V
SUPPLY VOLTAGE, +VS to –V
OUTPUT CURRENT, within SOA5A
S
80V
POWER DISSIPATION, internal78W
INPUT VOLTAGE, differential40V
INPUT VOLTAGE, common mode±V
TEMPERATURE, pin solder — 10 sec300°C
TEMPERATURE, junction
1
S
150°C
TEMPERATURE, storage–65 to 155°C
OPERATING TEMPERATURE RANGE, case–55 to 125°C
SPECIFICATIONS
PARAMETERTEST CONDITIONS
PA19
2
MINTYPMAXMINTYPMAXUNITS
PA19A
INPUT
OFFSET VOLTAGE, initialTC = 25°C±.5±3±.25±.5mV
OFFSET VOLTAGE, vs. temperatureTC = 25°C to +85°C1030510µV/°C
OFFSET VOLTAGE, vs. supplyTC = 25°C10*µV/V
OFFSET VOLTAGE, vs. powerTC = 25°C to +85°C20*µV/W
BIAS CURRENT, initialTC = 25°C10200550pA
BIAS CURRENT, vs. supplyTC = 25°C.01*pA/V
OFFSET CURRENT, initialTC = 25°C5100325pA
INPUT IMPEDANCE, DCTC = 25°C10
11
*MΩ
INPUT CAPACITANCETC = 25°C6*pF
COMMON MODE VOLTAGE RANGE3TC = 25°C to +85°C±VS–15 ±VS–12**V
COMMON MODE REJECTION, DCTC = 25°C to +85°C, VCM = ±20V70104**dB
GAIN
OPEN LOOP GAIN at 10HzTC = 25°C, RL = 1KΩ111*dB
OPEN LOOP GAIN at 10HzTC = 25°C, RL = 15Ω7478**dB
GAIN BANDWIDTH PRODUCT at 1MHz TC = 25°C, CC = 2.2pF100*MHz
POWER BANDWIDTH, AV = 100TC = 25°C, CC = 2.2pF3.5*MHz
POWER BANDWIDTH, AV = 1TC = 25°C, CC = 330pF250*kHz
TC = 25°C to +85°C, IO = 78mA±VS–1 ±VS–.5**V
SETTLING TIME to .1%TC = 25°C, 2V step.3*µs
SETTLING TIME to .01%TC = 25°C, 2V step1.2*µs
SLEW RATE, AV = 100TC = 25°C, CC = 2.2pF600900 800*V/µs
SLEW RATE, AV = 10TC = 25°C, CC = 22pF650*V/µs
POWER SUPPLY
VOLTAGETC = 25°C to +85°C±15±35±40***V
CURRENT, quiescentTC = 25°C100120**mA
THERMAL
RESISTANCE, AC, junction to case
4
TC = 25°C to +85°C, F > 60Hz1.21.3**°C/W
RESISTANCE, DC, junction to caseTC = 25°C to +85°C, F < 60Hz1.61.8**°C/W
RESISTANCE, junction to airTC = 25°C to +85°C30*°C/W
TEMPERATURE RANGE, caseMeets full range specifications–25+85**°C
NOTES: *The specification of PA19A is identical to the specification for PA19 in applicable column to the left.
1.Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation
to achieve high MTTF.
2.The power supply voltage for all specifications is the TYP rating unless noted as a test condition.
3.+VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
4.Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or
subject to temperatures in excess of 850°C to avoid generating toxic fumes.
Please read the “General Operating Considerations” section, which
covers stability, supplies, heatsinking, mounting, current limit, SOA
interpretation, and specification interpretation. Additional information
can be found in the application notes. For information on the package
outline, heatsinks, and mounting hardware, consult the “Accessory
and Package Mechanical Data” section of the handbook.
CURRENT LIMIT
Q2 (and Q25) limit output current by turning on and removing gate
drive when voltage on pin 2 (pin 7) exceeds .65V differential from the
positive (negative) supply rail. With internal resistors equal to 1.2Ω,
current limits are approximately 0.5A with no external current limit
resistors. With the addition of external resistors current limit will be:
.65V
I
= +.54A
LIM
R
To determine values of external current limit resistors:
CL
RCL =
.65V
I
CL
– .54A
PHASE COMPENSATION
At low gain settings, an external compensation capacitor is required
to insure stability. In addition to the resistive feedback network, roll off
or integrating capacitors must also be considered when determining
gain settings. The capacitance values listed in the external connection
diagram, along with good high frequency layout practice, will insure
stability. Interpolate values for intermediate gain settings.
SAFE OPERATING AREA (SOA)
The MOSFET output stage of this power operational amplifier has
two distinct limitations:
1. The current handling capability of the MOSFET geometry and the
wire bonds.
2. The junction temperature of the output MOSFETs.
5.0
(A)
S
4.0
3.5
OR –V
S
3.0
2.5
2.0
1.5
15
OUTPUT CURRENT FROM ±V
INTERNAL VOLTAGE DROP SUPPLY TO OUTPUT VS–VO(V)
20
STEADY STATE
30
25
35
The SOA curves combine the effect of these limits and allow for
internal thermal delays. For a given application, the direction and
magnitude of the output current should be calculated or measured and
checked against the SOA curves. This is simple for resistive loads but
more complex for reactive and EMF generating loads. The following
guidelines may save extensive analytical efforts:
1. Capacitive and inductive loads up to the following maximums are
safe:
±V
S
CAPACITIVE LOADINDUCTIVE LOAD
40V.1µF11mH
30V500µF24mH
20V2500µF75mH
15V∞100mH
t = 300ms
40
TC = 25°C
t = 100ms
50
706080
2. Safe short circuit combinations of voltage and current are limited to
a power level of 100W.
3. The output stage is protected against transient flyback. However,
for protection against sustained, high energy flyback, external fastrecovery diodes should be used.
SUPPLY CURRENT
The PA19 features a class A/B driver stage to charge and discharge
gate capacitance of Q7 and Q19. As these currents approach 0.5A, the
savings of quiescent current over that of a class A driver stage is
considerable. However, supply current drawn by the PA19, even with
no load, varies with slew rate of the output signal as shown below.
400
(mA)
S
300
SUPPLY CURRENT
V
= 60V
OUT
RL = 500
P–P
SINE
Ω
200
100
0
SUPPLY CURRENT, I
30K 100K300K 1M 3M 10M
FREQUENCY, F
OUTPUT LEADS
Keep the output leads as short as possible. In the video frequency
range, even a few inches of wire have significant inductances, raising
the interconnection impedance and limiting the output current slew
rate. Furthermore, the skin effect increases the resistance of heavy
wires at high frequencies. Multistrand Litz Wire is recommended to
carry large video currents with low losses.
THERMAL SHUTDOWN
The thermal protection circuit shuts off the amplifier when the
substrate temperature exceeds approximately 150°C. This allows the
heatsink selection to be based on normal operating conditions while
protecting the amplifier against excessive junction temperature during
temporary fault conditions.
Thermal protection is a fairly slow-acting circuit and therefore does
not protect the amplifier against transient SOA violations (areas
outside of the steady state boundary). It is designed to protect against
short-term fault conditions that result in high power dissipation within
the amplifier. If the conditions that cause thermal shutdown are not
removed, the amplifier will oscillate in and out of shutdown. This will
result in high peak power stresses, destroy signal integrity, and reduce
the reliability of the device.
STABILITY
Due to its large bandwidth, the PA19 is more likely to oscillate than
lower bandwidth power operational amplifiers. To prevent oscillations
a reasonable phrase margin must be maintained by:
1. Selection of the proper phase compensation capacitor. Use the
values given in the table under external connections and interpolate if necessary. The phase margin can be increased by using a
larger capacitor at the expense of slew rate. Total physical length
(pins of the PA19, capacitor leads plus printed circuit traces) should
be limited to a maximum of 3.5 inches.
2. Keep the external sumpoint stray capacitance to ground at a
minimum and the sumpoint load resistance (input and feedback
resistors in parallel) below 500Ω. Larger sumpoint load resistances
can be used with increased phase compensation and/or by bypassing the feedback resistor.
3. Connect the case to any AC ground potential.
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739