Datasheet PA19A, PA19 Datasheet (Apex)

Page 1
VIDEO POWER OPERATIONAL AMPLIFIERS
MICROTECHNOLOGY
HTTP://WWW.APEXMICROTECH.COM (800) 546-APEX (800) 546-2739
FEA TURES
• VERY FAST SLEW RATE — 900 V/µs
• POWER MOS TECHNOLOGY — 4A peak rating
• LOW INTERNAL LOSSES — 2V at 2A
• PROTECTED OUTPUT STAGE — Thermal Shutoff
• WIDE SUPPLY RANGE — ±15V TO ±40V
APPLICATIONS
• HIGH SPEED DEFLECTION CIRCUITS
• POWER TRANSDUCERS UP TO 5 MHz
• MODULATION OF RF POWER STAGES
• POWER LED OR LASER DIODE EXCITATION
DESCRIPTION
The PA19 is a high voltage, high current operational ampli­fier optimized to drive a variety of loads from DC through the video frequency range. Excellent input accuracy is achieved with a dual monolithic FET input transistor which is cascoded by two high voltage transistors to provide outstanding com­mon mode characteristics. All internal current and voltage levels are referenced to a zener diode biased on by a current source. As a result, the PA19 exhibits superior DC and AC stability over a wide supply and temperature range.
High speed and freedom from second breakdown is as­sured by a complementary power MOS output stage. For optimum linearity, especially at low levels, the power MOS transistors are biased in a class A/B mode. Thermal shutoff provides full protection against overheating and limits the heatsink requirements to dissipate the internal power losses under normal operating conditions. A built-in current limit of
0.5A can be increased with the addition of two external resistors. Transient inductive load kickback protection is pro­vided by two internal clamping diodes. External phase com­pensation allows the user maximum flexibility in obtaining the optimum slew rate and gain bandwidth product at all gain settings. A heatsink of proper rating is recommended.
This hybrid circuit utilizes thick film (cermet) resistors, ceramic capacitors, and silicon semiconductor chips to maxi­mize reliability, minimize size, and give top performance. Ultrasonically bonded aluminum wires provide reliable inter­connections at all operating temperatures. The 8-pin TO-3 package is hermetically sealed and electrically isolated. The use of compressible thermal washers and/or improper mount­ing torque will void the product warranty. Please see “General Operating Considerations”.
PA19 • PA19A
TYPICAL APPLICATION
This fast power driver utilizes the 900V/µs slew rate of the PA19 and provides a unique interface with a current output DAC. By using the DAC’s internal 1K feedback resistor, temperature drift errors are minimized, since the temperature drift coefficients of the internal current source and the internal feedback resistor of the DAC are closely matched. Gain of
to IIN is –6.5/mA. The DAC’s internal 1K resistor together
V
OUT
with the external 500 and 110 form a “tee network” in the feedback path around the PA19. This effective resistance equals 6.5K . Therefore the entire circuit can be modeled as
6.5K feedback resistor from output to inverting input and a 5mA current source into the inverting input of the PA19. Now we see the familiar current to voltage conversion for a DAC where V
EQUIVALENT SCHEMATIC
3
Q3
8
Q12
5
Q17A
4
6
OUT
Q5
Q23
= –IIN x R
Q4
Q10
Q13
Q17B
FEEDBACK
Q16
Q8
.
Q11
D2
Q20
D1
Q24
Q25
Q1
Q9
Q15
Q2
Q21
Q22
2
Q7
1
Q19
7
TYPICAL
+40V
110
APPLICATION
R
PA19
–40V
CL+
5.6pF
R
CL–
±5mA
1K
DAC
PA19 AS FAST POWER DRIVER
APEX MICROTECHNOLOGY CORPORATION • TELEPHONE (520) 690-8600 • FAX (520) 888-3329 • ORDERS (520) 690-8601 • EMAIL prodlit@apexmicrotech.com
500
±32.5V
Up to 4A
EXTERNAL CONNECTIONS
R
CL+
+V
+IN
–IN
–V
2
3
4
TOP
VIEW
5
6
OUT
1
C
C
8
7
R
CL–
PHASE COMPENSATION
GAIN
100
1000
10
C
C
330pF
1
22pF
2.2pF none
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P A19 • P A19A
ABSOLUTE MAXIMUM RATINGS
SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
SUPPLY VOLTAGE, +VS to –V OUTPUT CURRENT, within SOA 5A
S
80V
POWER DISSIPATION, internal 78W INPUT VOLTAGE, differential 40V INPUT VOLTAGE, common mode ±V TEMPERATURE, pin solder — 10 sec 300°C TEMPERATURE, junction
1
S
150°C TEMPERATURE, storage –65 to 155°C OPERATING TEMPERATURE RANGE, case –55 to 125°C
SPECIFICATIONS
PARAMETER TEST CONDITIONS
PA19
2
MIN TYP MAX MIN TYP MAX UNITS
PA19A
INPUT
OFFSET VOLTAGE, initial TC = 25°C ±.5 ±3 ±.25 ±.5 mV OFFSET VOLTAGE, vs. temperature TC = 25°C to +85°C1030510µV/°C OFFSET VOLTAGE, vs. supply TC = 25°C10*µV/V OFFSET VOLTAGE, vs. power TC = 25°C to +85°C20*µV/W BIAS CURRENT, initial TC = 25°C 10 200 5 50 pA BIAS CURRENT, vs. supply TC = 25°C .01 * pA/V OFFSET CURRENT, initial TC = 25°C 5 100 3 25 pA INPUT IMPEDANCE, DC TC = 25°C10
11
*M INPUT CAPACITANCE TC = 25°C6*pF COMMON MODE VOLTAGE RANGE3TC = 25°C to +85°C ±VS–15 ±VS–12 * * V COMMON MODE REJECTION, DC TC = 25°C to +85°C, VCM = ±20V 70 104 * * dB
GAIN
OPEN LOOP GAIN at 10Hz TC = 25°C, RL = 1K 111 * dB OPEN LOOP GAIN at 10Hz TC = 25°C, RL = 15 74 78 * * dB GAIN BANDWIDTH PRODUCT at 1MHz TC = 25°C, CC = 2.2pF 100 * MHz POWER BANDWIDTH, AV = 100 TC = 25°C, CC = 2.2pF 3.5 * MHz POWER BANDWIDTH, AV = 1 TC = 25°C, CC = 330pF 250 * kHz
OUTPUT
VOLTAGE SWING VOLTAGE SWING VOLTAGE SWING
3 3 3
TC = 25°C, IO = 4A ±VS–5 ±VS–4 * * V TC = 25°C to +85°C, IO = 2A ±VS–3 ±VS–2 * * V
TC = 25°C to +85°C, IO = 78mA ±VS–1 ±VS–.5 * * V SETTLING TIME to .1% TC = 25°C, 2V step .3 * µs SETTLING TIME to .01% TC = 25°C, 2V step 1.2 * µs SLEW RATE, AV = 100 TC = 25°C, CC = 2.2pF 600 900 800 * V/µs SLEW RATE, AV = 10 TC = 25°C, CC = 22pF 650 * V/µs
POWER SUPPLY
VOLTAGE TC = 25°C to +85°C ±15 ±35 ±40 * * * V CURRENT, quiescent TC = 25°C 100 120 * * mA
THERMAL
RESISTANCE, AC, junction to case
4
TC = 25°C to +85°C, F > 60Hz 1.2 1.3 * * °C/W RESISTANCE, DC, junction to case TC = 25°C to +85°C, F < 60Hz 1.6 1.8 * * °C/W RESISTANCE, junction to air TC = 25°C to +85°C30*°C/W TEMPERATURE RANGE, case Meets full range specifications –25 +85 * * °C
NOTES: * The specification of PA19A is identical to the specification for PA19 in applicable column to the left.
1. Long term operation at the maximum junction temperature will result in reduced product life. Derate internal power dissipation to achieve high MTTF.
2. The power supply voltage for all specifications is the TYP rating unless noted as a test condition.
3. +VS and –VS denote the positive and negative supply rail respectively. Total VS is measured from +VS to –VS.
4. Rating applies if the output current alternates between both output transistors at a rate faster than 60Hz.
CAUTION
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
The internal substrate contains beryllia (BeO). Do not break the seal. If accidentally broken, do not crush, machine, or subject to temperatures in excess of 850°C to avoid generating toxic fumes.
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TYPICAL PERFORMANCE GRAPHS
P A19 • P A19A
80 70 60 50 40 30 20 10
INTERNAL POWER DISSIPATION, P(W)
100
80
(dB)
OL
60
40
OPEN LOOP GAIN, A
–20
1000
800 600
400
POWER DERATING
0
0 25 50 75 100 125
CASE TEMPERATURE, TC (°C)
SMALL SIGNAL RESPONSE
2.2pF
22pF
330pF
20
0
1K 100K
100 100M
10K 1M 10M 5
FREQUENCY, F (Hz)
SLEW RATE VS. COMP.
RL = 15
150
3.5
3.0
(A)
2.5
LIM
2.0
1.5
1.0
CURRENT LIMIT, I
.5
0
4V
3V
2V
1V
VOLTAGE DROP FROM SUPPLY (V)
30 20
(V)
O
10
CURRENT LIMIT
R
CL
= 0.27
= 1.2
CL
R
R
=
CL
–50 100
–25 25 50 75
0
CASE TEMPERATURE, T
C
OUTPUT VOLTAGE SWING
+V
–V
0
1234
OUTPUT CURRENT, I
(A)
O
PULSE RESPONSE
VIN = ±2V
A
tr = 10ns
RL = 15
(°C)
= 10
V
QUIESCENT CURRENT
(X)
Q
1.6
1.4
1.2
1.0
.8
.6
125
30 60 80
TOTAL SUPPLY VOLTAGE, VS (V)
NORMALIZED QUIESCENT CURRENT, I
POWER RESPONSE
80 58
PP
RL = 15
41
O
30
21
15 11
OUTPUT VOLTAGE, V (V )
| +VS | + | –VS | = 80V
8
100K
200K
30
20
(nV/ Hz)
N
15
40 50 70
2M
C
C
= 22pF
4M
C
C
= 330pF
600K
1M
FREQUENCY, F (Hz)
INPUT NOISE
C
C
= 2.2pF
8M
20M
200
100
SLEW RATE, (V/µs)
80
40
24
COMPENSATION CAPACITOR, CC (pF)
COMMON MODE REJECTION
120
100
80
60
40
20
1K 10M
COMMOM MODE REJECTION, CMR (dB)
10
20
6
10K 100K
FREQUENCY, F (Hz)
100
40 200
60
1M
100M
400
0
–10
–20
OUTPUT VOLTAGE, V
–30
–50 0 50 100 150
POWER SUPPLY REJECTION
100
80
60
40
20
0
1K
POWER SUPPLY REJECTION, PSR (dB)
10K 100K 1M 100M
FREQUENCY, F (Hz)
200
TIME, t (ns)
250 300
10M
10
7 5
3
INPUT NOISE VOLTAGE, V
10 100 10K 1M
COMMON MODE VOLTAGE
)
70
P–P
(V
65
CM
60
55
50
45
40
10
COMMON MODE VOLTAGE, V
100 1K 10K 100K 1M
1K
FREQUENCY, F (Hz)
FREQUENCY, F (Hz)
100K
10M
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Page 4
P A19 • P A19A
(Hz)
OPERATING
CONSIDERATIONS
GENERAL
Please read the “General Operating Considerations” section, which covers stability, supplies, heatsinking, mounting, current limit, SOA interpretation, and specification interpretation. Additional information can be found in the application notes. For information on the package outline, heatsinks, and mounting hardware, consult the “Accessory and Package Mechanical Data” section of the handbook.
CURRENT LIMIT
Q2 (and Q25) limit output current by turning on and removing gate drive when voltage on pin 2 (pin 7) exceeds .65V differential from the positive (negative) supply rail. With internal resistors equal to 1.2, current limits are approximately 0.5A with no external current limit resistors. With the addition of external resistors current limit will be:
.65V
I
= +.54A
LIM
R
To determine values of external current limit resistors:
CL
RCL =
.65V
I
CL
– .54A
PHASE COMPENSATION
At low gain settings, an external compensation capacitor is required to insure stability. In addition to the resistive feedback network, roll off or integrating capacitors must also be considered when determining gain settings. The capacitance values listed in the external connection diagram, along with good high frequency layout practice, will insure stability. Interpolate values for intermediate gain settings.
SAFE OPERATING AREA (SOA)
The MOSFET output stage of this power operational amplifier has two distinct limitations:
1. The current handling capability of the MOSFET geometry and the
wire bonds.
2. The junction temperature of the output MOSFETs.
5.0
(A)
S
4.0
3.5
OR –V
S
3.0
2.5
2.0
1.5
15
OUTPUT CURRENT FROM ±V
INTERNAL VOLTAGE DROP SUPPLY TO OUTPUT VS–VO(V)
20
STEADY STATE
30
25
35
The SOA curves combine the effect of these limits and allow for internal thermal delays. For a given application, the direction and magnitude of the output current should be calculated or measured and checked against the SOA curves. This is simple for resistive loads but more complex for reactive and EMF generating loads. The following guidelines may save extensive analytical efforts:
1. Capacitive and inductive loads up to the following maximums are
safe:
±V
S
CAPACITIVE LOAD INDUCTIVE LOAD
40V .1µF 11mH 30V 500µF 24mH 20V 2500µF 75mH 15V 100mH
t = 300ms
40
TC = 25°C
t = 100ms
50
706080
2. Safe short circuit combinations of voltage and current are limited to a power level of 100W.
3. The output stage is protected against transient flyback. However, for protection against sustained, high energy flyback, external fast­recovery diodes should be used.
SUPPLY CURRENT
The PA19 features a class A/B driver stage to charge and discharge gate capacitance of Q7 and Q19. As these currents approach 0.5A, the savings of quiescent current over that of a class A driver stage is considerable. However, supply current drawn by the PA19, even with no load, varies with slew rate of the output signal as shown below.
400
(mA)
S
300
SUPPLY CURRENT
V
= 60V
OUT
RL = 500
P–P
SINE
200
100
0
SUPPLY CURRENT, I
30K 100K300K 1M 3M 10M
FREQUENCY, F
OUTPUT LEADS
Keep the output leads as short as possible. In the video frequency range, even a few inches of wire have significant inductances, raising the interconnection impedance and limiting the output current slew rate. Furthermore, the skin effect increases the resistance of heavy wires at high frequencies. Multistrand Litz Wire is recommended to carry large video currents with low losses.
THERMAL SHUTDOWN
The thermal protection circuit shuts off the amplifier when the substrate temperature exceeds approximately 150°C. This allows the heatsink selection to be based on normal operating conditions while protecting the amplifier against excessive junction temperature during temporary fault conditions.
Thermal protection is a fairly slow-acting circuit and therefore does not protect the amplifier against transient SOA violations (areas outside of the steady state boundary). It is designed to protect against short-term fault conditions that result in high power dissipation within the amplifier. If the conditions that cause thermal shutdown are not removed, the amplifier will oscillate in and out of shutdown. This will result in high peak power stresses, destroy signal integrity, and reduce
the reliability of the device.
STABILITY
Due to its large bandwidth, the PA19 is more likely to oscillate than lower bandwidth power operational amplifiers. To prevent oscillations a reasonable phrase margin must be maintained by:
1. Selection of the proper phase compensation capacitor. Use the
values given in the table under external connections and interpo­late if necessary. The phase margin can be increased by using a larger capacitor at the expense of slew rate. Total physical length (pins of the PA19, capacitor leads plus printed circuit traces) should be limited to a maximum of 3.5 inches.
2. Keep the external sumpoint stray capacitance to ground at a
minimum and the sumpoint load resistance (input and feedback resistors in parallel) below 500. Larger sumpoint load resistances can be used with increased phase compensation and/or by bypass­ing the feedback resistor.
3. Connect the case to any AC ground potential.
This data sheet has been carefully checked and is believed to be reliable, however, no responsibility is assumed for possible inaccuracies or omissions. All specifications are subject to change without notice.
APEX MICROTECHNOLOGY CORPORATION • 5980 NORTH SHANNON ROAD • TUCSON, ARIZONA 85741 • USA • APPLICATIONS HOTLINE: 1 (800) 546-2739
PA19U REV. H FEBRUARY 1998 © 1998 Apex Microtechnology Corp.
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