Datasheet P4C168-25SC, P4C168-35DM, P4C168-15JC, P4C168-20SC, P4C168-25DM Datasheet (NCE RFORM)

33

P4C168, P4C169, P4C170

P4C168, P4C169, P4C170
ULTRA HIGH SPEED 4K x 4

STATIC CMOS RAMS

DESCRIPTION

The P4C168, P4C169 and P4C170 are a family of 16,384­bit ultra high-speed static RAMs organized as 4K x 4. All
three devices have common input/output ports.The
P4C168 enters the standby mode when the chip enable
(CE) control goes high; with CMOS input levels, power
consumption is only 83mW in this mode. Both the P4C169
and the P4C170 offer a fast chip select access time that is
only 67% of the address access time. In addition, the
P4C170 includes an output enable (OE) control to elimi­nate data bus contention. The RAMs operate from a single
5V ± 10% tolerance power supply.

FEATURES

Full CMOS, 6T Cell
High Speed (Equal Access and Cycle Times)

– 12/15/20/25ns (Commercial)
– 20/25/35ns (P4C168 Military)

Low Power Operation (Commercial)
– 715 mW Active
– 193 mW Standby (TTL Input) P4C168
– 83 mW Standby (CMOS Input) P4C168

Single 5V±10% Power Supply

Fully TTL Compatible, Common I/O Ports
Three Options

– P4C168 Low Power Standby Mode
– P4C169 Fast Chip Select Control
– P4C170 Fast Chip Select, Output Enable

Controls
Standard Pinout (JEDEC Approved)
– P4C168: 20-pin DIP, SOJ and SOIC

– P4C169: 20-pin DIP and SOIC
– P4C170: 22-pin DIP

Access times as fast as 12 nanoseconds are available,
permitting greatly enhanced system operating speeds.
CMOS is used to reduce power consumption to a low 715
mW active, 193 mW standby.

The P4C168 and P4C169 are available in 20-pin (P4C170
in 22-pin) 300 mil DIP packages providing excellent board
level densities. The P4C168 is also available in 20-pin 300
mil SOIC and SOJ packages.

The P4C169 is also available in a 20-pin 300 mil SOIC
package. The P4C170 is also available in a 22-pin 300 mil
SOJ package.

PIN CONFIGURATIONS

FUNCTIONAL BLOCK DIAGRAM

1Q97

Means Quality, Service and Speed

INPUT

DATA

CONTROL

ROW

SELECT

16,384-BIT

MEMORY

ARRAY

COLUMN I/O

I/O

1

I/O

2

I/O

3

I/O

4

COLUMN

SELECT

POWER

DOWN

P4C168

ONLY

or

(7)

A

CEACS

OE

WE

AA

(5)

NOTES: CE USED ON P4C168 ALSO FOR POWER DOWN FUNCTIONS

CE USED ON P4C169 FAST CHIP SELECT
OE OUTPUT ENABLE FUNCTION ON P4C170 ONLY

P4C168 P4C169
DIP (P2, D2) DIP (P2)
SOIC (S2) SOIC (S2)
SOJ (J2)

TOP VIEW

P4C170

DIP (P3)

TOP VIEW

A

4

A

7

A

0

A

1

A

2

A

3

A

5

A

6

A

11

A

10

A

9

A

8

NC

I/O

4

V

CC

CS

GND

1
2
3
4
5
6
7
8
9
10
11

22
21
20
19
18
17
16
15
14
13
12

OE

I/O

3

I/O

2

I/O

1

WE

A

4

A

7

A

0

A

1

A

2

A

3

A

5

A

6

A

11

A

10

A

9

A

8

I/O

4

V

CC

CE, CS

GND

1
2
3
4
5
6
7
8
9
10

20
19
18
17
16
15
14
13
12
11

I/O

3

I/O

2

I/O

1

WE

P4C168, P4C169, P4C170

34

MAXIMUM RATINGS

(1)

Symbol Parameter Value Unit

V

CC

Power Supply Pin with –0.5 to +7 V
Respect to GND

Terminal Voltage with –0.5 to

V

TERM

Respect to GND VCC +0.5 V
(up to 7.0V)

T

A

Operating Temperature –55 to +125 °C

Symbol Parameter Value Unit

T

BIAS

Temperature Under –55 to +125 °C
Bias

T

STG

Storage Temperature –65 to +150 °C

P

T

Power Dissipation 1.0 W

I

OUT

DC Output Current 50 mA

Symbol Parameter Conditions Typ. Unit

C

IN

Input Capacitance VIN = 0V 5 pF

C

OUT

Output Capacitance V

OUT

= 0V 7 pF

RECOMMENDED OPERATING CONDITIONS

CAPACITANCES

(4)

(VCC = 5.0V, TA = 25°C, f = 1.0MHz)

Grade

(2)

Commercial
Military

Ambient Temp

0°C to 70°C

–55°C to +125°C

Gnd

0V
0V

V

CC

5.0V ± 10%

5.0V ± 10%

V

IH

V

IL

V

HC

V

LC

V

OH

I

LI

I

SB

I

SB1

Input High Voltage
Input Low Voltage

CMOS Input High Voltage
CMOS Input Low Voltage

Output Low Voltage
(TTL Load)

Output High Voltage
(CMOS Load)

Input Leakage Current

Output Leakage Current
Dynamic Operating

Current
Standby Power Supply

Current (TTL Input Levels)
P4C168 only

Standby Power
Supply Current
(CMOS Input Levels)
P4C168 only

Input Clamp Diode Voltage

Output Low Voltage
(CMOS Load)

Output High Voltage
(TTL Load)

Parameter

Symbol

Test Conditions

VCC = Min., IIN = –18 mA

V

CC

= Max., VIN = GND to V

CC

VCC = Max., CS = VIH,
V

OUT

= GND to V

CC

CE ≥ VIH, VCC = Max., f = Max.,
Outputs Open

CE ≥ VHC, VCC = Max., f = 0,
Outputs Open
VIN ≤ VLC or VIN ≥ V

HC

Mil.

Comm’l

Mil.

Comm’l

P4C168/169/170

Min

2.2

–0.5(3)

VCC –0.2

–0.5(3)

2.4

–10

–5

–10

–5

Max

VCC +0.5

0.8

VCC +0.5

0.2

+10

+5

+10

+5

Unit

V
V

V
V

–1.2

VV

CD

IOL = +8 mA, VCC = Min.

0.4

V

V

OL

I

OLC

= +100 µA, VCC = Min. 0.2 V

V

OLC

IOH = –4 mA, VCC = Min.

V

I

OHC

= –100 µA, VCC = Min.

VCC –0.2 V

V

OHC

µA

I

LO

µA

I

CC

35 mA

15

mA

___

___

VCC = Max., f = Max., Outputs Open

130

mA

___

DC ELECTRICAL CHARACTERISTICS

35

P4C168, P4C169, P4C170

AC CHARACTERISTICS—READ CYCLE

(VCC = 5V ± 10%, All Temperature Ranges)

(2)

Sym.

t

RC

t

AA

Parameter

Read Cycle Time
Address Access Time

–12 –15

–20

–25

Min Max Min Max Min Max Min Max Min Max

–35

Unit

12

12

15

15

20

25

35 ns

ns

20

25 35

Chip Enable Access Time

t

AC

§

12

15 20 25

35

ns

Chip Select Access Timet

AC

‡

8 9 12 15 20

ns

t

OH

Output Hold from Address Change 2

2

2

2

2ns

Chip Enable to Output in Low Z

t

LZ

‡

2

222

2

ns

Chip Disable to Output in High Z

t

HZ

†

6

79

10

15 ns

Output Enable to Data Valid

t

OE

†

812

10

15

15 ns

Output Enable to Output in Low Z

t

OLZ

†

00

0

00

ns

Output Disable to Output in High Zt

OHZ

†

6

79

11

15 ns

Read Command Setup Timet

RCS

00

0

00ns

Read Command Hold Time

t

RCH

0

0

0

00

ns

Chip Enable to Power Up Time

t

PU

§

0

0

000ns

Chip Disable to Power Down Time

t

PD

§

12 15

20

25 35 ns

§ P4C168 only
† P4C170 only
‡ Chip Select/Deselect for P4C169 and P4C170

TIMING WAVEFORM OF READ CYCLE NO. 1 (ADDRESS CONTROLLED)

(5,6)

t

ADDRESS

DATA OUT

AA

t

t

OH

DATA VALIDPREVIOUS DATA VALID

(9)

RC

Notes:

5. WE is HIGH for READ cycle.

6. CE/CS and OE are LOW for READ cycle.

P4C168, P4C169, P4C170

36

Notes:

7. ADDRESS must be valid prior to, or coincident with CE/CS transition
low. For Fast CS, t

AA

must still be met.

8. Transition is measured ±200mV from steady state voltage prior to
change, with loading as specified in Figure 1.

9. Read Cycle Time is measured from the last valid address to the first
transitioning address.

TIMING WAVEFORM OF READ CYCLE NO. 2 (

CECE

CECE

CE/

CSCS

CSCS

CS CONTROLLED)

(5,7)

TIMING WAVEFORM OF READ CYCLE NO. 3—P4C170 ONLY (

OEOE

OEOE

OE CONTROLLED)

(5)

ADDRESS

t

RC

(9)

1521 05

OE

t

AA

t

CS

OE

t

OH

t

AC

t

OHZ

t

(8)

(8)

DATA OUT

t

HZ

t

LZ

(8) (8)

OLZ

READ CYCLE WAVEFORM NO. 2 (CS Controlled)

t

CE/CS

DATA OUT

AC

t

RC

t

LZ

(5,7)

DATA VALID

t

OLZ

HIGH IMPEDANCE

(7)

(7)

t

HZ

(7)

t

OHZ

OE

(7)

I

CC

I

SB

t

PU

t

PD

SUPPLY

CC

CURRENT

V

WE

(P4C170)

(P4C168 ONLY)

t

RCS

t

RCH

t

OE

37

P4C168, P4C169, P4C170

Notes:

10. CE/CS and WE must be LOW for WRITE cycle.

11. If CE/CS goes HIGH simultaneously with WE HIGH, the output
remains in a high impedance state.

12. Write Cycle Time is measured from the last valid address to the first
transitioning address.

ADDRESS

CE/CS

t

WC

DATA VALID

HIGH IMPEDANCE

WE

DATA IN

DATA OUT DATA UNDEFINED

(12)

(8)

t

CW

t

AW

t

WP

t

DW

t

WR

t

AH

t

DH

t

OW

t

AS

t

WZ

(8,11)

TIMING WAVEFORM OF WRITE CYCLE NO. 1 (

WEWE

WEWE

WE CONTROLLED)

(10)

AC ELECTRICAL CHARACTERISTICS - WRITE CYCLE

(VCC = 5V ± 10%, All Temperature Ranges)

(2)

Sym. Parameter

Write Cycle Time
Chip Enable Time to

End of Write
Address Valid to

End of Write
Address Set-up Time
Write Pulse Width
Address Hold Time

Data Valid to End
of Write

Data Hold Time
Write Enable to

Output in High Z
Output Active from

End of Write

t

WC

t

CW

t

WP

t

AH

t

DW

t

DH

t

WZ

t

AS

t

OW

–12 –15

t

AW

–20

–25

–35

Min

12
12

12

12

0
7

0

0

4

Max Min

15
15

15

0

15

0
8

0

0

Max

5

Min

18
18

18

0

18

0

10

0

0

Max

7

Min

20
20

20

0

0

10

0

0

20

Max

7

Min

35
30

30

0

30

0

15

0

0

Max

Unit

ns

ns
ns
ns

ns

ns

ns

0

ns

ns13

ns

P4C168, P4C169, P4C170

38

Mode

CECE

CECE

CE (

CSCS

CSCS

CS)

WEWE

WEWE

WE Output

Standby (Deselect) H X High Z
Read L H D

OUT

Write L L High Z

166.5 Ω=

R

TH

30pF(5pF* for tHZ, tLZ, t

OHZ

,

t

OLZ

, tWZ and t

OW

VTH = 1.73 V

D

OUT

t

t

WE

ADDRESS

CE/CS

DATA OUT

DATA IN

t

WC

DATA VALID

HIGH IMPEDANCE

(12)

t

AS

t

CW

t

AW

t

WP

DW

AH
WR

t

DH

t

TIMING WAVEFORM OF WRITE CYCLE NO. 2 (

CECE

CECE

CE/

CSCS

CSCS

CS CONTROLLED)

(10)

* including scope and test fixture.

Note:

Because of the ultra-high speed of the P4C168, P4C169 AND P4C170
care must be taken when testing these devices; an inadequate setup can
cause a normal functioning part to be rejected as faulty. Long high­inductance leads that cause supply bounce must be avoided by bringing
the VCC and ground planes directly up to the contactor fingers. A 0.01 µF

Figure 1. Output Load

Figure 2. Thevenin Equivalent

TRUTH TABLES

P4C168 (P4C169)

P4C170

Input Pulse Levels GND to 3.0V
Input Rise and Fall Times 3ns
Input Timing Reference Level 1.5V
Output Timing Reference Level 1.5V
Output Load See Figures 1 and 2

AC TEST CONDITIONS

high frequency capacitor is also required between VCC and ground. To
avoid signal reflections, proper termination must be used; for example,
a 50Ω test environment should be terminated into a 50Ω load with 1.73V
(Thevenin Voltage) at the comparator input, and a 116Ω resistor must be
used in series with D

OUT

to match 166Ω (Thevenin Resistance).

Mode

CECE

CECE

CE

WEWE

WEWE

WE

OEOE

OEOE

OE Output

Deselect H X X High Z
Read L H L D

OUT

Output Inhibit L H H High Z
Write L L X High Z

D

OUT

255Ω

480Ω

300pF(5pF* for tHZ, tLZ, t

OHZ

,

t

OLZ

, tWZ and tOW)

+5

39

P4C168, P4C169, P4C170

ORDERING INFORMATION

SELECTION GUIDE

The P4C168, P4C169 and P4C170 are available in the following temperature, speed and package options.

Temperature
Range

Commercial

Plastic DIP
Plastic SOIC†
Plastic SOJ††

Speed (ns)

12

-12PC

-12SC

-12JC

15

-15PC

-15SC

-15JC

20

-20PC

-20SC

-20JC

25

-25PC

-25SC

-25JC

35

N/A
N/A
N/A

Package

Military
Processed*
(P4C168 only)

N/A

-20DMB -25DMB

Military Temp.
(P4C168 only)

CERDIP

N/A

-35DMB

CERDIP

N/A

N/A

-20DM -25DM -35DM

† P4C168 and P4C169 only.
†† P4C168
* Military temperature range with MIL-STD-883, Class B processing.
N/A = Not available

The P4C168 is also available per SMD #5962-86705

P4C

Static RAM Prefix

168
169
170

—

ss

p t

Temperature Range

Package Code
Speed (Access/Cycle Time)
Device Number

ss = Speed (access/cycle time in ns), e.g., 15, 20
p = Package code, i.e., P, S,D, J.
t = Temperature range, i.e., C, M, MB.

PACKAGE SUFFIX

Package

Suffix

P Plastic DIP, 300 mil wide standard
S Plastic SOIC, 300 mil wide standard

J Plastic SOJ, 300 mil wide standard

D CERDIP, 300 mil wide standard

DescriptionDescription

TEMPERATURE RANGE SUFFIX

Temperature
Range Suffix

C Commercial Temperature Range,

0°C – +70°C.

M Military Temperature Range,

–55°C – +125°C.

MB Mil. Temp. with MIL-STD-883D

Class B compliance

P4C168, P4C169, P4C170

40