Provides up to 15dB of EMI suppression
FCC approved method of EMI attenuation
Generates a 1X, 2X, and 4X low EMI spread
spectrum clock of the input frequency
Input frequency range from 3 to 78MHz
External loop filter for spread % adjustment
Spreading ranges from ±0.25% to ±5.0%
Ultra low cycle-to-cycle jitter
Zero-cycle slip
3.3V operating voltage range
10 mA output drives
TTL or CMOS compatible outputs
Ultra-low power CMOS design
P278XA is available in 8 pin SOIC and TSSOP
Packages
Available for industrial and automotive
temperature ranges.
Product Description
The P278xA is a versatile spread spectrum frequency
modulator designed specifically for digital camera and
other digital video and imaging applications. The P278xA
reduces electromagnetic interference (EMI) at the clock
source, which provides system wide reduction of EMI of
all clock dependent signals. The P278xA allows
significant system cost savings by reducing the number of
circuit board layers and shielding that are traditionally
required to pass EMI regulations.
The P278xA uses the most efficient and optimized
modulation profile approved by the FCC. The P278xA
modulates the output of a single PLL in order to “spread”
the bandwidth of a synthesized clock and, more
importantly, decreases the peak amplitudes of its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called spread
spectrum clock generation.
Applications
The P278xA is targeted towards MFP, xDSL, fax modem,
set-top box, USB controller, DSC, and embedded systems.
Block Diagram
XIN /CLKIN
XOUT
Crystal
Oscillator
Frequency
Divider
Feedback
Divider
FS0
Phase
Detector
FS1
LF
VCO
VDD
PLL
Output
Divider
ModOUT
VSS
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
July 2005
P2781/82/84
rev 1.5
Pin Configuration
Pin Description (P278XA)
Pin# Pin Name Type Description
1 XIN/CLKIN I
2 XOUT O
3 FS1 I
4 LF I
5 VSS I Ground Connection. Connect to system ground.
XIN / CLKIN
XOUT
FS1
Connect to crystal or clock input. This pin has dual functions. It can be connected
either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left
unconnected.
Digital logic input used to select input frequency range
(see the Input Frequency Selection Table). This pin has an internal pull-up
resistor.
External Loop Filter for the PLL. By changing the value of the CRC circuit, the
percentage spread can be adjusted accordingly. See the Loop Filter Selection
Table for detail value.
1
2
P278XA-08S
P278XA-08T
3
4
LF
Standard pin Configuration offered in both
8 pin SOIC and TSSOP Packages
8
7
6
5
VDD
FS0
ModOUT
VSS
6 ModOUT O Spread Spectrum Clock Output.
Digital logic input used to select input frequency range
7 FS0 I
8 VDD P Connect to +3.3 V
(see the Input Frequency Selection Table). This pin has an internal pull-up
resistor.
Input Frequency Selection Table
FS1 FS0 Input (MHz)
0 0 3 to 9 3 to 9 6 to 18 12 to 36 Fin / 128
0 1 10 to 19 10 to 19 20 to 38 40 to 76 Fin / 256
1 0 20 to 38 20 to 38 40 to 76 80 to 152 Fin / 512
1 1 39 to 78 39 to 78 78 to 156 156 to 312 Fin / 1024
Output Frequency Scaling (MHz)
P2781A P2782A P2784A
Modulation Rate (KHz)
General Purpose EMI Reduction IC 2 of 11
Notice: The information in this document is subject to change without notice.
July 2005
P2781/82/84
rev 1.5
Loop Filter Selection Table VDD 3.3V
Contact Alliance for loop values that are not listed in the table and for component
selection values for industrial and automotive temperatures.
Notice: The information in this document is subject to change without notice.
July 2005
P2781/82/84
rev 1.5
Spread Spectrum Selection
The P278xA performs Zero Cycle Slip when set at low percentage spreading. This allows no occurrence of system timing
error. The optimal setting should minimize system EMI to the fullest without affecting system performance. The spreading is
described as a percentage deviation of the center frequency.
(Note: the center frequency is the frequency of the external reference input on CLKIN, Pin 1.)
The P2781A is designed for PC peripheral, networking, notebook PC, and LCD monitor applications. It is optimized for
operation between 3 to 78MHz range. In the following application schematic example, the P2781A spread percentage
selection is determined by the external LF value specified in the Loop Filter Selection Table. The Input Frequency Selection
Table specifies the input frequency range. The external LF allows the user to fine tune the spread percentage to optimize the
EMI reduction benefits of the spread spectrum.
C2 C1
Note: Both logic input pins FS1 and FS0 have to be connected to either VDD or VSS. Do not leave them floating.
16 MHz
R1
0 Ohm
XIN/CLKIN
1
XOUT
2
FS1
3
4
ModOUT
P2781A
VDD
FS0
VSSLF
8
2.2 K
7
6
5
0.1µF
+3.3V
Modulated 16MHz Clock
To target Chip
General Purpose EMI Reduction IC 4 of 11
Notice: The information in this document is subject to change without notice.
July 2005
P2781/82/84
rev 1.5
Absolute Maximum Ratings
Symbol Parameter Rating Unit
VDD Supply voltage, DC (VSS – 0.5) to 7 V
VI Input voltage, DC (VSS-0.5) to (VDD+0.5) V
VO Output voltage, DC (VSS-0.5) to (VDD + 0.5) V
IIK Input clamp current (VI<0 or VI>VDD) -50 to +50 mA
IOK Output clamp current (VI<0 or VI>VDD) -50 to +50 mA
TS Storage temperature -65 to +125 °C
TA Ambient temperature range, under bias -55 to 125 °C
TJ Junction temperature 150 °C
Lead temperature (soldering 10 sec) 260 °C
Input static discharge voltage protection
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum ratings for extended periods may affect device
reliability.
(As per JEDEC STD22- A114-B)
DC Electrical Characteristics
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol Parameter Min Typ Max Unit
VIL Input low voltage VSS – 0.3 - 0.8 V
V
Input high voltage 2.0 - VDD +0.3 V
IH
IIL
IIH
I
XOL
I
XOUT output high current - 10 - mA
XOH
Input low current
(internal input pull-up resistor on FS0 and FS1)
Input high current
(internal input pull-up resistor on FS0 and FS1)
XOUT output low current - 10 - mA
2 kV
- 60 - µA
- 60 - µA
V
Output low voltage (VDD = 3.3V, IOL = 20mA) - - 0.4 V
OL
V
Output high voltage (VDD = 3.3V, IOH = 20mA) 2.5 - - V
OH
I
Static supply current - 3 - mA
DD
ICC
Typical dynamic supply current
(25pF scope probe loading)
5.2 at 3MHz - 21.2 at 82MHz mA
VDD Operating voltage 3.0 3.3 3.6 V
General Purpose EMI Reduction IC 5 of 11
Notice: The information in this document is subject to change without notice.
July 2005
P2781/82/84
rev 1.5
AC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
fIN Input frequency: P278XA 3 - 78 MHz
f
OUT
tLH
P278XA
tHL
P278XA
t
P2781A
tD
P2781A
∆F
P278XA
Output frequency:
Output rise time (measured at 0.8 V to 2.0 V,
25pF scope probe loading)
Output fall time (measured at 2.0 V to 0.8 V, 25
pF scope probe loading)
JC
Jitter (cycle to cycle, ± 6sigma, 1000 sweeps,
± 0.5% spread, I/O frequency = 16MHz)
Output duty cycle deviation (error from 50% duty
cycle, 25pF scope probe loading)
Frequency deviation tolerance from BW% stated
in the Loop Filter Selection Table
P2781A
P2782A
P2784A
3
6
12
- 1 - nS
- 1 - nS
- ±250 - pS
±1 at 3MHz - ±2 at 82MHz %
-20 0 +20 %
-
78
156
312
MHz
General Purpose EMI Reduction IC 6 of 11
Notice: The information in this document is subject to change without notice.
C
July 2005
P2781/82/84
rev 1.5
Package Information
Mechanical Package Outline 8-Pin SOIC Package
H
E
D
A2
A
e
B
A1
D
θ
Dimensions
Symbol
Inches
Millimeters
Min Max Min Max
L
A1 0.004 0.010 0.10 0.25
A 0.053 0.069 1.35 1.75
A2 0.049 0.059 1.25 1.50
B 0.012 0.020 0.31 0.51
C 0.007 0.010 0.18 0.25
D 0.193 BSC 4.90 BSC
E 0.154 BSC 3.91 BSC
e 0.050 BSC 1.27 BSC
H 0.236 BSC 6.00 BSC
L 0.016 0.050 0.41 1.27
θ 0° 8° 0° 8°
Note: Controlling dimensions are millimeters
SOIC - 0.074 grams unit weight
General Purpose EMI Reduction IC 7 of 11
Notice: The information in this document is subject to change without notice.