•Generates a low EMI spread spectrum clock and a
non-spread reference clock of the input frequency
•Optimized for frequency range from 10 MHz to 160
MHz
P1818: 10 to 20 MHz
P1819: 20 to 40 MHz
P1820: 40 to 80 MHz
P1821: 10 to 40 MHz
P1822: 80 to 160 MHz
•Internal loop filter minimizes external components
and board space
Product Description
The P18xx is a versatile spread spectrum frequency
modulator designed specifically for a wide range of input
clock frequencies from 10 to 160 MHz (see Input Frequency and Modulation Rate Selections). The P18xx
can generate an EMI reduced clock from crystal,
ceramic resonator, or system clock. The P18xx-A to
P18xx-H offer various combinations of spread options
and percentage deviations (see Spread Deviation Selections). These combinations include Down Spread,
Center Spread and percentage deviation range from
±0.625% to -3.50%.
The P18xx reduces electromagnetic interference (EMI)
at the clock source, allowing a system wide EMI
reduction for all the down stream clocks and data
dependent signals. The P18xx allows significant system
cost savings by reducing the number of circuit board
layers, ferrite beads, shielding, and other passive
components that are traditionally required to pass EMI
regulations.
•Selectable spread options: Down Spread and Center Spread
•Low inherent cycle-to-cycle jitter
•Eight spread % selections: +/-0.625% to –3.5%
•3.3V operating voltage
•CMOS/TTL compatible inputs and outputs
•Low power CMOS design
•Supports notebook VGA and other LCD timing
controller applications
•Power down function for mobile application
•Products are available for industrial temperature
range.
•Available in 8-pin SOIC and TSSOP
The P18xx modulates the output of a single PLL in
order to “spread” the bandwidth of a synthesized clock,
thereby decreasing the peak amplitudes of its
harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal
produced by oscillators and most clock generators.
Lowering EMI by increasing a signal’s bandwidth is
called “spread spectrum clock generation”.
The P18xx uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all-digital method.
Applications
The P18xx is targeted toward EMI management for
memory and LVDS interfaces in mobile graphic
chipsets and high-speed digital applications such as
PC peripheral devices, consumer electronics , and
embedded controller systems.
Alliance Semiconductor
2575 Augustine Drive • Santa Clara, CA 95054 • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
Page 2
Pin Diagrams
®
P1818/19/20/21/22
18
XIN
VSS
SRS
ModOut
27
3
4
XIN
VSS
D_C
ModOut
Block Diagram
P 1 8 1 8 A /B /C /D
P 1 8 1 9 A /B /C /D
P 1 8 2 0 A /B /C /D
18
27
3
P 1 8 1 8 E /F /G /H
4
P 1 8 1 9 E /F /G /H
P 1 8 2 0 E /F /G /H
6
5
6
5
XOUT
VDD
PD#
REF
XOUT
VDD
PD#
REF
VSS
SRS
ModOut
VSS
SRS
ModOut
18
XIN
27
3
4
P 1 8 2 1 A /B /C /D
18
XIN
27
3
4
P1822A
6
5
6
5
XOUT
VDD
FRS
REF
MRS
VDD
SSON#
SR0
XIN
XOUT
Crystal
Oscill a t o r
REF
Frequency
Divider
Feedback
Divider
D_C PD# MRS FRS SRS
Modulation
Phase
Detector
P1818/19/20/21/22 Block Diagram
Loop
Filter
VDD
VSS
PLL
VCO
Output
Divider
ModOUT
Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
2 of 8March 2003
Page 3
Input Frequency and Modulation Rate
®
P1818/19/20/21/22
Part number
P181810 MHz to 20 MHz10 MHz to 20 MHzInput frequency / 256
P181920 MHz to 40 MHz20 MHz to 40 MHzInput frequency / 512
P182040 MHz to 80 MHz40 MHz to 80 MHzInput frequency / 2048
FRS=010 MHz to 20 MHz10 MHz to 20 MHzInput frequency / 256
P1821
FRS=120 MHz to 40 MHz20 MHz to 40 MHzInput frequency / 512
P182280 MHz to 160 MHz80 MHz to 160 MHzInput frequency / 3584
Spread Deviation Selections
Part number
2
P1818
/19/20/21A
P1818/19/20/21B0N/AN/A-1.25% (Down)
P1818/19/20/21C0N/AN/A+/-1.25% (Center)
P1818/19/20/21D0N/AN/A+/-0.625% (Center)
P1818/19/20EN/AN/A0-1.25% (Down)
P1818/19/20FN/AN/A0-2.5% (Down)
P1818/19/20GN/AN/A0-1.75% (Down)
2
P1818
P1822A
P1822B
1.A through H represents various combinations of spread deviations, options, and modulation rates.
2. Refer to Frequency vs. Deviation (P1818A and P1818H).
1XINIConnect to externally generated clock signal or crystal.
2VSSPGround Connection. Connect to system ground.
3SRSISpread Range Select. Digital logic input used to select frequency devi-
ation (see Spread Deviation Selections). This pin has an internal pullup resistor.
1
3
D_CIDigital logic input used to select Down (LOW) or Center (HIGH) Spread
Options (see Spread Deviation Selections). This pin has an internal
pull-up resistor.
4ModOutOSpread Spectrum clock output (see Input Frequency and Modulation
Rate Selections and Spread Deviation Selections).
5REFONon-modulated reference output clock of the input frequency.
5/6
1
FRSIFrequency Range Select. Digital logic input used to select input fre-
quency range (see Input Frequency and Modulation Rate Selections).
This pin has an internal pull-up resistor.
1
6
PD#IPower-Down control pin. Pull LOW to enable Power-Down mode. This
pin has an internal pull-up resistor.
7VDDPConnect to +3.3V
8XOUTIConnect to crystal. No connect if externally generated clock signal is
used.
1
8
MRSIModulation Rate Select. Digital logic input used to select Modulation
Rate (see Spread Deviation Selections). This pin has an internal pull-
up resistor.
1. Please refer to Figure 1 for pin assignment.
Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
4 of 8March 2003
Page 5
Absolute Maximum Ratings
SymbolParameterRatingUnit
®
P1818/19/20/21/22
, V
V
DD
T
STG
T
A
Voltage on any pin with respect to GND-0.5 to +7.0V
IN
Storage temperature-65 to +125º C
Operating temperature0 to +70º C
DC Electrical Characteristics
3.3 V, 25° C
SymbolParameterMinTypMaxUnit
V
V
I
I
I
XOL
I
XOH
IL
IH
IL
IH
Input low voltageGND – 0.3–0.8V
Input high voltage2.00–V
Input low current (inputs D_C,
-60.0–-20.00µA
+ 0.3V
DD
PD#, MRS, FRS, SRS)
Input high current––1.00µA
XOUT output low current
(@ 0.4 V, V
= 3.3 V)
DD
XOUT output high current
(@ 2.5 V, V
= 3.3 V)
DD
2.00–12.00mA
––12.00mA
V
Z
V
I
DD
I
CC
V
t
ON
OUT
OL
OH
DD
Output low voltage
(V
=3.3 V, IOL = 20 mA)
DD
Output high voltage
(V
=3.3 V, IOH = 20 mA)
DD
Static supply current
––0.4V
––2.8V
–4.5–mA
Standby mode
Dynamic supply current
Normal mode (3.3 V and 25 pF
7.1
f
IN-min
–26.9
f
IN-max
probe loading)
Operating voltage–3.3–V
Power up time
–0.18– mS
(first locked clock cycle after
power up)
Clock output impedance–50–Ω
mA
Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.
5 of 8March 2003
Page 6
®
AC Electrical Characteristics
3.3 V, 25° C
SymbolParameterMinTypMaxUnit
P1818/19/20/21/22
Input frequency10–160MHz
Output frequency10–160MHz
Output rise time
(measured at 0.8 V to 2.0 V)
Output fall time
(measured at 2.0 V to 0.8 V)
Jitter (cycle to cycle) at 20 MHz-200–200ps
Output duty cycle455055%
and tHL are measured into a capacitive load of 15 pF
f
t
t
1. t
f
IN
OUT
LH
HL
t
JC
t
D
LH
1
1
–0.66– ns
–0.65– ns
Low Power Mobile VGA EMI Reduction IC
Notice: The information in this document is subject to change without notice.