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PASSIVATED ASSEMBLED CIRCUIT ELEMENTS
Features
Glass passivated junctions for greater reliability
Electrically isolated base plate
Available up to 1200 V
High dynamic characteristics
Wide choice of circuit configurations
Simplified mechanical design and assembly
UL E78996 approved
RRM
, V
DRM
Description
The P100 series of Integrated Power Circuits
consists of power thyristors and power diodes
configured in a single package. With its isolating
base plate, mechanical designs are greatly simplified giving advantages of cost reduction and
reduced size.
Applications include power supplies, control circuits and battery chargers.
Bulletin I27125 rev. A 04/99
P100 SERIES
25A
Major Ratings and Characteristics
Parameters P100 Units
I
D
@ T
C
I
FSM
I2t@
2
√ t 6365 A 2√ s
I
V
RRM
V
INS
T
J
@ 50Hz 357 A
@ 60Hz 375 A
50Hz 637 A2s
@ 60Hz 580 A
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25 A
85 °C
400 to 1200 V
2500 V
- 40 to 125 °C
2
s
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P100 Series
Bulletin I27125 rev. A 04/99
ELECTRICAL SPECIFICATIONS
Voltage Ratings
V
maximum repetitive V
Type number peak reverse voltage repetitive peak reverse repetitive peak off-state
RRM
VVV m A
P101, P121, P131 400 50 0 40 0 10
P102, P122, P132 600 70 0 60 0
P103, P123, P133 800 90 0 80 0
P104, P124, P134 1000 1100 1000
P105, P125, P135 1200 1300 1200
On-state Conduction
Parameter P100 Units Conditions
I
Maximum DC output current 25 A @ TC = 85°C, full bridge
D
I
Max. peak one-cycle 35 7 t = 10ms No voltage
TSM
I
non-repetitive on-state 375 t = 8.3ms reapplied
FSM
or forward current 30 0 t = 10ms 100% V
315 t = 8.3ms reapplied Sinusoidal half wave,
2
I
t Maximum I2t for fusing 637 t = 10ms No voltage Initial TJ = TJ max.
580 t = 8. 3 m s reapplied
450 t = 10ms 100% V
410 t = 8.3ms reapplied
I2√t Maximum I2√t for fusing 6365 A2√s t = 0.1 to 10ms, no voltage reapplied
V
Max. value of threshold voltage 0.82 V TJ = 125°C
T(TO)
r
Max. level value of on-state
t1
slope resistance
V
Max. peak on-state or
TM
forward voltage drop
V
FM
di/dt Maximum non repetitive rate of T
rise of turned on current I
I
Maximum holding current 13 0 mA TJ = 25°C anode supply = 6V, resistive load, gate open
H
Maximum latching current 25 0 mA TJ = 25°C anode supply = 6V, resistive load
I
L
12 mΩ T J = 125°C, Av. power = V
1.35 V TJ = 25°C, ITM = π x I
200 A/µs
maximum non- V
RSM
voltage voltage
A
A2s
I2t for time tx = I2√t . √ tx
= 125°C from 0.67 V
J
= π x I
, Ig = 500mA, tr < 0.5µs, tp > 6µs
T(AV)
TM
maximum I
DRM
RRM
RRM
* I
T(TO)
T(AV)
DRM
T(AV)
+ rt + (I
max.
RRM
@ TJ max.
)
T(RMS)
2
2
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Bulletin I27125 rev. A 04/99
Blocking
Parameter P100 Units Conditions
dv/dt Maximum critical rate of rise of
off-state voltage
I
Max. peak reverse and off-state
RRM
I
leakage current at V
DRM
I
Max peak reverse leakage current 100 µA TJ = 25°C
RRM
V
RMS isolation voltage 2500 V
INS
RRM
, V
DRM
200 V/µs TJ = 125°C, exponential to 0.67 V
10 mA TJ = 125°C, gate open circuit
50Hz, circuit to base, all terminal shorted,
T
= 25°C, t = 1s
J
Triggering
Parameter P100 Units Conditions
P
Maximum peak gate power 8
GM
P
Maximum average gate power 2
G(AV)
Maximum peak gate current 2 A
I
GM
- V
Maximum peak negative
GM
gate voltage
Maximum gate voltage required 3 TJ = - 40°C
V
GT
10
to trigger 2 TJ = 25°C Anode Supply = 6V resistive load
1T
I
Maximum gate current 90 TJ = - 40°C
GD
required to trigger 60 mA T
35 T
V
Maximum gate voltage
GD
that will not trigger
Maximum gate current
I
GD
that will not trigger
0.2 V TJ = 125°C, rated V
2m A T
W
V
= 125°C
J
= 25°C Anode Supply = 6V resistive load
J
= 125°C
J
applied
DRM
= 125°C, rated V
J
DRM
applied
P100 Series
gate open
DRM
Thermal and Mechanical Specification
Parameter P100 Units Conditions
T
Max. operating temperature range -40 to 125
J
T
Max. storage temperature range -40 to 125
stg
R
Max. thermal resistance, 2.24 K/W DC operation per junction
thJC
junction to case
Max. thermal resistance, 0.10 K/W Mounting surface, smooth and greased
R
thCS
case to heatsink
T Mounting torque, base to heatsink 4 Nm
wt Approximate weight 58 (2.0) g (oz)
°C
A mounting compound is recommended and the torque
should be checked after a period of 3 hours to allow for the
spread of the compound
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P100 Series
Bulletin I27125 rev. A 04/99
Circuit Type and Coding *
Terminal Positions
Circuit "0" Circuit "2" Circuit "3"
Schematic diagram
diagram
G1
AC1
AC2
(-)
G2
(+) (-)
AC2
AC1
G2
G1
AC1
AC2
(+)
(-)
Single Phase Single Phase Single Phase
Hybrid Bridge Hybrid Bridge All SCR
Common Cathode Doubler Bridge
Basic series P10. P12. P13.
With voltage P10.K P12.K P13.K
suppression
With free-wheeling P10.W - diode
With both voltage
suppression and P10.KW - free-wheeling diode
* To complete code refer to voltage ratings table, i.e.: for 600V P10.W complete code is P102W
Outline Table
4.6 (0.18)
12.7 (0.50)
.6 (0.18)
4
.
X
A
(0.10) M
2.5
12.7 (0.50)
63.5 (2.50)
45 (1.77)
1.65 (0.06)
.
X
A
.
X
A
.5 (0.61)
M
25 (0. 98) M
15
Faston 6.35x0.8 (0.25x0.03)
G1
G2G3G4
(+)
.
X
5.2 (0.20)
23.2 (0.91)
A
) M
32.5 (1.28
33.8 (1. 33)
48.7 (1.91)
All dimensions in millimeters (inches)
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60
50
40
30
180°
(Sine)
20
10
Maximu m Total Power Loss (W )
0
0 5 10 15 20 25
P100 Series
T = 125°C
J
Total Output Current (A)
Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink)
P100 Series
Bulletin I27125 rev. A 04/99
R = 1
t
hS
A
2
.
K
5
/
K
W
/W - D
3
K
/
W
5
K
/
W
7
K
/
W
1
0
K
/
W
0 25 50 75 1 00 125
Maximum Allowable Ambient Temperature (°C)
el
t
a R
15
180°
120°
90°
60°
30°
10
RMS Limit
5
Conduction angle
P100 Series
T = 125°C
J
Per Junction
Maximum Average On-state Power Loss (W)
0
0 5 10 15
Avera ge On - s tate Cu rr ent (A )
20
DC
180°
120°
15
90°
60°
30°
10
RMS Limit
Conduct ion Peri od
5
P100 Series
T = 125°C
Maximum Average On-state Power Loss (W)
0
0 5 10 15 20
Per Junction
Average On-state Current (A)
Fig. 2 - On-state Power Loss Characteristics Fig. 3 - On-state Power Loss Characteristics
130
120
110
Fully Turned.on
180 °
(Sine)
180°
(Rect)
1000
100
T = 25 °C
J
T = 125 °C
J
100
90
P100 Series
Per Module
80
Maximum Allowable Case Temperature (°C)
70
0 5 10 15 20 25 30
Total Output Current (A)
Fig. 4 - Current Ratings Characteristics
10
P100 Series
Instantaneous On-state Current (A)
1
0123456
Per Junction
Inst an ta neo u s On- s tate Vol t age (V)
Fig. 5 - On-state Voltage Drop Characteristics
J
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P100 Series
Bulletin I27125 rev. A 04/99
350
300
250
200
Peak Half Sine Wave On-state Current (A)
150
Number Of Equal Amplitude Half Cycle Current Pulses (N)
At Any Rated Load Condition And With
Rated V Applied Following Surge.
RRM
P100 Series
Per Junction
1 10 100
Initial T = 125°C
J
@ 60 Hz 0. 0083 s
@ 50 Hz 0. 0100 s
Fig. 6 - Maximum Non-Repetitive Surge Current
10
Steady State Value:
R = 2.24K/W
thJC
thJC
(DC Operation)
1
0.1
400
Maximum Non Repetitive Surge Current
Versus Puls e T rain D urat io n . Con t ro l
Of Conduction May Not Be Maintained.
350
300
250
200
150
P100 Series
Per Junction
Peak Hal f Sine W ave On - state Curr ent (A)
100
0.01 0.1 1
Pulse Train Duration (s)
Initial T = 125°C
No Voltage Reapplied
Rated V Reapplied
J
RRM
Fig. 7 - Maximum Non-Repetitive Surge Current
P100 Series
Per Junction
0.01
Transient Thermal Impedance Z (K/W)
0.0001 0.001 0.01 0.1 1 10
Squ are Wave Pul se Dura tion (s)
Fig. 8 - Thermal Impedance Z
100
Rectangular gate pulse
a) Recommend e d load line f or
rated di/dt : 10V, 20 ohms, tr <= 1µs
b) Recommend e d load line f or
rated di/dt : 10 V, 65 ohms, tr <= 1µs
10
(a)
(b)
TJ = -40 °C
TJ = 25 °C
TJ = 125 °C
1
Instantaneous Gate Vo ltage (V)
VGD
IGD
0.1
0.001 0.01 0.1 1 10 100
Instantaneous Gate Current (A)
thJC
P100 Series
Characteristics
(1) PGM = 100 W, tp = 500 µs
(2) PGM = 50 W, tp = 1 ms
(3) PGM = 20 W, tp = 25 ms
(4) PGM = 10 W, tp = 5 ms
(4 )
(3) (2) (1)
Frequency Limited
By PG (A V )
Fig. 9 - Gate Characteristics
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P100 Series
Bulletin I27125 rev. A 04/99
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