Datasheet OP200FZ, OP200GS, OP200EZ, OP200AZ Datasheet (Analog Devices)

Dual Low Offset, Low Power

16

15

14

13

12

11

10

9

1

2

3

4

5

6

7

8

NC = NO CONNECT

–IN A

+IN A

NC

V–

NC

+IN B

–IN B

NC

OUT A

NC

NC

V+

NC

NC

OUT B

NC

+

–

+

–

8

7

6

5

V+

–IN B

+IN B

OUT B

1

2

3

4

–IN A

+IN A

V–

OUT A

+–

+–

A

B

a

FEATURES
Low Input Offset Voltage: 75 V Max
Low Offset Voltage Drift, Over –55C

0.5 V/C Max

Low Supply Current (Per Amplifier): 725 mA Max
High Open-Loop Gain: 5000 V/mV Min
Low Input Bias Current: 2 nA Max
Low Noise Voltage Density: 11 nV/÷Hz at 1 kHz
Stable with Large Capacitive Loads: 10 nF Typ
Pin Compatible to OP221, MC1458, and LT1013 with

Improved Performance

Available in Die Form

GENERAL DESCRIPTION

The OP200 is the first monolithic dual operational amplifier to
offer OP77 type precision performance. Available in the industry
standard 8-pin pinout, the OP200 combines precision performance
with the space and cost savings offered by a dual amplifier.

The OP200 features an extremely low input offset voltage of less
than 75 mV with a drift below 0.5 mV/∞C, guaranteed over the full
military temperature range. Open-loop gain of the OP200 exceeds
5,000,000 into a 10 kW load; input bias current is under 2 nA;
CMR is over 120 dB and PSRR below 1.8 mV/V. On-chip zener-
zap trimming is used to achieve the extremely low input offset
voltage of the OP200 and eliminates the need for offset pulling.

Power consumption of the OP200 is very low, with each amplifier
drawing less than 725 mA of supply current. The total current
drawn by the dual OP200 is less than one-half that of a single
OP07, yet the OP200 offers significant improvements over this
industry standard op amp. The voltage noise density of the OP200,
11 nV/÷Hz at 1 kHz, is half that of most competitive devices.

The OP200 is pin compatible with the OP221, LM158,
MC1458/1558, and LT1013.

<

T

<

+125C:

A

Operational Amplifier

OP200

PIN CONNECTIONS

16-Pin SOIC

(S-Suffix)

EPOXY MINI-DI

(P-Suffix),

8-Pin Hermetic DIP

(Z-Suffix)

The OP200 is an ideal choice for applications requiring multiple
precision op amps and where low power consumption is critical.

For a quad precision op amp, see the OP400.

P

VOLTAGE

LIMITING

NETWORK

+IN –IN

Figure 1. Simplified Schematic (One of two amplifiers is shown.)

REV. A

Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.

V+

BIAS

OUT

V–

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: [phone] www.analog.com
Fax: [phone] © Analog Devices, Inc., 2002

OP200–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(VS = ±15 V, TA = 25C, unless otherwise noted.)

OP200A/E OP200F OP200G

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage V

OS

25 75 50 150 80 200 mV

Long Term Input

Voltage Stability 0.1 0.1 0.1 mV/mo

Input Offset Current I

Input Bias Current I

Input Noise Voltage e

Input Noise e

Voltage Density

1

Input Noise Current i

OS

B

n p-p

n

n p-p

V

= 0 V 0.05 1.0 0.05 2.0 0.05 3.5 nA

CM

V

= 0 V 0.1 2.0 0.1 4.0 0.1 5.0 nA

CM

0.1 Hz to 10 Hz 0.5 0.5 0.5 mV

p-p

fO = 10 Hz 22 36 22 36 22 nV/冪Hz
fO = 1000 Hz 11 18 11 18 11

0.1 Hz to 10 Hz 15 15 15 pA

p-p

Input Noise

Current Density i

n

fO = 10 Hz 0.4 0.4 0.4 pA/冪Hz

Input Resistance

Differential Mode R

IN

10 10 10 MW

Input Resistance

Common Mode R

Large Signal A

INCM

VO

Voltage Gain R

VO - ± 10 V

= 10 kW 5000 12000 3000 7000 3000 7000

L

125 125 125 GW

RL = 2 kW 2000 3700 1500 3200 1500 3200 M/mV

NOTES

1

Sample tested

2

Guaranteed but not 100% tested

3

Guaranteed by CMR test

–2–

REV. A

OP200

ELECTRICAL CHARACTERISTICS

(VS = 15 V, –55C £ TA £ +125C for OP200A, unless otherwise noted.)

OP200A

Parameter Symbol Conditions Min Typ Max Unit

Input Offset Voltage V

OS

Average Input Offset Voltage Drift TCV

Input Offset Current I

Input Bias Current I

Large Signal Voltage Gain A

OS

B

VO

OS

VCM = 0 V 0.15 2.5 nA

VCM = 0 V 0.9 5.0 nA

VO = 10 V

= 10 W 3000 9000 V/mV

R

L

45 125 mV

0.2 0.5 mV/∞C

RL = 2 kW 1000 2700 V/mV

Input Voltage Range* IVR ±12 ±12.5 V

Common-Mode Rejection CMR VCM = ±12 V 115 130 dB

Power Supply Rejection Ratio PSRR VS = +3 V to +18 V 0.2 3.2 mV/V

Output Voltage Swing V

O

RL = 10 kW±12 ±12.4 V
RL = 2 kW±11 ±12 V

Supply Current Per Amplifier I

SY

No Load 600 775 mA

Capacitive Load Stability AV = +1 8 nF

NOTE
*Guaranteed by CMR test.

ELECTRICAL CHARACTERISTICS

(VS = 15 V, TA = 25C, unless otherwise noted.)

OP200A/E OP200F OP200G

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Voltage Range3IVR ±12 ±13 ± 12 ±13 ±12 ±13 V

Common-Mode

Rejection CMR VCM = ±12 V 120 135 115 135 110 130 dB

Power Supply V

= ±3 V

S

Rejection Ratio PSRR to ± 18 V 0.4 1.8 0.4 3.2 0.6 5.6 mV/V

Output Voltage V

O

RL= 10 kW±12 ±12.6 ±12 ±12.6 ±12 ±12.6 V

Swing RL = 2 kW±11 ±12.2 ± 11 ±12.2 ±11 ±12.2 V

Supply Current

Per Amplifier I

SY

No Load 570 725 570 725 570 725 mA

Slew Rate SR 0.1 0.15 0.1 0.15 0.1 0.15 V/mS

Gain Bandwidth

Product GBWP AV = 1 500 500 500 kHz

Channel Separation

2

VO = 20 Vp-p

CS fO = 10 Hz 123 145 123 145 123 145 dB

Input Capacitance C

IN

Capacitive Load A

V

= 1

3.2 3.2 3.2 pF

Stability No Oscillations 10 10 10 nF

NOTES

1

Sample tested

2

Guaranteed but not 100% tested

3

Guaranteed by CMR test

REV. A

–3–

OP200–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

(VS = ±15 V, –40C £ TA £ +85C, unless otherwise noted.)

OP200E OP200F OP200G

Parameter Symbol Conditions Min Typ Max Min Typ Max Min Typ Max Unit

Input Offset Voltage V

OS

35 100 80 250 110 300 mV

Average Input Offset

Voltage Drift TCV

Input Offset Current I

Input Bias Current I

OS

OS

B

Large-Signal V

Voltage Gain A

VO

VCM = 0 V 0.08 2.5 0.08 3.5 0.1 6.0 nA

VCM = 0 V 0 3 5.0 0.3 70 0.5 10.0 nA

= ±10 V

O

RL= 10 kW 3000 10000 2000 5000 2000 5000 V/mV

0.2 0.5 0.5 1.5 0.6 2.0 mV/∞C

RL = 2 kW 1500 3200 1000 2500 1000 2500 V/mV

Input Voltage

Range* IVR ± 12 ±12.5 ± 12 ±12.5 ±12 ±12.5 V

Common-Mode

Rejection CMR VCM = ±12 V 115 130 110 130 105 130 dB

Power Supply PSRR V

= ±3 V 0.15 3.2 0.15 5.6 0.3 10.0 mV/V

S

Rejection Ratio to ±18 V

Output Voltage V

O

RL = 10 kW±12 ±12.4 ± 12 ±12.4 ±12 ±12.4 V

Swing RL = 2 kW±11 ± 12 ± 11 ±12 ± 11 ±12.2 V

Supply Current

Per Amplifier I

SY

Capacitive Load A

No Load 600 775 600 775 600 775 mA

= 1 10 1010nF

V

Stability No Oscillations 10 10 10 nF

NOTE

*Guaranteed by CMR test.

–4–

REV. A

OP200

WARNING!

ESD SENSITIVE DEVICE

1/2

OP200

50k

50

1/2

OP200

CHANNEL SEPARATION = 20 LOG

V2/1000

V

1

20Vp-p @ 10Hz

V

1

V

2

Figure 2. Channel Separation Test Circuit

ABSOLUTE MAXIMUM RATINGS

1

Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ± 30 V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . Supply Voltage

Output Short-Circuit Duration . . . . . . . . . . . . . . Continuous

Storage Temperature Range

P, S, Z-Package . . . . . . . . . . . . . . . . . . . . . –65∞C to +150∞C

Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300∞C

Junction Temperature (T

) . . . . . . . . . . . . . –65∞C to +150∞C

J

Operating Temperature Range

OP200A . . . . . . . . . . . . . . . . . . . . . . . . . . . –55∞C to +125∞C

OP200E, OP200F . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C

OP200G . . . . . . . . . . . . . . . . . . . . . . . . . . . –40∞C to +85∞C

Package Type 

2

JA



JC

Unit

8-Pin Hermetic DIP (Z) 148 16 ∞C/W
8-Pin Plastic DIP (P) 96 37 ∞C/W
16-Pin SOL (S) 92 27 ∞C/W

NOTES

1

Absolute maximum ratings apply to both DICE and packaged parts, unless

otherwise noted.

2

␪

is specified for worst case mounting conditions, i.e., ␪JA is specified for

JA

device in socket for CERDIP and P-DIP packages; ␪JA is specified for device
soldered to printed circuit board for SOL package.

10k100

1/2

OP200

(nV/ Hz) = 2  e

e

OUT

1/2

OP200

(nV/ Hz)  101

OUT

TO SPECTRUM

e

OUT

ANALYZER

Figure 3. Noise Test Schematic

ORDERING GUIDE

Package

= 25COperating

T

A

V

Max CERDIP Temperature

OS

(V) 8-Pin Plastic Range

75 OP200AZ MIL
75 OP200EZ XIND
150 OP200FZ* XIND
200 OP200GP XIND
200 OP200GS XIND

*Not for new design, obsolete April 2002.

For military processed devices, please refer to the Standard
Microcircuit Drawing (SMD) available at
www.dscc.dla.mil/programs/milspec/default.asp

SMD Part Number ADI Equivalent

5962-8859301M2A OP200ARCMDA
5962-8859301MPA OP200AZMDA

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP200 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.

REV. A

–5–

OP200

–Typical Performance Characteristics

TA = 25C

= 15V

V

S

2

1

CHANGE IN OFFSET VOLTAGE – V

5

0

12345

TIME – Minutes

TPC 1. Warm-Up Drift

300

VS = 15V

250

200

150

100

50

INPUT OFFSET CURRENT – pA

0
–75

–50 –25 0 25 50 75 100 125

TEMPERATURE – C

TPC 4. Input Offset Current vs.
Temperature

60

VS = 15V

50

40

30

20

10

INPUT OFFSET VOLTAGE – V

0

–75

–50 –25 0 25 50 75 100 125

TEMPERATURE – C

TPC 2. Input Offset Voltage
vs. Temperature

1.0
TA = 25C
VS = 15V

0.8

0.6

0.4

0.2

INPUT BIAS CURRENT – nA

0

–15

–10 –5 0 5 10 15

COMON-MODE VOLTAGE – V

TPC 5. Input Bias Current vs.
Common-Mode Voltage

3

VS = 15V

2

1

0

–1

INPUT BIAS CURRENT – nA

–2

–3

–50 –25 0 25 50 75 100 125

–75

TEMPERATURE – C

TPC 3. Input Bias Current vs.
Temperature

140

120

100

80

60

40

20

COMMON-MODE REJECTION – dB

0

1

10 100 1k 10k 100k

FREQUENCY – Hz

TA = 25C

= 15V

V

S

TPC 6. Common-Mode Rejection
vs. Frequency

CURRENT NOISE DENSITY – nV/ Hz

100

10

110010

FREQUENCY – Hz

TA = 25C

= 15V

V

S

TPC 7. Voltage Noise Density
vs. Frequency

1000

CURRENT NOISE DENSITY – fA/ Hz

1k

100

1

10 1k100

FREQUENCY – Hz

TPC 8. Current Noise Density

TA = 25C

= 15V

V

S

TPC 9. 0.1 to 10Hz Noise

vs. Frequency

–6–

REV. A

OP200

1.18
TWO AMPLIFIERS

= 25C

T

A

1.16

1.14

1.12

1.10

1.08

TOTAL SUPPLY CURRENT – mA

1.06

2 6 10 14 16

SUPPLY VOLTAGE – V

TPC 10. Total Supply Current
vs. Supply Voltage

0.7

0.6

0.5

0.4

0.3

0.2

POWER SUPPLY REJECTION – V/V

0.1
–75

–50 –25 0 25 50 75 100 125

TEMPERATURE – C

TPC 13. Power Supply Rejection
vs. Temperature

1.16

TWO AMPLIFIERS
VS = 15V

1.15

1.14

1.13

SUPPLY CURRENT – mA

1.12

1.11
–75

–50 –25 0 25 50 75 100 125

TEMPERATURE – C

TPC 11. Total Supply Current
vs. Temperature

6000

5000

4000

3000

2000

OPEN-LOOP GAIN – V/mV

1000

0

–75

–50 –25 0 25 50 75 100 125

TEMPERATURE – C

VS = 15V
RL = 2k

TPC 14. Open Loop Gain vs.
Temperature

140

120

100

80

60

40

20

TA = 25C

POWER SUPPLY REJECTION – nA

0

1101001k10k 100k

0.1

POSITIVE
SUPPLY

FREQUENCY – Hz

NEGATIVE
SUPPLY

TPC 12. Power Supply Rejection
vs. Temperature

140

120

100

80

60

40

OPEN-LOOP GAIN – dB

20

0

–20

10 100 1k 10k 100k

FREQUENCY – Hz

GAIN

TA = 25C

= 15V

V

S

PHASE

TPC 15. Open Loop Gain and
Phase Shift vs. Frequency

0

90

135

PHASE SHIFT – Degrees

180

1M

140

120

100

AV = 1000

80

AV = 100

60

GAIN – dB

AV = 10

40

AV = 1

20

0

10 100 1k 10k 100k

FREQUENCY – Hz

TPC 16. Closed Loop Gain
vs. Frequency

REV. A

TA = 25C

= 15V

V

S

1M

30

25

20

15

10

5

OUTPUT SWING – V p-p AT 1% Distortion

0

10 100 1k 10k

FREQUENCY – Hz

TA = 25C
VS = 15V

TPC 17. Maximum Output Swing
vs. Frequency

–7–

100k

1

0.1

DISTORTION – %

0.01

0.001

FREQUENCY – Hz

AV = 100

AV = 10

AV = 1

TA = 25C

= 15V

V

S

V

= 10V p-p

OUT

R

= 2k

L

TPC 18. Total Harmonic Distortion
vs. Frequency

10k1k100

OP200

50

TA = 25C

45

V

40

35

30

25

20

OVERSHOOT – %

15

10

5

0

0

= 15V

S

FALLING

RISING

0.5 1.0 1.5
CAPACITIVE LOAD – nF

1.0 1.5 3.0

TPC 19. Overshoot vs.
Capacitive Load

29

28

27

26

25

24

SOURCING

23

SHORT-CIRCUIT CURRENT – mA

22

01 345

SINKING

2

TIME – Minutes

TPC 20. Short-Circuit
Current vs. Time

TA = 25C
VS = 15V

150

140

130

120

110

CHANNEL SEPARATION – dB

100

90

10 100 1k 10k

FREQUENCY – Hz

TPC 21. Channel Separation
vs. Frequency

100k

TPC 22. Large-Signal
Transient Response

TPC 23. Small-Signal
Transient Response

APPLICATIONS INFORMATION

The OP200 is inherently stable at all gains and is capable of
driving large capacitive loads without oscillating. Nonetheless,
good supply decoupling is highly recommended. Proper supply
decoupling reduces problems caused by supply line noise and
improves the capacitive load driving capability of the OP200.

APPLICATIONS DUAL LOW-POWER INSTRUMENTATION AMPLIFIER

A dual instrumentation amplifier that consumes less than 33 mW
of power per channel is shown in Figure 4. The linearity of the
instrumentation amplifier exceeds 16 bits in gains of 5 to 200
and is better than 14 bits in gains from 200 to 1000. CMRR is
above 115 dB (Gain = 1000). Offset voltage drift is typically

0.2 mV/∞C over the military temperature range which is compa­rable to the best monolithic instrumentation amplifiers. The
bandwidth of the low-power instrumentation amplifier is a func­tion of gain and is shown below:

Gain Bandwidth

5 150 kHz
10 67 kHz
100 7.5 kHz
1000 500 Hz

TPC 24. Small-Signal Transient

LOAD

3

2

40000

R

+15V

1/2

OP200AZ

–15V

VIN + V

G

= 1 nF

8

4

20k

REF

1

V

OUT

V

IN

V

REF

5

1/2

OP200AZ

6

20k 5k

Response C

7

5k

R

G

V

= 5 +

OUT

Figure 4. Dual Low-Power Instrumentation Amplifier

The output signal is specified with respect to the reference
input, which is normally connected to analog ground. The
reference input can be used to offset the output from –10 V
to +10 V if required.

–8–

REV. A

OP200

PRECISION ABSOLUTE VALUE AMPLIFIER

The circuit of Figure 5 is a precision absolute value amplifier
with an input impedance of 10 MW. The high gain and low

of the OP200 ensure accurate operation with microvolt

TCV

OS

input signals. In this circuit, the input always appears as a
common-mode signal to the op amps. The CMR of the OP200
exceeds 120 dB, yielding an error of less than 2 ppm.

+15

C2

0.1pF

R1

1k

C1

OP200AZ

2

1/2

–15

8

4

30pF

C2

0.1pF

3

V

IN

D1
1N4148

1

D1

1N4148

6

5

R2
2k

R3

1k

1/2

OP200AZ

7

0V < V

OUT

V

OUT

< 10V

Figure 5. Precision Absolute Value Amplifier

PRECISION CURRENT PUMP

Maximum output current of the precision current pump shown
in Figure 6 is ±10 mA. Voltage compliance is ±10 V with ± 15 V
supplies. Output impedance of the current transmitter exceeds
3 MW with linearity better than 16 bits.

=

2

3

100

10k

1/2

OP200EZ

R4

1k

V

IN

= 10mA/V

R3

R5

100

1

7

OP200EZ

+15

8

1/2

4

–15

5

6

I

OUT

R1

10k

V

R2

IN

10k

V

IN

I

=

OUT

RS

Figure 6. Precision Current Pump

DUAL 12-BIT VOLTAGE OUTPUT DAC

The dual output DAC shown in Figure 7 is capable of providing
untrimmed 12-bit accurate operation over the entire military
temperature range. Offset voltage, bias current and gain errors
of the OP-200 contribute less than 1/lO of an LSB error at 12
bits over the military temperature range.

10V

REFERENCE

VOLTAGE

PINS 6(MSB) – 17(LSB)

CONTROL

4

DAC DATA BUS

22

18

19

DAC

20

5V

21

V

DD

R

A

FB

I

OUT

RFBB

I

OUT

AGND

3

A

2

23

B

24

1

2

–

1/2

OP200AZ

3

+

6

–

1/2

OP200AZ

5

+

DAC-8222EW

DAC A

A

V

REF

DAC8212AV

REF

CS

WR

B

DAC8212AV

DAC B

V

DAC A/DAC B

1/2

1/2

DGND

5

Figure 7. Dual 12-Bit Voltage Output DAC

8

1

4

7

OUTA

–15V

OUTB

REV. A

–9–

OP200

DUAL PRECISION VOLTAGE REFERENCE

A dual OP200 and a REF-43, a 2.5 V reference, can be used to
build a ±2.5 V precision voltage reference. Maximum output
current from each reference is ±10 mA with load regulation
under 25 mV/mA. Line regulation is better than 15 mV/V and
output voltage drift is under 20 mV/∞C. Output voltage noise
from 0.1 Hz to 10 Hz is typically 75 mV p-p. R1 and D1 ensure
correct start-up.

PROGRAMMABLE HIGH RESOLUTION WINDOW COMPARATOR

The programmable window comparator shown in Figure 9 is
easily capable of 12-bit accuracy over the full military tempera­ture range. A dual CMOS 12-bit DAC, the DAC-8212, is used
in the voltage switching mode to set the upper and lower thresh­olds (DAC A and DAC B, respectively).

V

IN

21

V

DD

10V

REFERENCE

PINS 6(MSB) – 17(LSB)

CONTROL

SIGNALS

2

DAC DATA BUS

24

18

DAC

19

20

I

OUT

I

OUT

DAC A/DAC B

CS

WR

A

B

DAC A

1/2

DAC8212AV

DAC B

1/2

DAC8212AV

DGND

5

AGND

R

A

4

REF

R

B

22

REF

1

R1

10k

–15V

R2

10k

3

2

4

5

+5V

R2

1/2

OP200AZ

10k

8

1/2

OP-200AZ

4

–5V

7

2

3

R1
22k

2

REF-43A

4

6

D1

1N914

6

5

Figure 8. Dual Precision Voltage Reference

15V

8

+

1/2

OP200AZ

–

+

1/2

OP200AZ

1

D1

R3

1N4148

10k

D2
1N4148

7

R4
10k

OUTB

5V

Q1
2N2222

–

R4
5k

TTL OUT

R3
10k

–2.5V

–2.5V

Figure 9. Programmable High Resolution Window Comparator

–10–

REV. A

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

PIN CONNECTIONS

16-Pin SOIC

(S-Suffix)

0.4133 (10.50)

0.3977 (10.00)

OP200

16

1

PIN 1

0.0118 (0.30)

0.0040 (0.10)

PIN 1

0.210

(5.33)

MAX

0.160 (4.06)

0.115 (2.93)

0.050 (1.27)
BSC

0.0192 (0.49)

0.0138 (0.35)

0.430 (10.92)

0.348 (8.84)

8

1

0.100 (2.54)

0.022 (0.558)

0.014 (0.356)

9

0.2992 (7.60)

0.2914 (7.40)

8

0.1043 (2.65)

0.0926 (2.35)

SEATING
PLANE

Epoxy MINI-DI

(P-Suffix)

5

0.280 (7.11)

0.240 (6.10)

4

BSC

0.070 (1.77)

0.045 (1.15)

0.060 (1.52)

0.015 (0.38)

SEATING
PLANE

0.4193 (10.65)

0.3937 (10.00)

0.0125 (0.32)

0.0091 (0.23)

P

0.325 (8.25)

0.300 (7.62)

0.130
(3.30)
MIN

0.0291 (0.74)

0.0098 (0.25)

8
0

0.195 (4.95)

0.115 (2.93)

0.015 (0.381)

0.008 (0.204)

 45

0.0500 (1.27)

0.0157 (0.40)

REV. A

PIN 1

0.200 (5.08)
MAX

0.200 (5.08)

0.125 (3.18)

8-Pin Hermetic DIP

0.005 (0.13)
MIN

85

1

0.100 (2.54)
BSC

0.405 (10.29) MAX

0.023 (0.58)

0.014 (0.36)

(Z-Suffix)

0.055 (1.4)
MAX

4

0.070 (1.78)

0.030 (0.76)

0.310 (7.87)

0.220 (5.59)

0.060 (1.52)

0.015 (0.38)

0.150
(3.81)
MIN

SEATING
PLANE

–11–

0.320 (8.13)

0.290 (7.37)

15

0

0.015 (0.38)

0.008 (0.20)

OP200

Revision History

Location Page

Data Sheet changed from REV. 0 to REV. A.

Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Edits to ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Edits to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2

C00322–0–4/02(A)

–12–

PRINTED IN U.S.A.

REV. A