Page 1
Ultraprecision
M
a
FEATURES
Ultralow Offset Voltage:
T
= 25ⴗC: 25 V Max
A
Outstanding Offset Voltage Drift: 0.1 V/ⴗC Max
Excellent Open-Loop Gain and Gain Linearity:
12 V/V Typ
CMRR: 130 dB Min
PSRR: 115 dB Min
Low Supply Current: 2.0 mA Max
Fits Industry Standard Precision Op Amp Sockets
(OP07/OP77)
GENERAL DESCRIPTION
The OP177 features the highest precision performance of any
op amp currently available. Offset voltage of the OP177 is only
25 µV max at room temperature. The ultralow V
OP177 combines with its exceptional offset voltage drift
(TCV
V
) of 0.1 µV/°C max to eliminate the need for external
OS
adjustment and increases system accuracy over
OS
temperature.
The OP177’s open-loop gain of 12 V/µV is maintained over the
full ±10 V output range. CMRR of 130 dB min, PSRR of
120 dB min, and maximum supply current of 2 mA are just a
few examples of the excellent performance of this operational
amplifier. The OP177’s combination of outstanding specifications
ensures accurate performance in high closed-loop gain applications.
of the
OS
Operational Amplifier
OP177
PIN CONNECTIONS
Epoxy Mini-DIP
(P Suffix)
8-Pin SO
(S-Suffix)
1
TRIM
V
OS
2
–IN
3
+IN
4
NC = NO CONNECT
This low noise bipolar input op amp is also a cost effective
alternative to chopper-stabilized amplifiers. The OP177 provides
chopper-type performance without the usual problems of high
noise, low frequency chopper spikes, large physical size, limited
common-mode input voltage range, and bulky external storage
capacitors.
The OP177 is offered in the –40°C to +85°C extended
industrial temperature ranges. This product is available in
8-pin epoxy DIPs, as well as the space saving 8-pin SmallOutline (SO).
8
V
TRI
OS
7
V+
6
OUT
5
NCV–
NONINVERTING
INPUT
INVERTING
INPUT
V+
R1A
2B
Q7
R3
Q21
Q23
Q24
Q22
R4
V–
*NOTE:
R2A AND R2B ARE ELECTRONICALLY ADJUSTED ON CHIP AT FACTORY.
Q1
(OPTIONA
L
NULL)
Q8
Q4Q6Q3Q5
Q2
Figure 1. Simplified Schematic
REV. C
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
R2B*R2A*
R1B
C1
C2
Q13
Q10
Q17
Q14
Q9
Q11 Q12
C3
Q27
R5
Q26
Q25
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Q16
Q15
R7
Q19
R9
OUTPUT
R10
Q20
Q18
R8R6
Page 2
ELECTRICAL CHARACTERISTICS
(@ VS = ⴞ15 V, TA = 25ⴗC, unless otherwise noted.)
OP177
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
OP177F OP177G
INPUT OFFSET
VOLTAGE V
OS
10 25 20 60 µV
LONG-TERM
INPUT OFFSET
Voltage Stability ∆VOS/Time 0.3 0.4 µV/Mo
INPUT OFFSET
CURRENT I
1
OS
0.3 1.5 0.3 2.8 nA
INPUT BIAS
CURRENT I
INPUT NOISE
VOLTAGE e
INPUT NOISE
CURRENT i
B
n
n
fo = 1 Hz to 100 Hz
fo = 1 Hz to 100 Hz
–0.2 1.2 2 –0.2 1.2 2.8 nA
2
2
118 150 118 150 nV rms
38 38 pA rms
INPUT
RESISTANCE
Differential Mode
3
R
IN
26 45 18.5 45 MΩ
INPUT
RESISTANCE
COMMON-MODE R
INPUT VOLTAGE
RANGE
4
INCM
IVR ±13 ±14 ±13 ±14 V
200 200 GΩ
COMMON-MODE
REJECTION
RATIO CMRR VCM = ±13 V 130 140 115 140 dB
POWER SUPPLY
REJECTION
RATIO PSRR VS = ±3 V to ±18 V 115 125 110 120 dB
LARGE SIGNAL
VOLTAGE GAIN A
VO
RL ⱖ 2 kΩ, 5000 12000 2000 6000 V/mV
VO = 610 V
5
OUTPUT
VOLTAGE
SWING V
O
RL ⱖ 10 kΩ±13.5 ± 14.0 ±13.5 ± 14.0 V
R
ⱖ 2 kΩ±12.5 ± 13.0 ±12.5 ± 13.0 V
L
RL ⱖ 1 kΩ±12.0 ± 12.5 ±12.0 ± 12.5 V
SLEW RATE
CLOSED-LOOP
BANDWIDTH
2
SR RL ⱖ 2 kΩ 0.1 0.3 0.1 0.3 V/µs
2
BW A
= 1 0.4 0.6 0.4 0.6 MHz
VCL
OPEN-LOOP
OUTPUT
RESISTANCE R
O
60 60 Ω
REV. C
–2–
Page 3
OP177
POWER
CONSUMPTION P
D
SUPPLY
CURRENT I
SY
OFFSET
ADJUSTMENT
RANGE RP = 20 kΩ±3 ±3mV
NOTES
1
Long-Term Input Offset Voltage Stability refers to the averaged trend line of VOS versus time over extended periods after the first 30 days of operation. Excluding the
initial hour of operation, changes in VOS during the first 30 operating days are typically less than 2.0 µV.
2
Sample tested.
3
Guaranteed by design.
4
Guaranteed by CMRR test condition.
5
To ensure high open-loop gain throughout the ± 10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.
Specifications subject to change without notice.
VS = ±15 V,
No Load 50 60 50 60 mW
Vs = ±3 V,
No Load 3.5 4.5 3.5 4.5 mW
VS = ±15 V,
No Load 1.6 2 1.6 2 mA
REV. C
–3–
Page 4
OP177–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
(@ VS = ⴞ15 V, –40ⴗC ≤ TA ≤ 85ⴗC, unless otherwise noted.)
OP177F OP177G
Parameter Symbol Conditions Min Typ Max Min Typ Max Unit
INPUT OFFSET VOLTAGE V
AVERAGE INPUT OFFSET
VOLTAGE DRIFT
1
INPUT OFFSET CURRENT I
AVERAGE INPUT OFFSET
CURRENT DRIFT
2
INPUT BIAS CURRENT I
AVERAGE INPUT BIAS
CURRENT DRIFT
2
OS
TCV
OS
TCI
B
TCI
OS
OS
–0.2 2.4 4 2.4 ± 6nA
B
15 40 20 100 µV
0.1 0.3 0.7 1.2 µV/°C
0.5 2.2 0.5 4.5 nA
1.5 40 1.5 85 pA/°C
8 40 15 60 pA/°C
INPUT VOLTAGE RANGE3IVR ±13 ±13.5 ± 13 ±13.5 V
COMMON-MODE
REJECTION RATIO CMRR VCM = ±13 V 120 140 110 140 dB
POWER SUPPLY
REJECTION RATIO PSSR VS = ±3 V to ±18 V 110 120 106 115 dB
LARGE-SIGNAL
VOLTAGE GAIN
OUTPUT VOLTAGE SWING V
POWER CONSUMPTION P
SUPPLY CURRENT I
NOTES
1
OP177TCVOS is sample tested.
2
Guaranteed by endpoint limits.
3
Guaranteed by CMRR test condition.
4
To ensure high open-loop gain throughout the ± 10 V output range, AVO is tested at –10 V ≤ VO ≤ 0 V, 0 V ≤ VO ≤ +10 V, and –10 V ≤ VO ≤ +10 V.
Specifications subject to change without notice.
4
A
VO
O
D
SY
RL ⱖ 2 kΩ, VO = 10 V 2000 6000 1000 4000 V/mV
RL ⱖ 2/kΩ±12 ±13 ±12 ± 13 V
VS = ±15 V, No Load 60 75 60 75 mW
VS = ±15 V, No Load 20 2.5 2 2.5 mA
200k⍀
50⍀
–
OP177
+
VOS =
VO
4000
V
O
Figure 2. Typical Offset Voltage Test Circuit
–
INPUT
+
–
OP177
+
V–
20k⍀
TRIM RANGE IS
V
OS
TYPICALLY ⴞ3.0mV
V+
OUTPUT
Figure 3. Optional Offset Nulling Circuit
REV. C–4–
Page 5
+20V
20k⍀
NULL
–
OP177
+
PINOUTS SHOWN FOR
P AND Z PACKAGES
–20V
Figure 4. Burn-In Circuit
OP177
ABSOLUTE MAXIMUM RATINGS
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 22 V
Internal Power Dissipation
1
. . . . . . . . . . . . . . . . . . . 500 mW
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . ± 30 V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
S, P Package . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
OP177F, OP177G . . . . . . . . . . . . . . . . . . –40°C to +85°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . 300°C
DICE Junction Temperature (T
Package Type
) . . . . . . . . –65°C to +150°C
J
2
JA
JC
Unit
8-Pin Plastic DIP (P) 103 43 °C/W
8-Pin SO (S) 158 43 °C/W
NOTES
1
For supply voltages less than ± 22 V, the absolute maximum input voltage is equal
to the supply voltage.
2
JA is specified for worst-case mounting conditions, i.e., JA is specified for
device in socket for P-DIP; JA is specified for device soldered to printed circuit
board for SO package.
ORDERING GUIDE
Temperature Package Package
Model Range Description Option
OP177FP –40°C to +85°C 8-Pin Plastic DIP N-8
OP177GP –40°C to +85°C 8-Pin Plastic DIP N-8
OP177FS –40°C to +85°C 8-Pin SO SO-8
OP177GS –40°C to +85°C 8-Pin SO SO-8
REV. C
–5–
Page 6
OP177–Typical Performance Characteristics
TPC 1. Gain Linearity (Input
Voltage vs. Output Voltage)
TPC 4. Offset Voltage Change
Due to Thermal Shock
TPC 2. Power Consumption vs.
Power Supply
TPC 5. Open-Loop Gain
vs. Temperature
TPC 3. Warm-Up VOS Drift
(Normalized) Z Package
TPC 6. Open-Loop Gain vs.
Power Supply Voltage
TPC 7. Input Bias Current
vs. Temperature
TPC 8. Input Offset Current
vs. Temperature
TPC 9. Closed-Loop Response
for Various Gain Configurations
REV. C–6–
Page 7
OP177
TPC 10. Open-Loop
Frequency Response
TPC 13. Total Input Noise
Voltage vs. Frequency
TPC 11. CMRR vs. Frequency
TPC 14. Input Wideband Noise
vs. Bandwidth (0.1 Hz to
Frequency Indicated)
TPC 12. PSRR vs. Frequency
TPC 15. Maximum Output Swing
vs. Frequency
REV. C
TPC 16. Maximum Output Voltage
vs. Load Resistance
TPC 17. Output Short-Circuit
Current vs. Time
–7–
Page 8
OP177
APPLICATION INFORMATION
Gain Linearity
The actual open-loop gain of most monolithic op amps varies at
different output voltages. This nonlinearity causes errors in
high closed-loop gain circuits.
It is important to know that the manufacturer’s A
specifi-
VO
cation is only a part of the solution, since all automated testers
use endpoint testing and, therefore, show only the average gain.
For example, Figure 5 shows a typical precision op amp with a
respectable open-loop gain of 650 V/mV. However, the gain is
not constant through the output voltage range, causing
nonlinear errors. An ideal op amp would show a horizontal
scope trace.
V
Y
V
X
–10V 0V +10V
Figure 5. Typical Precision Op Amp
V
Y
V
X
–10V
0V
+10V
Figure 6. Output Gain Linearity Trace
V
Y
10k⍀10k⍀
VIN = ⴞ10V
1M⍀
10⍀
–
OP177
+
V
X
R
L
THERMOCOUPLE AMPLIFIER WITH COLD-JUNCTION COMPENSATION
An example of a precision circuit is a thermocouple amplifier
that must amplify very low level signals accurately without
introducing linearity and offset errors to the circuit. In this
circuit, an S-type thermocouple, which has a Seebeck coefficient of 10.3 µV/°C, produces 10.3 mV of output voltage at
a temperature of 1000°C. The amplifier gain is set at 973.16.
Thus, it will produce an output voltage of 10.024 V. Extended
temperature ranges to beyond 1500°C can be accomplished by
reducing the amplifier gain. The circuit uses a low-cost diode to
sense the temperature at the terminating junctions and, in turn,
compensates for any ambient temperature change. The OP177,
with its high open-loop gain, plus low offset voltage and drift
combines to yield a very precision temperature sensing circuit.
Circuit values for other thermocouple types are shown in Table I.
Table I.
Thermo- Seebeck
couple Type Coefficient R1 R2 R7 R9
K 39.2 µV/°C 110 Ω 5.76 kΩ 102 kΩ 269 kΩ
J 50.2 µV/°C 100 Ω 4.02 kΩ 80.6 kΩ 200 kΩ
S 10.3 µV/°C 100 Ω 20.5 kΩ 392 kΩ 1.07 MΩ
47k⍀
1%
1%
100⍀
1%
R
R
R
3
2
1
10.000V
10F
+
R
8
1.0k⍀
0.05%
100⍀
(ZERO
ADJUST-
MENT)
50⍀
1%
R
5
R
4
ANALOG
GROUND
R
7
392k⍀
1%
OP177
10F
–
+
+15V
–15V
R
9
1.07M⍀
0.05%
0.1F
10F
10F
0.1F
ANALOG
GROUND
V
OUT
+15V
TYPES
2
2.2F
+
ISOTHERMAL
COLD-
JUNCTIONS
–
+
ISOTHERMAL
BLOCK
COLD-JUNCTION
COMPENSATION
REF01
4
6
20.5k⍀
COPPER
COPPER
Figure 7. Open-Loop Gain Linearity Test Circuit
Figure 6 shows the OP177’s output gain linearity trace with its
truly impressive average A
of 12000 V/mV. The output trace
VO
is virtually horizontal at all points, assuring extremely high gain
accuracy. ADI also performs additional testing to ensure
consistent high open-loop gain at various output voltages.
Figure 7 is a simple open-loop gain test circuit for your own
evaluation.
–8–
Figure 8. Thermocouple Amplifier with Cold Junction
Compensation
PRECISION HIGH GAIN DIFFERENTIAL AMPLIFIER
The high gain, gain linearity, CMRR, and low TCVOS of the
OP177 make it possible to obtain performance not previously
available in single stage, very high gain amplifier applications.
See Figure 9.
For best CMR,
R1
must equal
R2
R3
. In this example, with a
R4
10 mV differential signal, the maximum errors are as listed in
Table II.
REV. C
Page 9
Figure 9. Precision High Gain Differential Amplifier
Table II. High Gain Differential Amp Performance
Type Amount
OP177
ISOLATING LARGE CAPACITIVE LOADS
The circuit in Figure 10 reduces maximum slew rate but allows
driving capacitive loads of any size without instability. Because
the 100 Ω resistor is inside the feedback loop, its effect on
output impedance is reduced to insignificance by the high openloop gain of the OP177.
Common-Mode Voltage 0.1%/V
Gain Linearity, Worst Case 0.02%
TCV
TCI
OS
OS
0.0003%/°C
0.008%/°C
Figure 11. Bilateral Current Source
Figure 10. Isolating Capacitive Loads
REV. C
Figure 12. Precision Absolute Value Amplifier
–9–
Page 10
OP177
BILATERAL CURRENT SOURCE
The current sources shown in Figure 11 will supply both
positive and negative current into a grounded load.
Note that ZO
=
R5+ R4
R5
R2
R4
R2
–
+1
R3
R1
and that for ZO to be infinite,
R5+ R4
R2
must =
R3
R1
PRECISION ABSOLUTE VALUE AMPLIFIER
The high gain and low TCVOS assure accurate operation with
inputs from microvolts to volts. In this circuit, the signal always
appears as a common-mode signal to the op amps. See Figure 12.
Figure 13. Precision Positive Peak Detector
PRECISION POSITIVE PEAK DETECTOR
In Figure 13, the CH must be of polystyrene, Teflon,* or
polyethylene to minimize dielectric absorption and leakage. The
droop rate is determined by the size of C
and the bias current
H
of the OP41.
PRECISION THRESHOLD DETECTOR/AMPLIFIER
In Figure 14, when VIN < VTH, amplifier output swings nega-
. V
tive, reverse biasing diode D
V
≥ VTH, the loop closes,
IN
V
OUT=VTH
+ VIN–V
= VTH if RL = ∞. When
1
OUT
()
TH
1+
R
F
R
S
CC is selected to smooth the response of the loop.
*Teflon is a registered trademark of DuPont.
Figure 14. Precision Threshold Detector/Amplifier
–10–
REV. C
Page 11
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Pin Plastic DIP
(N-8)
OP177
PIN 1
0.210
(5.33)
MAX
0.160 (4.06)
0.115 (2.93)
0.022 (0.558)
0.014 (0.356)
PIN 1
0.0098 (0.25)
0.0040 (0.10)
8
1
0.430 (10.92)
0.348 (8.84)
8
1
0.1968 (5.00)
0.1890 (4.80)
0.0500
(1.27)
BSC
0.100
(2.54)
BSC
0.0192 (0.49)
0.0138 (0.35)
5
4
0.070 (1.77)
0.045 (1.15)
8-Pin SO
(SO-08)
5
0.1574 (4.00)
0.1497 (3.80)
4
0.0688 (1.75)
0.0532 (1.35)
0.280 (7.11)
0.240 (6.10)
0.060 (1.52)
0.015 (0.38)
0.130
(3.30)
MIN
SEATING
PLANE
0.2440 (6.20)
0.2284 (5.80)
0.0098 (0.25)
0.0075 (0.19)
0.325 (8.25)
0.300 (7.62)
0.015 (0.381)
0.008 (0.204)
0.0196 (0.50)
0.0099 (0.25)
8
°
0
°
0.195 (4.95)
0.115 (2.93)
x 45
0.0500 (1.27)
0.0160 (0.41)
°
Revision History
Location Page
01/30—Data Sheet changed from REV. B to REV. C.
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PIN CONNECTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2, 3
Global deletion of references to OP177E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3, 4, 10
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edits to PACKAGE TYPE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Edit to OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
REV. C
–11–
Page 12
C00289-0-2/02(C)
–12–
PRINTED IN U.S.A.
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