Datasheet OP11EPZ Specification

Page 1
Quad Matched
V

FEATURES

Guaranteed VOS: 500 μV maximum Guaranteed matched CMRR: 94 dB minimum Guaranteed matched V LM148/LM348 direct replacement Low noise Silicon-nitride passivation Internal frequency compensation Low crossover distortion Continuous short-circuit protection Low input bias current

GENERAL DESCRIPTION

The OP11 provides four matched 741-type operational amplifiers in a single 14-lead PDIP. The OP11 is pin compatible with the LM148, LM348, RM4156, RM4158, and HA4741 amplifiers. The amplifier is matched for common-mode rejection ratio and offset voltage, which is very important in designing instrumentation amplifiers. In addition, the amplifier is designed to have equal positive-going and negative-going slew rates, which is an important consideration for good audio system performance.
The OP11 is ideal for use in designs requiring minimum space and cost while maintaining performance.
: 750 μV maximum
OS
+
741-Type Operational Amplifiers
OP11

PIN CONFIGURATION

OUT A
1
2
–IN A
3
+IN A
4
V+
OP11
5
+IN B
–IN B
6
OUT B
7
Figure 1. 14-Lead PDIP (N-14)
(P Suffix)
14
13
12
11
10
9
8
OUT D
–IN D
+IN D
V–
+IN C
–IN C
OUT C
02784-001
IN
+IN
OUTPUT
V–
Figure 2. Simplified Schematic
02784-003
Rev. B
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Anal og Devices for its use, nor for any infringements of patents or ot her rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
Page 2
OP11

TABLE OF CONTENTS

Features .............................................................................................. 1
General Description......................................................................... 1
Pin Configuration............................................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Electrical Characteristics............................................................. 3

REVISION HISTORY

6/07—Rev. A to Rev. B
Updated Format..................................................................Universal
Deleted 14-Lead Hermetic DIP/CERDIP .......................Universal
Changes to Table 1............................................................................ 3
Deleted Table 3; Renumbered Sequentially .................................. 3
Changes to Table 2, Layout, Table 3, and Table 4 ......................... 4
Changes to Table 5 and Table 6....................................................... 5
Changes to Figure 17........................................................................ 8
Updated Outline Dimensions......................................................... 9
Changes to Ordering Guide............................................................ 9
4/02—Rev. 0 to Rev. A
Change OP-09/OP-11 to OP11..............................................Global
Edits to Pin Connections................................................................. 1
Edits to Figure 1................................................................................ 1
Edits to Absolute Maximum Ratings ............................................. 2
Edits to Ordering Guide .................................................................. 2
Edits to Spec Tables .......................................................................2-4
Deletion of Dice Characteristics..................................................... 5
Deletion of Wafer Test Limits Table ............................................... 5
Deletion of Typical Electrical Characteristics Table .................... 5
Matching Characteristics..............................................................4
Absolute Maximum Ratings ............................................................5
ESD Caution...................................................................................5
Typical Perf or m an c e Charac t e r istics ..............................................6
Outline Dimensions ..........................................................................9
Ordering Guide .............................................................................9
Rev. B | Page 2 of 12
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OP11

SPECIFICATIONS

ELECTRICAL CHARACTERISTICS

VS = ±15 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter Symbol Conditions Min Typ Max Unit
Input Offset Voltage VOS RS ≤ 10 kΩ 0.3 0.5 mV Input Offset Current IOS 5.5 20 nA Input Bias Current IB 180 300 nA Input Resistance Differential Mode Input Voltage Range IVR ±12 ±13 V Common-Mode Rejection Ratio CMRR VCM = ±12 V, RS ≤ 10 kΩ 100 120 dB Power Supply Rejection Ratio PSRR VS = ±5 V to ±15 V, RS ≤ 10 kΩ 4 32 μV/V Output Voltage Swing VO RL = 2 kΩ ±11 ±13 V Large Signal Voltage Gain AVO RL ≤ 2 kΩ, VO = ±10 V 100 650 V/mV Power Consumption
2
Input Noise Voltage en p-p 0.1 Hz to 10 Hz 0.7 μV p-p Input Noise Voltage Density en fO = 10 Hz 18 nV/√Hz f f Input Noise Current In p-p 0.1 Hz to 10 Hz 17 pA p-p Input Noise Current Density In fO = 10 Hz 1.8 pA/√Hz f f Channel Separation CS 100 130 dB Slew Rate Large Signal Bandwidth Closed-Loop Bandwidth Rise Time Overshoot
1
Guaranteed by input bias current.
2
Total dissipation for all four amplifiers in package.
3
Sample tested.
4
Guaranteed by rise time.
3
3
4
3
3
1
RIN 0.17 0.29
Pd VO = 0 V 105 180 mW
= 100 Hz 14 nV/√Hz
O
= 1 kHz 12 nV/√Hz
O
= 100 Hz 1.5 pA/√Hz
O
= 1 kHz 1.2 pA/√Hz
O
SR 0.7 1.0 V/μs V BW A
= 20 V p-p 11 16 kHz
O
= 1 2.4 3.0 MHz
VCL
tf AV = 1, VIN = 50 mV 110 145 ns OS 15 25 %
Rev. B | Page 3 of 12
Page 4
OP11
VS = ±15 V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
Input Offset Voltage VOS RS ≤ 10 kΩ 0.4 0.8 mV Average Input Offset Voltage Drift Input Offset Current IOS 14 30 nA Average Input Offset Current Drift Input Bias Current IB 200 350 nA Input Voltage Range IVR ±12 ±13 V Common-Mode Rejection Ratio CMRR VCM = ±12 V, RS ≤ 10 kΩ 100 120 dB Power Supply Rejection Ratio PSRR VS = ±5 V to ±15 V, RS ≤ 10 kΩ 4 32 μV/V Large Signal Voltage Gain AVO RL ≥ 2 kΩ, VO = ±10 V 50 250 V/mV Output Voltage Swing VO RL ≥ 2 kΩ ±11 ±13 V Power Consumption
1
Guaranteed but not tested.
2
Total dissipation for all four amplifiers in package.
2

MATCHING CHARACTERISTICS

VS = ±15 V, TA = 25°C, RS ≤ 100 Ω, unless otherwise noted.
Table 3.
Parameter Symbol Conditions Min Typ Max Unit
Input Offset Voltage Match ΔVOS 0.5 0.75 mV Common-Mode Rejection ΔCMRR VCM = ±12 V 1 20 μV/V Ratio Match VCM = ±12 V 94 120 dB
VS = ±15 V, 0°C ≤ TA ≤ 70°C, RS ≤ 100 Ω, unless otherwise noted.
1
1
TCVOS RS ≤ 10 kΩ 2.0 10 μV/°C
TCIOS 0.1 0.3 nA/°C
Pd VO = 0 V 115 200 mW
Table 4.
Parameter Symbol Conditions Min Typ Max Unit
Input Offset Voltage Match ΔVOS 0.6 1.0 mV Common-Mode Rejection ΔCMRR VCM = ±12 V 3.2 20 μV/V Ratio Match VCM = ±12 V 94 110 dB
Rev. B | Page 4 of 12
Page 5
OP11

ABSOLUTE MAXIMUM RATINGS

Table 5.
Parameter Rating
Supply Voltage (VS) ±22 V Differential Input Voltage ±30 V Input Voltage Supply Voltage Output Short-Circuit Duration
Continuous
(One Amp Only) Storage Temperature Range −65°C to +125°C Lead Temperature (Soldering, 60 sec) 300°C Operating Temperature Range 0°C to 70°C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Table 6. Thermal Resistance
Package Type θ
14-Lead PDIP (N-14) 83 39 °C/W
1
θJA is specified for worst-case conditions, that is, θJA is specified for device in
socket for PDIP.
1
JA
θ
Unit
JC

ESD CAUTION

Rev. B | Page 5 of 12
Page 6
OP11

TYPICAL PERFORMANCE CHARACTERISTICS

0.1
VS = ±15V
800
700
VS = ±15V R
= 2k
L
–0.2
–0.3
–0.4
INPUT OFFSET VOLTAGE (mV)
–0.5
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (° C)
Figure 3. Input Offset Voltage vs. Temperature
20
VS = ±15V
15
10
5
INPUT OFFSET CURRENT (nA)
600
500
400
300
OPEN-LOOP GAIN (V/mV)
200
100
0
–60 –40 –20 0 20 40 60 80 100 120 140
02784-004
TEMPERATURE (°C)
02784-007
Figure 6. Open-Loop Gain vs. Temperature
120
100
80
PHASE
60
40
OPEN-LOOP GAIN (dB)
20
GAIN
VS = ±15V R
= 2k
L
T
= 25°C
A
C
= 100pF
L
0
45
90
135
180
PHASE LAG (Deg rees)
0 –60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 4. Input Offset Current vs. Temperature
300
VS = ±15V
200
100
INPUT BIAS CURRENT (nA)
0 –60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 5. Input Bias Current vs. Temperature
02784-005
02784-006
Rev. B | Page 6 of 12
0
0.1 1 10 100 1k 10k 100k 1M 10M
FREQUENCY ( Hz)
Figure 7. Open-Loop Gain and Phase vs. Frequency
1.4 VS = ±15V
1.3
1.2
1.1
1.0
0.9
0.8
0.7
NORMALIZ ED VALUE REFERRED TO 25°C
0.6
–60 –40 –20 0 20 40 60 80 100 120 140
BANDWIDTH
TEMPERATURE (°C)
SLEW RATE
Figure 8. Normalized Slew Rate and Bandwidth vs. Temperature
02784-008
02784-009
Page 7
OP11
R A
800
RL = 2k T
= 25°C
A
700
600
500
400
300
OPEN-LOOP GAIN (V/mV)
200
100
140
VS = ±15V
120
= 25°C
T
A
100
TION (dB)
80
60
40
CHANNEL SEPA
20
0
0 5 10 15 20
POWER SUPPLY VOLTAG E (V)
Figure 9. Open-Loop Gain vs. Power Supply Voltage
140
120
100
80
60
CMRR (dB)
40
20
0
1 10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 10. CMRR vs. Frequency
140
120
VS = ±15V T
= 25°C
A
VS = ±15V T
= 25°C
A
0
10 100 1k 10k 100k
02784-010
FREQUENCY (Hz)
02784-013
Figure 12. Channel Separation vs. Frequency
1k
VS = ±15V T
= 25°C
A
100
10
VOLTAGE NOISE DENSITY (nV/ Hz)
1
10 100 1k 10k
02784-011
FREQUENCY (Hz)
02784-014
Figure 13. Voltage Noise Density vs. Frequency
100
VS = ±15V
= 25°C
T
A
100
80
60
PSRR (dB)
40
20
0
1 10 100 1k 10k 100k
FREQUENCY (Hz)
Figure 11. PSRR vs. Frequency
02784-012
10
1
CURRENT NOISE DENSITY ( pA/ Hz)
0.1 10 100 1k 10k
FREQUENCY (Hz)
Figure 14. Current Noise Density vs. Frequency
02784-015
Rev. B | Page 7 of 12
Page 8
OP11
OUTPUT VOLTAGE SWING (V)
16
14
12
10
8
6
4
2
VS = ±15V
= 25°C
T
A
POSITIVE SWING
NEGATIVE SWING
VS = ±15V R
= 2k
L
T
= 25°C
A
C
= 100pF
20
0
OUTPUT VOLTAGE (mV)
–20
L
0 200 400 600 800
TIME (ns)
Figure 15. Transient Response
3
2
1
0
–1
OUTPUT VOLTAGE (V)
–2
–3
2 6 10 14 18 200481216
TIME (µs)
Figure 16. Voltage Follower Pulse Response
28
(27)
24
20
VS = ±15V R
= 2k
L
T
= 25°C
A
C
= 100pF
L
VS = ±15V R
= 2k
L
T
= 25°C
A
0
02784-016
0.1 1 10
LOAD RESISTANCE TO G ROUND (kΩ)
02784-019
Figure 18. Output Voltage Swing vs. Load Resistance
5
TA = 25°C
4
3
2
QUIESCENT CURRENT (mA)
1
0
02784-017
0102030
TOTAL SUPPLY VOLTAGE (V)
40
02784-020
Figure 19. Quiescent Current vs. Total Supply Voltage
140
VS = ±15V
130
16
12
8
MAXIMUM OUTPUT SWI NG (V)
4
0
1k 10k 100k 1M
FREQUENCY (Hz)
Figure 17. Maximum Output Swing vs. Frequency
02784-018
120
110
POWE R CONSUMP TIO N (mW)
100
–60 –40 –20 0 20 40 60 80 100 120 140
TEMPERATURE (°C)
Figure 20. Power Consumption vs. Temperature
02784-021
Rev. B | Page 8 of 12
Page 9
OP11

OUTLINE DIMENSIONS

0.775 (19.69)
0.750 (19.05)
0.735 (18.67)
0.210 (5.33)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
MAX
14
1
0.100 (2.54) BSC
0.070 (1.78)
0.050 (1.27)
0.045 (1.14)
8
7
0.280 (7. 11)
0.250 (6.35)
0.240 (6.10)
0.015 (0.38) MIN
SEATING PLANE
0.005 (0.13) MIN
0.060 (1.52) MAX
0.015 (0.38) GAUGE
PLANE
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.430 (10.92) MAX
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
CONTROLL ING DIMENS IONS ARE IN INCHES; MILLIMETE R DIMENSIONS (IN PARENTHESES) ARE ROUNDED-OF F INCH EQUIVALENTS FOR REFERENCE ONLY AND ARE NOT APPROPRI ATE FOR USE IN DES IGN. CORNER LEADS M AY BE CONFIGURED AS WHOLE OR HALF LEADS.
COMPLIANT TO JEDEC STANDARDS MS-001
070606-A
Figure 21. 14-Lead Plastic Dual In-Line Package [PDIP]
(N-14)
[P Suffix]
Dimensions shown in inches and (millimeters)

ORDERING GUIDE

Model Temperature Range Package Description Package Option
OP11EP 0°C to 70°C 14-Lead Plastic Dual In-Line Package (PDIP) N-14 (P-Suffix) OP11EPZ
1
Z = RoHS Compliant Part.
For military processed devices, refer to the Standard Microcircuit Drawing (SMD) available at
http://www.dscc.dla.mil/downloads/Milspec/Smd/89801.pdf.
SMD Part Number Analog Devices, Inc. Equivalent
5962-89801012A OP11ARCMDA 5962-8980101CA OP11AYMDA
1
0°C to 70°C 14-Lead Plastic Dual In-Line Package (PDIP) N-14 (P-Suffix)
Rev. B | Page 9 of 12
Page 10
OP11
NOTES
Rev. B | Page 10 of 12
Page 11
OP11
NOTES
Rev. B | Page 11 of 12
Page 12
OP11
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. C02784-0-6/07(B)
Rev. B | Page 12 of 12
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