Page 1
Ultralow Offset Voltage
8
7
6
5
1
2
3
4
NC = NO CONNECT
V
OS
TRIM
–IN
+IN
V
OS
TRIM
V+
OUT
NCV–
OP07
a
FEATURES
Low V
Low V
Ultra-Stable vs. Time: 1.5 V/Month Max
Low Noise: 0.6 V p-p Max
Wide Input Voltage Range: 14 V
Wide Supply Voltage Range: 3 V to 18 V
Fits 725,108A/308A, 741, AD510 Sockets
125C Temperature-Tested Dice
APPLICATIONS
Wireless Base Station Control Circuits
Optical Network Control Circuits
Instrumentation
Sensors and Controls
Precision Filters
GENERAL DESCRIPTION
The OP07 has very low input offset voltage (75 µV max for
OP07E) which is obtained by trimming at the wafer stage. These
low offset voltages generally eliminate any need for external nulling. The OP07 also features low input bias current (±4 nA for
OP07E) and high open-loop gain (200 V/mV for OP07E). The
low offsets and high open-loop gain make the OP07 particularly
useful for high-gain instrumentation applications.
The wide input voltage range of ±13 V minimum combined with
high CMRR of 106 dB (OP07E) and high input impedace provides high accuracy in the noninverting circuit configuration.
Excellent linearity and gain accuracy can be maintained even at
: 75 V Max
OS
Drift: 1.3 V/C Max
OS
Thermocouples
RTDs
Strain Bridges
Shunt Current Measurements
Operational Amplifiers
OP07
PIN CONNECTIONS
Epoxy Mini-Dip (P-Suffix)
8-Pin SO (S-Suffix)
high closed-loop gains. Stability of offsets and gain with time or
variations in temperature is excellent. The accuracy and stability
of the OP07, even at high gain, combined with the freedom
from external nulling have made the OP07 an industry standard
for instrumentation applications.
The OP07 is available in two standard performance grades. The
OP07E is specified for operation over the 0°C to 70°C range, and
OP07C over the –40°C to +85°C temperature range.
The OP07 is available in epoxy 8-lead Mini-DIP and 8-lead SOIC.
It is a direct replacement for 725,108A, and OP05 amplifiers;
741-types may be directly replaced by removing the 741’s nulling
potentiometer. For improved specifications, see the OP177 or
OP1177. For ceramic DIP and TO-99 packages and standard
micro circuit (SMD) versions, see the OP77.
Figure 1. Simplified Schematic
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 www.analog.com
Fax: 781/326-8703 © Analog Devices, Inc., 2002
Page 2
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS
(VS = 15 V, TA = 25C, unless otherwise noted.)
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
Long-Term V
Input Offset Current I
Input Bias Current I
Input Noise Voltage e
Input Noise Voltage Density e
Input Noise Current I
Input Noise Current Density I
Input Resistance—Differential Mode
Input Resistance—Common-Mode R
Stability
OS
1
2
V
OS
30 75 µV
VOS/Time 0.3 1.5 µV/Mo
OS
B
p-p 0.1 Hz to 10 Hz
n
n
p-p 14 30 pA p-p
n
n
4
R
IN
INCM
fO = 10 Hz 10.3 18.0 nV√Hz
f
= 100 Hz
O
f
= 1 kHz 9.6 11.0 nV√Hz
O
fO = 10 Hz 0.32 0.80 pA√Hz
f
= 100 Hz
O
= 1 kHz 0.12 0.17 pA√Hz
f
O
3
3
3
15 50 mΩ
0.5 3.8 nA
±1.2 ±4.0 nA
0.35 0.6 µV p-p
10.0 13.0 nV√Hz
0.14 0.23 pA√Hz
160 GΩ
Input Voltage Range IVR ±13 ± 14 V
Common-Mode Rejection Ratio CMRR V
Power Supply Rejection Ratio PSRR V
Large-Signal Voltage Gain A
VO
= ±13 V 106 123 dB
CM
= ±3 V to ±18 V 5 20 µV/V
S
RL ≥ 2 kΩ, VO = ±10 V 200 500 V/mV
R
≥ 500 Ω, VO = ±0.5 V,
L
VS = ±3 V
4
150 400 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
O
RL ≥ 10 kΩ±12.5 ±13.0 V
≥ 2 kΩ±12.0 ±12.8 V
R
L
RL ≥ 1 kΩ±10.5 ±12.0 V
DYNAMIC PERFORMANCE
Slew Rate SR RL ≥ 2 kΩ
Closed-Loop Bandwidth BW A
Closed-Loop Output Resistance R
Power Consumption P
O
d
VOL
VO = 0, IO = 0 60 Ω
VS = ±15 V, No Load 75 120 mW
V
S
= 1
3
5
0.1 0.3 V/µs
0.4 0.6 MHz
= ±13 V, No Load 4 6 mW
Offset Adjustment Range RP = 20 kΩ±4mV
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of VOS vs. Time over extended periods after the first 30 days of operation. Excluding the ini-
tial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 µV refer to the typical performance curves. Parameter is sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Specifications subject to change without notice.
–2–
REV. A
Page 3
OP07
OP07C ELECTRICAL CHARACTERISTICS
(VS = 15 V, TA = 25C, unless otherwise noted.)
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
Long-Term V
Input Offset Current I
Input Bias Current I
Input Noise Voltage e
Input Noise Voltage Density e
Input Noise Current I
Input Noise Current Density I
Input Resistance- Differential Mode
Input Resistance- Common-Mode R
Stability
OS
1
2
V
OS
60 150 µV
VOS/Time 0.4 2.0 µV/Mo
OS
B
p-p 0.1 Hz to 10 Hz
n
n
p-p 15 35 pA p-p
n
n
4
R
IN
INCM
fO = 10 Hz 10.5 20.0 nV√Hz
f
= 100 Hz
O
= 1 kHz 9.8 11.5 nV√Hz
f
O
fO = 10 Hz 0.35 0.90 pA√Hz
= 100 Hz
f
O
= 1 kHz 0.13 0.18 pA√Hz
f
O
3
3
3
833 mΩ
0.8 6.0 nA
±1.8 ±7.0 nA
0.38 0.65 µV p-p
10.2 13.5 nV√Hz
0.15 0.27 pA√Hz
120 GΩ
Input Voltage Range IVR ±13 ± 14 V
Common-Mode Rejection Ratio CMRR V
Power Supply Rejection Ratio PSRR V
Large-Signal Voltage Gain A
VO
= ±13 V 100 120 dB
CM
= ±3 V to ±18 V 7 32 µV/V
S
RL ≥ 2 kΩ, VO = ±10 V 120 400 V/mV
R
≥ 500 Ω, VO = ±0.5 V,
L
VS = ±3 V
4
100 400 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
O
RL ≥ 10 kΩ±12.0 ±13.0 V
R
≥ 2 kΩ±11.5 ±12.8 V
L
RL ≥ 1 kΩ±12.0 V
DYNAMIC PERFORMANCE
Slew Rate SR RL ≥ 2 kΩ
Closed-Loop Bandwidth BW A
Closed-Loop Output Resistance R
Power Consumption P
O
d
VOL
VO = 0, IO = 0 60 Ω
VS = ±15 V, No Load 80 150 mW
V
S
= 1
3
5
0.1 0.3 V/µs
0.4 0.6 MHz
= ±13 V, No Load 4 8 mW
Offset Adjustment Range RP = 20 kΩ±4mV
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Long-term input offset voltage stability refers to the averaged trend time of VOS vs. Time over extended periods after the first 30 days of operation. Excluding the ini-
tial hour of operation, changes in VOS during the first 30 operating days are typically 2.5 µV refer to the typical performance curves. Parameter is sample tested.
3
Sample tested.
4
Guaranteed by design.
5
Guaranteed but not tested.
Specifications subject to change without notice.
REV. A
–3–
Page 4
OP07–SPECIFICATIONS
OP07E ELECTRICAL CHARACTERISTICS
(VS = 15 V, 0C ≤ TA ≤ 70C, unless otherwise noted.)
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
Voltage Drift without External Trim
Voltage Drift with External Trim
Input Offset Current I
Input Offset Current Drift TCI
Input Bias Current I
Input Bias Current Drift TCI
1
V
OS
2
TCV
TCV
OS
B
OS
OSN
OS
B
RP = 20 kΩ 0.3 1.3 µV/°C
3
45 130 µV
0.3 1.3 µV/°C
0.9 5.3 nA
8 35 pA/°C
±1.5 ± 5.5 nA
13 35 pA/°C
Input Voltage Range IVR ±13 ± 13.5 V
Common-Mode Rejection Ratio CMRR V
Power Supply Rejection Ratio PSRR V
Large-Signal Voltage Gain A
VO
= ±13 V 103 123 dB
CM
= ±3 V to ±18 V 7 32 µV/V
S
RL ≥ 2 kΩ, VO = ±10 V 180 450 V/mV
OUTPUT CHARACTERISTICS
Output Voltage Swing V
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Guaranteed by design.
3
Sample tested.
Specifications subject to change without notice.
O
RL ≥ 10 kΩ±12 ± 12.6 V
(VS = 15 V, 40C ≤ TA ≤ 85C, unless otherwise noted.)
OP07C ELECTRICAL CHARACTERISTICS
Parameter Symbol Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Offset Voltage
Voltage Drift without External Trim
Voltage Drift with External Trim
Input Offset Current I
Input Offset Current Drift TCI
Input Bias Current I
Input Bias Current Drift TCI
Input Voltage Range IVR ±13 ± 13.5 V
Common-Mode Rejection Ratio CMRR V
Power Supply Rejection Ratio PSRR V
Large-Signal Voltage Gain A
OUTPUT CHARACTERISTICS
Output Voltage Swing V
NOTES
1
Input offset voltage measurements are performed by automated test equipment approximately 0.5 seconds after application of power.
2
Guaranteed by design.
3
Sample tested.
Specifications subject to change without notice.
1
V
OS
2
TCV
TCV
OS
B
VO
O
OS
OSN
OS
B
RP = 20 kΩ 0.4 1.8 µV/°C
= ±13 V 97 120 dB
CM
= ±3 V to ±18 V 10 51 µV/V
S
RL ≥ 2 kΩ, VO = ±10 V 100 400 V/mV
RL ≥ 10 kΩ±11 ± 12.6 V
3
85 250 µV
0.5 1.8 µV/°C
1.6 8.0 nA
12 50 pA/°C
±2.2 ± 9.0 nA
18 50 pA/°C
–4–
REV. A
Page 5
OP07
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage (VS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Input Voltage* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±22 V
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . ±30 V
Output Short-Circuit Duration . . . . . . . . . . . . . . . . Indefinite
Storage Temperature Range
S, P Packages . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Package Type JA*
8-Lead Plastic DIP (P) 103 43 °C/W
8-Lead SOIC (S) 158 43 °C/W
*JA is specified for worst case conditions, i.e.,
for P-DIP package,
for SO package.
is specified for device soldered to printed circuit board
JA
Operating Temperature Range
OP07E . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
OP07C . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . . . . . . . . . . 150°C
Lead Temperature Range (Soldering, 60 sec) . . . . . . . . 300°C
*For supply voltages less than ± 22 V, the absolute maximum input voltage is equal
to the supply voltage.
ORDERING GUIDE
Temperature Package Package Branding
Model Range Description Option Information
OP07EP 0°C to 70°C 8-Lead Epoxy DIP P-8
OP07CP –40°C to 85°C 8-Lead Epoxy DIP P-8
OP07CS –40°C to 85°C 8-Lead SOIC S-8
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the OP07 features proprietary ESD protection circuitry, permanent damage may occur on devices
subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
JC
is specified for device in socket
JA
Units
WARNING!
ESD SENSITIVE DEVICE
REV. A
–5–
Page 6
OP07
– Typical Performance Characteristics
1000
VS = 15V
800
600
400
OPEN-LOOP GAIN – V/mV
200
0
050
TEMPERATURE – C
100–50
TPC 1. Open-Loop Gain vs.
Temperature
1.0
0.8
0.6
0.4
0.2
0
MAXIMUM ERROR REFERRED TO INPUT – mV
100 100k1k
MATCHED OR UNMATCHED SOURCE RESISTANCE –
OP07C
OP07E
10k
TPC 4. Maximum Error vs.
Source Resistance
30
VS = 15V
= 25C, TA = 70C
T
A
25
20
15
10
OFFSET VOLTAGE – V
5
ABSOLUTE CHANGE IN INPUT
0
–20 1000
THERMAL
SHOCK
RESPONSE
BAND
DEVICE IMMERSED
IN 70C OIL BATH
20 40 60 80
TIME – s
TPC 2. Offset Voltage Change Due to
Thermal Shock
1.2
VS = 15V
TA 70C
0C
1.0
0.8
0.6
0.4
OP07C
0.2
OP07E
0
MAXIMUM ERROR REFERRED TO INPUT – mV
100 100k1k
MATCHED OR UNMATCHED SOURCE RESISTANCE –
10k
TPC 5. Maximum Error vs.
Source Resistance
25
VS = 15V
= 25C
T
A
20
15
10
OFFSET VOLTAGE – V
5
ABSOLUTE CHANGE IN INPUT
0
OP07C
OP07E
051
TIME AFTER SUPPLY TURN-ON – Minutes
234
TPC 3. Warm-Up Drift
30
AT | V
| < 1.0V. |IB| < 7nA (OP07C)
DIFF
= 15V
V
S
20
= 25C
T
A
10
0
–10
–20
–30
NON-INVERTING INPUT BIAS CURRENT – mA
–30 30–20
–10 0 10 20
DIFFERENTIAL INPUT VALUE – V
TPC 6. Input Bias Current vs.
Differential Input Voltage
4
VS = 15V
3
OP07C
OP07E
INPUT BIAS CURRENT – nA
2
1
0
050
TEMPERATURE – C
TPC 7. Input Bias Current vs.
Temperature
2.5
VS = 15V
2.0
1.5
1.0
0.5
INPUT OFFSET CURRENT – nA
100–50
0 100–50
TEMPERATURE – C
OP07C
OP07E
050
TPC 8. Input Offset Current vs.
0
REFERRED TO INPUT
5mV/CM AT OUTPUT
0
0
0
0
0
VO LTAG E – 200nV/DIV
0
0
TIME – 1s/DIV
TPC 9. Low Frequency Noise
Temperature
–6–
REV. A
Page 7
OP07
1000
100
10
INPUT NOISE VOLTAGE – nV/ Hz
VS = 15V
T
1.0
1.0 1k
RS1 = RS2 = 200K
THERMAL NOISE SOURCE
RESISTORS INCLUDED
= 25C
A
FREQUENCY – Hz
EXCLUDED
RS = 0
10010
TPC 10. Total Input Noise Voltage
vs. Frequency
130
OP07
CMRR – dB
120
110
100
OP07C
90
80
70
10
VS = 15V
= 25C
T
A
V
1
RMS NOISE –
0.1
1.0 1k10010
FREQUENCY – Hz
TPC 11. Input Wideband Noise vs
Bandwidth (0.1 Hz to Frequency
Indicated)
1000
800
600
400
OPEN-LOOP GAIN – V/mV
200
TA = 25C
130
120
110
100
90
CMRR – dB
80
70
60
1.0 100k10
OP07C
OP07
100 1k 10k
FREQUENCY – HZ
TPC 12. CMRR vs. Frequency
120
VS = 15V
T
80
40
0
OPEN-LOOP GAIN – dB
= 25C
A
60
1.0 100k10
100 1k 10k
FREQUENCY – HZ
TPC 13. PSRR vs. Frequency
100
VS = 15V
= 25C
T
A
CLOSED-LOOP GAIN – dB
–20
80
60
40
20
0
10 10M100
1k 10k 100k 1M
FREQUENCY – Hz
TPC 16. Closed-Loop Response
for Various Gain Configurations
0
0
POWER SUPPLY VOLTAGE – V
10 15
TPC 14. Open-Loop Gain vs
Power Supply Voltage
28
24
20
16
12
8
PEAK-TO-PEAK AMPLITUDE – V
4
0
1k 1M10k
FREQUENCY – Hz
100k
VS = 15V
= 25C
T
A
TPC 17. Maximum Output Swing
vs. Frequency
205
–40
0.1 10M1
10 100 1k 10k 100k 1M
FREQUENCY – Hz
TPC 15. Open-Loop Frequency
Response
20
VS = 15V
= 10mV
V
IN
= 25C
T
A
15
10
5
0
ABSOLUTE VALUE OF OFFSET VOLTAGE – V
100 10k1k
LOAD RESISTANCE TO GROUND –
TPC 18. Maximum Output Voltage
vs. Load Resistance
POSITIVE SWING
NEGATIVE SWING
REV. A
–7–
Page 8
OP07
1000
100
VIN (PIN 3) = +10mV, VO = –15V
10
INPUT NOISE VOLTAGE – nV/ Hz
1.0
060
VIN (PIN 3) = –10mV, VO = +15V
FREQUENCY – Hz
4020
VS = 15V
= 25C
T
A
TPC 19. Power Consumption
vs. Power Supply
4
VOS TRIMMED TO < 5V AT 25C
NULLING POT = 20k
3
OP07C
2
OP07C
1
OP07E
0
ABSOLUTE VALUE OF OFFSET VOLTAGE – V
TEMPERATURE – C
OP07E
050
100–50
1000
100
10
INPUT NOISE VOLTAGE – nV/ Hz
1.0
060
TPC 20. Output Short-Circuit
Current vs. Time
16
12
V
8
4
0
–4
0.2V/mo.
TREND LINE
–8
TOTAL DRIFT WITH TIME –
–12
–16
0121
VS = 15V
= 25C
T
A
VIN (PIN 3) = +10mV, VO = –15V
VIN (PIN 3) = –10mV, VO = +15V
FREQUENCY – Hz
0.3V/mo.
TREND LINE
0.3V/mo. TREND LINE
234567891011
TIME – Months
4020
0.2V/mo.
TREND LINE
0.2V/mo.
TREND LINE
0.3V/mo. TREND LINE
4
VS = 15V
= 100
R
S
3
2
1
0
ABSOLUTE VALUE OF OFFSET VOLTAGE – V
050
TEMPERATURE – C
OP07C
OP07E
100–50
TPC 21. Untrimmed Offset Voltage
vs. Temperature
TPC 22. Trimmed Offset Voltage
vs. Temperature
TPC 23. Offset Voltage Stability
vs. Time
–8–
REV. A
Page 9
OP07
R
R1
IN
V+
7
2
3
4
OP07C
A1
V–
SUM MODE
BIAS
R3
3k
R5
10k
6
R2
100k
RF
EO = –E
IN
R1
Figure 2. Typical Offset Voltage Test Circuit
R1
E
10k
1
R2
E
10k
2
R3
E
10k
3
R5
2.5k
2
3
2
3
R4
10k
RF
V+
7
E
O
6
AD7115 OR
4
AD8510A
V–
RF
– I
BIAS
E
10V
R1
IN
10k
R3
10k
V+
7
2
3
OP07
4
V–
R2
10k
FD333
6
FD333
R4
10k
D1
D2
R5
10k
V+
7
2
3
OP07
4
V–
R1R3R2
6
0V TO 10V
=
R4
E
O
Figure 5. Burn-In circuit
+15V
7
E
O
6
OP07C
4
–15V
Figure 3. Typical Low-Frequency Noise Circuit
R3
V+
7
2
3
4
V–
E
2
REFERENCE
SENDING
JUNCTION
JUNCTION
R1
R2
R4
Figure 4. Optional Offset Nulling Circuit
OP07
R1
R3
Figure 6. High-Speed, Low VOS Composite Amplifier
E
O
6
R2
=
R4
Figure 7. Adjustment-Free Precision Summing Amplifier
REV. A
–9–
Page 10
OP07
TYPICAL APPLICATIONS
Figure 8. High-Stability Thermocouple Amplifier
APPLICATIONS INFORMATION
OP07 series units may be substituted directly into 725, 108A/
308A
*
and OP05 sockets with or without removal of external
compensation or nulling components. Additionally, the OP07
may be used in unnulled 741 type sockets. However, if conventional 741 nulling circuitry is in use, it should be modified or
removed to enable proper OP07 operation. OP07 offset voltage
may be nulled to zero through use of a potentiometer (see offset
nulling circuit diagram).
PRECISION ABSOLUTE-VALUE CIRCUIT
The OP07 provides stable operation with load capacitance of
up to 500 pF and ±10 V swings; larger capacitances should be
decoupled with a 50 Q decoupling resistor.
Stray thermoelectric voltages generated by dissimilar metals at
the contacts to the input terminals can degrade drift performance.
Therefore, best operation will be obtained when both input contacts are maintained at the same temperature, preferably close to
the package temperature.
*
TO-99 Package only
Figure 9. Precision Absolute-Value Circuit
–10–
REV. A
Page 11
0.1574 (4.00)
0.1497 (3.80)
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
8-Lead SO DIP
(S-Suffix)
0.1968 (5.00)
0.1890 (4.80)
85
0.2440 (6.20)
0.2284 (5.80)
41
OP07
PIN 1
0.0098 (0.25)
0.0040 (0.10)
SEATING
PLANE
0.0500 (1.27)
BSC
0.0192 (0.49)
0.0138 (0.35)
0.0688 (1.75)
0.0532 (1.35)
0.0098 (0.25)
0.0075 (0.19)
0.0196 (0.50)
0.0099 (0.25)
8
0.0500 (1.27)
0
0.0160 (0.41)
45
Revision History
Location Page
Data Sheet changed from REV. 0 to REV. A.
Edits to FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to PIN CONNECTION drawings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Edits to ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Deleted ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2–3
Deleted OP07D Column from ELECTRICAL CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4–5
Edits to TPCs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7–9
Edits to HIGH-SPEED, LOW V
COMPOSITE AMPLIFIER . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
OS
REV. A
–11–
Page 12
C00316–0–2/02(A)
–12–
PRINTED IN U.S.A.
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