Datasheet OB2263MP, OB2263CP Datasheet (On-Bright) [ru]

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OB2263
Current Mode PWM Controller
GENERAL DESCRIPTION
OB2263 is a highly integrated current mode PWM control IC optimized for high performance, low standby power and cost effective offline flyback converter applications in sub 30W range. PWM switching frequency at normal operation is externally programmable and trimmed to tight range. At no load or light load condition, the IC operates in extended ‘burst mode’ to minimize switching loss. Lower standby power and higher conversion efficiency is thus achieved. VDD low startup current and low operating current contribute to a reliable power on startup design with OB2263. A large value resistor could thus be used in the startup circuit to minimize the standby power. The internal slope compensation improves system large signal stability and reduces the possible sub­harmonic oscillation at high PWM duty cycle output. Leading-edge blanking on current sense(CS) input removes the signal glitch due to snubber circuit diode reverse recovery and thus greatly reduces the external component count and system cost in the design. OB2263 offers complete protection coverage with automatic self-recovery feature including Cycle-by­Cycle current limiting (OCP), over load protection (OLP), VDD over voltage clamp and under voltage lockout (UVLO). The Gate-drive output is clamped to maximum 18V to protect the power MOSFET. Excellent EMI performance is achieved with On­Bright proprietary frequency shuffling technique together with soft switching control at the totem pole gate drive output.
Frequency Shuffling
Tone energy at below 20KHZ is minimized in the design and audio noise is eliminated during operation. OB2263 is offered in SOT23-6, SOP-8 and DIP-8 packages.
FEATURES
On-Bright Proprietary Frequency Shuffling
Technology for Improved EMI Performance.
Extended Burst Mode Control For Improved Efficiency and Minimum Standby Power Design
Audio Noise Free Operation
External Programmable PWM Switching Frequency Internal Synchronized Slope Compensation
Low VDD Startup Current and Low Operating Current (1.4mA) Leading Edge Blanking on Current Sense Input
Good Protection Coverage With Auto Self­Recovery
o VDD Over Voltage Clamp and Under Voltage
Lockout with Hysteresis (UVLO)
o Gate Output Maximum Voltage Clamp (18V) o On-Bright Proprietary Line Input Compensated
Cycle-by-Cycle Over-current Threshold Setting For Constant Output Power Limiting Over Universal Input Voltage Range.
o Overload Protection (OLP)
APPLICATIONS
Offline AC/DC flyback converter for
Battery Charger Power Adaptor
Set-Top Box Power Supplies
Open-frame SMPS
TYPICAL APPLICATION
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OB2263
Current Mode PWM Controller
GENERAL INFORMATION
Pin Configuration
The OB2263 is offered in SOT23-6, DIP8 and SOP8 packages, shown as below.
Frequency Shuffling
Ordering Information
Part Number Description
OB2263MP SOT23-6, Pb-free OB2263AP DIP8, Pb-free OB2263CP SOP8, Pb-free
Package Dissipation Rating
Package
RθJA (°C/W)
DIP8 90 SOP8 150 SOT23-6
200
Absolute Maximum Ratings
Parameter Value
VDD DC Supply Voltage 30 V VDD Zener Clamp Voltage
Note
VDD_Clamp+0.1V
VDD DC Clamp Current 10 mA V
Input Voltage -0.3 to 7V
FB
V
Input Voltage to
SENSE
-0.3 to 7V Sense Pin VRI Input Voltage to RI Pin -0.3 to 7V Min/Max Operating Junction Temperature T Min/Max Storage Temperature T
VDD_Clamp has a nominal value of 34V.
Note:
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute maximum-rated conditions for extended periods may affect device reliability.
stg
-20 to 150 oC
J
-55 to 160 oC
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OB2263
Marking Information
Current Mode PWM Controller
Frequency Shuffling
TERMINAL ASSIGNMENTS
Pin Name I/O Description
GND P Ground FB I Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and
SENSE pin input.
RI I Internal Oscillator frequency setting pin. A resistor connected between RI and GND sets
the PWM frequency. SENSE I Current sense input pin. Connected to MOSFET current sensing resistor node. VDD P Chip DC power supply pin. GATE O Totem-pole gate drive output for the power MOSFET.
RECOMMENDED OPERATING CONDITION
Symbol Parameter Min
Max
VDD VDD Supply Voltage 10 to 30 V RI RI Resistor Value 100 Kohm T
A
Operating Ambient Temperature -20 to 85
Unit
o
C
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OB2263
BLOCK DIAGRAM
Current Mode PWM Controller
Frequency Shuffling
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OB2263
Current Mode PWM Controller
Frequency Shuffling
ELECTRICAL CHARACTERISTICS
(TA = 25OC if not otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit Supply Voltage (VDD)
I_VDD_Startup VDD Start up
Current
I_VDD_Ops Operation Current VDD=16V,
UVLO(ON) VDD Under Voltage
Lockout Enter UVLO(OFF) VDD Under Voltage
Lockout Exit
(Recovery) VDD_Clamp VDD Zener Clamp
Voltage
Feedback Input Section(FB Pin)
A
VCS
V
Open V
FB_
PWM Input Gain
Open Loop
FB
Voltage IFB_Short FB pin short circuit
current VTH_0D Zero Duty Cycle FB
Threshold Voltage VTH_PL Power Limiting FB
Threshold Voltage TD_PL Power limiting
Debounce Time ZFB_IN Input Impedance 6 Kohm DC_MAX Maximum Duty
Cycle
Current Sense Input(Sense Pin)
T_blanking Leading edge
blanking time Z
_IN Input Impedance 40 Kohm
SENSE
TD_OC Over Current
Detection and
Control Delay VTH_OC Over Current
Threshold Voltage at
zero Duty Cycle
Oscillator
F
Normal Oscillation
OSC
Frequency
f_Temp
Frequency
Temperature Stability
f_VDD
Frequency Voltage
Stability RI_range Operating RI Range 50 100 150 Kohm V_RI_open RI open load voltage 2 V
VDD =12.5V, RI=100K
3 20 uA Measure Leakage current into VDD
1.4 mA
RI=100Kohm, V
FB
=3V
7.8 8.8 9.8 V
13 14 15 V
I
= 5 mA 34 V
VDD
ΔV
FB
/ΔVcs
2.0 V/V
4.8 V
Short FB pin to GND and
1.2 mA measure current VDD = 16V,
0.75 V RI=100Kohm
3.7 V
35 mSec
VDD=18V,
75 % RI=100Kohm, FB=3V, CS=0
RI = 100 Kohm 300 ns
VDD = 16V, CS>V
_OC, FB=3.3V
TH
75 nSec
FB=3.3V, RI=100 Kohm 0.70 0.75 0.80 V
RI = 100 Kohm 60 65 70 KHZ
VDD = 16V, RI=100Kohm, T
o
to 100
C
VDD = 12-25V,
-20oC
A
5 %
5 % RI=100Kohm
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OB2263
F
_BM Burst Mode Base
osc
Frequency
Current Mode PWM Controller
VDD = 16V, RI =
22 KHZ 100Kohm
Frequency Shuffling
Gate Drive Output
VOL Output Low Level VDD = 16V, Io = -20 mA 0.8 V VOH Output High Level VDD = 16V, Io = 20 mA 10 V V_Clamp Output Clamp
18 V
Voltage Level T_r Output Rising Time VDD = 16V, CL = 1nf 220 nSec T_f Output Falling Time VDD = 16V, CL = 1nf 70 nSec
Frequency Shuffling
f_OSC
Frequency
RI=100K -3 3 % Modulation range /Base frequency
f_shuffling Shuffling Frequency RI=100K 64 HZ
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OB2263
Current Mode PWM Controller
CHARACTERIZATION PLOTS
VDD = 16V, RI = 100 Kohm, TA = 25oC condition applies if not otherwise noted.
20
15
VDD Startup Current vs. Voltage
5.0
4.6
4.2
I_VDD_startup vs. Temp
10
3.8
5
3.4
Ivdd_startup(uA
0
0246810121416
I_vdd_startup (uA)
3.0
-20 10 40 70 100 130
VDD(V)
Frequency Shuffling
Temp(C)
VDD UVLO and Ops Current
VDD Operation Current vs. Load(pF)
2
50KHz 65KHz 100KHz
1.6
1.2
0.8
I(VDD) (mA)
0.4
0
0 5 10 15 20 25 30
VDD (V)
UVLO(ON) vs Temp
9.0
8.8
8.6
8.4
8.2
UVLO(ON) (V)
8.0
-20 10 40 70 100 130
Temp(C)
5 4 3 2
I(VDD) (m A)
1 0
0 500 1000 1500 2000
Gat e L o ad ( p F)
UVLO(OFF) vs Temp
14.5
14.4
14.3
14.2
UVLO(OFF) (V)
14.1
14.0
-20 10 40 70 100 130
Temp(C)
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OB2263
Fosc(KHz) vs. RI(Kohm)
140 115
90 65
Fosc(KHz)
40
50 70 90 110 130 150
RI(Kohm)
Current Mode PWM Controller
Fosc vs. Temp
66.5 66
65.5 65
64.5
Fosc (KHz)
64
63.5
-20 5 30 55 80 105 130 Temp (C)
Frequency Shuffling
Vth_OC (V) vs Duty_cycle(%)
1.2
1.1 1
0.9
Vth_OC(V
0.8
0.7
0 10203040506070
Duty_cycle(%)
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OB2263
Current Mode PWM Controller
OPERATION DESCRIPTION
The OB2263 is a highly integrated PWM controller IC optimized for offline flyback converter applications in sub 30W power range. The extended burst mode control greatly reduces the standby power consumption and helps the design easily meet the international power conservation requirements.
Startup Current and Start up Control
Startup current of OB2263 is designed to be very low so that VDD could be charged up above UVLO threshold level and device starts up quickly. A large value startup resistor can therefore be used to minimize the power loss yet provides reliable startup in application. For AC/DC adaptor with universal input range design, a 2 M, 1/8 W startup resistor could be used together with a VDD capacitor to provide a fast startup and low power dissipation solution.
Operating Current
The Operating current of OB2263 is low at 1.4mA. Good efficiency is achieved with OB2263 low operating current together with extended burst mode control features.
Frequency shuffling for EMI improvement
The frequency Shuffling/jittering (switching frequency modulation) is implemented in OB2263. The oscillation frequency is modulated with a random source so that the tone energy is spread out. The spread spectrum minimizes the conduction band EMI and therefore reduces system design challenge.
Extended Burst Mode Operation
At zero load or light load condition, majority of the power dissipation in a switching mode power supply is from switching loss on the MOSFET transistor, the core loss of the transformer and the loss on the snubber circuit. The magnitude of power loss is in proportion to the number of switching events within a fixed period of time. Reducing switching events leads to the reduction on the power loss and thus conserves the energy. OB2263 self adjusts the switching mode according to the loading condition. At from no load to light/medium load condition, the FB input drops below burst mode threshold level. Device enters Burst Mode control. The Gate drive output switches only when VDD voltage drops below a preset level and FB input is active to output an on state. Otherwise the gate drive remains at off state to
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Frequency Shuffling
minimize the switching loss and reduces the standby power consumption to the greatest extend. The frequency control also eliminates the audio noise at any loading conditions.
Oscillator Operation
A resistor connected between RI and GND sets the constant current source to charge/discharge the internal cap and thus the PWM oscillator frequency is determined. The relationship between RI and switching frequency follows the below equation within the specified RI in Kohm range at nominal loading operational condition.
F
OSC
6500
=
)(
KohmRI
Khz
)(
Current Sensing and Leading Edge Blanking
Cycle-by-Cycle current limiting is offered in OB2263 current mode PWM control. The switch current is detected by a sense resistor into the sense pin. An internal leading edge blanking circuit chops off the sense voltage spike at initial MOSFET on state due to Snubber diode reverse recovery so that the external RC filtering on sense input is no longer required. The current limit comparator is disabled and thus cannot turn off the external MOSFET during the blanking period. PWM duty cycle is determined by the current sense input voltage and the FB input voltage.
Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage ramp onto the current sense input voltage for PWM generation. This greatly improves the close loop stability at CCM and prevents the sub-harmonic oscillation and thus reduces the output ripple voltage.
Gate Drive
OB2263 Gate is connected to an external MOSFET gate for power switch control. Too weak the gate drive strength results in higher conduction and switch loss of MOSFET while too strong gate drive output compromises the EMI. A good tradeoff is achieved through the built-in totem pole gate design with right output strength and dead time control. The low idle loss and good EMI system design is easier to achieve with this dedicated control scheme. An internal 18V clamp is added for MOSFET gate protection at higher than expected VDD input.
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OB2263
Current Mode PWM Controller
Protection Controls
Good power supply system reliability is achieved with its rich protection features including Cycle-by­Cycle current limiting (OCP), Over Load Protection (OLP) and over voltage clamp, Under Voltage Lockout on VDD (UVLO). With On-Bright Proprietary technology, the OCP threshold tracks PWM Duty cycles and is line voltage compensated to achieve constant output power limit over the universal input voltage range with recommended reference design.
Frequency Shuffling
At overload condition when FB input voltage exceeds power limit threshold value for more than TD_PL, control circuit reacts to shut down the output power MOSFET. Device restarts when VDD voltage drops below UVLO limit. VDD is supplied by transformer auxiliary winding output. It is clamped when VDD is higher than threshold value. The power MOSFET is shut down when VDD drops below UVLO limit and device enters power on start-up sequence thereafter.
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OB2263
PACKAGE MECHANICAL DATA
SOT23-6
Current Mode PWM Controller
Frequency Shuffling
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OB2263
8-Pin Plastic DIP
Current Mode PWM Controller
Frequency Shuffling
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