OB2263 is a highly integrated current mode PWM
control IC optimized for high performance, low
standby power and cost effective offline flyback
converter applications in sub 30W range.
PWM switching frequency at normal operation is
externally programmable and trimmed to tight range.
At no load or light load condition, the IC operates in
extended ‘burst mode’ to minimize switching loss.
Lower standby power and higher conversion
efficiency is thus achieved.
VDD low startup current and low operating current
contribute to a reliable power on startup design with
OB2263. A large value resistor could thus be used in
the startup circuit to minimize the standby power.
The internal slope compensation improves system
large signal stability and reduces the possible subharmonic oscillation at high PWM duty cycle output.
Leading-edge blanking on current sense(CS) input
removes the signal glitch due to snubber circuit diode
reverse recovery and thus greatly reduces the external
component count and system cost in the design.
OB2263 offers complete protection coverage with
automatic self-recovery feature including Cycle-byCycle current limiting (OCP), over load protection
(OLP), VDD over voltage clamp and under voltage
lockout (UVLO). The Gate-drive output is clamped
to maximum 18V to protect the power MOSFET.
Excellent EMI performance is achieved with OnBright proprietary frequency shuffling technique
together with soft switching control at the totem pole
gate drive output.
Frequency Shuffling
Tone energy at below 20KHZ is minimized in the
design and audio noise is eliminated during operation.
OB2263 is offered in SOT23-6, SOP-8 and DIP-8
packages.
FEATURES
On-Bright Proprietary Frequency Shuffling
■
Technology for Improved EMI Performance.
■
Extended Burst Mode Control For Improved
Efficiency and Minimum Standby Power Design
■
Audio Noise Free Operation
■
External Programmable PWM Switching
Frequency
Internal Synchronized Slope Compensation
■
■
Low VDD Startup Current and Low Operating
Current (1.4mA)
Leading Edge Blanking on Current Sense Input
■
■
Good Protection Coverage With Auto SelfRecovery
o VDD Over Voltage Clamp and Under Voltage
Lockout with Hysteresis (UVLO)
o Gate Output Maximum Voltage Clamp (18V)
o On-Bright Proprietary Line Input Compensated
Cycle-by-Cycle Over-current Threshold Setting
For Constant Output Power Limiting Over
Universal Input Voltage Range.
VDD DC Supply Voltage 30 V
VDD Zener Clamp
Voltage
Note
VDD_Clamp+0.1V
VDD DC Clamp Current 10 mA
V
Input Voltage -0.3 to 7V
FB
V
Input Voltage to
SENSE
-0.3 to 7V
Sense Pin
VRI Input Voltage to RI Pin -0.3 to 7V
Min/Max Operating
Junction Temperature T
Min/Max Storage
Temperature T
VDD_Clamp has a nominal value of 34V.
Note:
Stresses beyond those listed under “absolute maximum ratings”
may cause permanent damage to the device. These are stress
ratings only, functional operation of the device at these or any
other conditions beyond those indicated under “recommended
operating conditions” is not implied. Exposure to absolute
maximum-rated conditions for extended periods may affect device
reliability.
GND P Ground
FB I Feedback input pin. The PWM duty cycle is determined by voltage level into this pin and
SENSE pin input.
RI I Internal Oscillator frequency setting pin. A resistor connected between RI and GND sets
the PWM frequency.
SENSE I Current sense input pin. Connected to MOSFET current sensing resistor node.
VDD P Chip DC power supply pin.
GATE O Totem-pole gate drive output for the power MOSFET.
RECOMMENDED OPERATING CONDITION
Symbol Parameter Min
Max
VDD VDD Supply Voltage 10 to 30 V
RI RI Resistor Value 100 Kohm
T
The OB2263 is a highly integrated PWM controller
IC optimized for offline flyback converter
applications in sub 30W power range. The extended
burst mode control greatly reduces the standby
power consumption and helps the design easily
meet the international power conservation
requirements.
• Startup Current and Start up Control
Startup current of OB2263 is designed to be very
low so that VDD could be charged up above UVLO
threshold level and device starts up quickly. A large
value startup resistor can therefore be used to
minimize the power loss yet provides reliable
startup in application. For AC/DC adaptor with
universal input range design, a 2 MΩ, 1/8 W
startup resistor could be used together with a VDD
capacitor to provide a fast startup and low power
dissipation solution.
• Operating Current
The Operating current of OB2263 is low at 1.4mA.
Good efficiency is achieved with OB2263 low
operating current together with extended burst
mode control features.
• Frequency shuffling for EMI improvement
The frequency Shuffling/jittering (switching
frequency modulation) is implemented in OB2263.
The oscillation frequency is modulated with a
random source so that the tone energy is spread out.
The spread spectrum minimizes the conduction
band EMI and therefore reduces system design
challenge.
• Extended Burst Mode Operation
At zero load or light load condition, majority of the
power dissipation in a switching mode power
supply is from switching loss on the MOSFET
transistor, the core loss of the transformer and the
loss on the snubber circuit. The magnitude of
power loss is in proportion to the number of
switching events within a fixed period of time.
Reducing switching events leads to the reduction
on the power loss and thus conserves the energy.
OB2263 self adjusts the switching mode according
to the loading condition. At from no load to
light/medium load condition, the FB input drops
below burst mode threshold level. Device enters
Burst Mode control. The Gate drive output switches
only when VDD voltage drops below a preset level
and FB input is active to output an on state.
Otherwise the gate drive remains at off state to
minimize the switching loss and reduces the
standby power consumption to the greatest extend.
The frequency control also eliminates the audio
noise at any loading conditions.
• Oscillator Operation
A resistor connected between RI and GND sets the
constant current source to charge/discharge the
internal cap and thus the PWM oscillator frequency
is determined. The relationship between RI and
switching frequency follows the below equation
within the specified RI in Kohm range at nominal
loading operational condition.
F
OSC
6500
=
)(
KohmRI
Khz
)(
• Current Sensing and Leading Edge Blanking
Cycle-by-Cycle current limiting is offered in
OB2263 current mode PWM control. The switch
current is detected by a sense resistor into the sense
pin. An internal leading edge blanking circuit chops
off the sense voltage spike at initial MOSFET on
state due to Snubber diode reverse recovery so that
the external RC filtering on sense input is no longer
required. The current limit comparator is disabled
and thus cannot turn off the external MOSFET
during the blanking period. PWM duty cycle is
determined by the current sense input voltage and
the FB input voltage.
• Internal Synchronized Slope Compensation
Built-in slope compensation circuit adds voltage
ramp onto the current sense input voltage for PWM
generation. This greatly improves the close loop
stability at CCM and prevents the sub-harmonic
oscillation and thus reduces the output ripple
voltage.
• Gate Drive
OB2263 Gate is connected to an external MOSFET
gate for power switch control. Too weak the gate
drive strength results in higher conduction and
switch loss of MOSFET while too strong gate drive
output compromises the EMI.
A good tradeoff is achieved through the built-in
totem pole gate design with right output strength
and dead time control. The low idle loss and good
EMI system design is easier to achieve with this
dedicated control scheme. An internal 18V clamp is
added for MOSFET gate protection at higher than
expected VDD input.
Confidential to Micro Bridge
OB_DOC_DS_63B5
Page 10
OB2263
Current Mode PWM Controller
• Protection Controls
Good power supply system reliability is achieved
with its rich protection features including Cycle-byCycle current limiting (OCP), Over Load
Protection (OLP) and over voltage clamp, Under
Voltage Lockout on VDD (UVLO).
With On-Bright Proprietary technology, the OCP
threshold tracks PWM Duty cycles and is line
voltage compensated to achieve constant output
power limit over the universal input voltage range
with recommended reference design.
Frequency Shuffling
At overload condition when FB input voltage
exceeds power limit threshold value for more than
TD_PL, control circuit reacts to shut down the
output power MOSFET. Device restarts when VDD
voltage drops below UVLO limit.
VDD is supplied by transformer auxiliary winding
output. It is clamped when VDD is higher than
threshold value. The power MOSFET is shut down
when VDD drops below UVLO limit and device
enters power on start-up sequence thereafter.