Datasheet nx9521ds Datasheets

Page 1
NEXSEM
8A SYNCHRONOUS BUCK SWITCHING REGULATOR WITH
INTERNAL BIASING AND ADJUSTABLE FREQUENCY
NX9521
PRELIMINARY DATA SHEET
Pb Free Product
DESCRIPTION
FEATURES
n Switching Controller and MOSFETs in one package n Bus voltage operation from 5V to 25V n Programmable frequency n Internal Digital Soft Start Function n Output current up to 8A n Prebias Startup n Less than 50 nS adaptive deadband n Programmable loss-less Over Current Protection n No negative spike at Vout during startup and shut-
down
n Over Voltage Protection triggers latch out n Power Good indicator available n Pb-free and RoHS compliant
APPLICATIONS
n Graphic Card on board converters n Low profile on board DC to DC such as 12V to 3.3V,
2.5V or 1.8V
n ADSL Modem
TYPICAL APPLICATION
VIN1
+7V~24V
D1
VIN
PVCC
VCC
PGOOD
RT
AGND
BST
D2
S1
SW
OCP
LG
S2
N X 9 5 2 1
FB
COMP
Figure 1 - Typical application of 9521
VOUT1
+5V@4A
ORDERING INFORMATION
Device Temperature Package Frequency Pb-Free NX9521CMTR 0 to 70oC 5x5MCM-32L 300kHz to 1MHz Yes
Rev.1.1 08/01/07
www.nexsem.com
1
Page 2
NEXSEM
NX9521
ABSOLUTE MAXIMUM RATINGS
PVCC, VCC to GND & BST to SW voltage ......... -0.3V to 6.5V
Vin to GND ....................................................... 25V
BST to GND Voltage ........................................ -0.3V to 30V
D2, S1, SW to GND ......................................... -2V to 30V
All other pins .................................................... -0.3V to VCC+0.3V or 6.5V
Storage Temperature Range ............................... -65oC to 150oC
Operating Junction Temperature Range ............... -40oC to 125oC
ESD Susceptibility ........................................... 2kV
Power Dissipation ............................................. TBD
Output Current ..................................................TBD
CAUTION: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
PACKAGE INFORMATION
32-LEAD PLASTIC MCM 5 x 5
D1
31
32
S1
1 S1 S1
S1 D2 D2 D2
D2
2 3 4 5 6 7 8
D1 (PAD2)
D1
30
D1
29
D2 (PAD3)
SW
AGND
28
OCP
27
26
AGND (PAD1)
BST
25
COMP
24 23 22
21 20 19 18 17
FB
PGOOD RT AGND VIN D2 VCC PVCC
Rev.1.1 08/01/07
16
S2
14
S2
15
NC
LG
2
9
10
S2
S2
11
12 13
S2
S2
www.nexsem.com
Page 3
NEXSEM
Under Voltage Lockout
Supply Voltage(Vin)
Vin UVLO
SS
Oscillator (Rt)
Max Duty Cycle
84
%
Error Amplifiers
FBUVLO
OCP
Power Good(Pgood)
Vref
Ouput Stage
NX9521
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over VIN = 12V and TA= 0 to 70oC. Typical values refer to T = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature.
PARAMETER SYM Test Condition Min TYP MAX Units
Reference Voltage
Ref Voltage V Ref Voltage line regulation 0.4 %
Supply Voltage(Vcc)
VCC Voltage Range V VCC Supply Current (Static) ICC (Static) Outputs not switching 3 mA PVCC Supply Current (Dynamic)
Supply Voltage(V
V
Supply Current
BST
(Dynamic)
BST
)
REF
CC
I
CC
(Dynamic)
I
BST
(Dynamic)
4.5V<Vcc<5.5V
5 mA
5 mA
4.5
0.8
5
5.5
V
V
A
VCC-Threshold VCC_UVLO VCC Rising VCC-Hysteresis VCC_Hyst VCC Falling 0.22 V
Vin Voltage Range V Input Voltage Current Vin=24V 24 40 uA
Vin-Threshold Vin_UVLO VCC Rising Vin-Hysteresis Vin_Hyst VCC Falling 0.5 V
Soft Start time Tss Fs=300Khz 3.4 mS
Frequency F Ramp-Amplitude Voltage V
Min Duty Cycle 0 %
Transconductance 2000 umho Input Bias Current Ib 10 nA Comp SD Threshold 0.3 V
Feedback UVLO threshold percent of nominal 65 70 75 %
in
S
RAMP
Rt=open 300 kHz
4.7 25
4.2
4.5
1.6 V
V
V
V
OCP current 32 uA
Threshold Voltage as % of
Hysteresis 5 %
High Side MOSFET R Low Side MOSFET R Output Current
Rev.1.1 08/01/07
DSON DSON
FB ramping up 90 %
18 ohm 18 ohm
8
A
www.nexsem.com
3
Page 4
NEXSEM
PARAMETER
SYM
Test Condition
Min
TYP
MAX
Units
Over Voltage
Over Voltage Delay
2
cycle
Over temperature
C
C
NX9521
Over Voltage Trip Point 115 120 %Vref Hysteresis 8 %Vref
Threshold Hysteresis 20
150
o o
Rev.1.1 08/01/07
www.nexsem.com
4
Page 5
NEXSEM
PIN DESCRIPTIONS
PIN # PIN SYMBOL PIN DESCRIPTION
1-4
S1
S1 is the source of high side MOSFET.
NX9521
5-8,19
9-14
15 16
17
18
20 22
23
24
D2
S2 NC LG
PVCC
VCC
VIN
RT
PG
FB
D2 is the drain of low side MOSFET. S2 is the source of high side MOSFET. Not used. Low side gate driver output for monitoring. An internal 5V regulator provides this supply voltage for the low side fet drivers.
A high frequency 1uF ceramic cap must be connected from this pin to the PGND pin as close as possible
Supply voltage for the internal logic circuit. A 1uF high frequency ceramic capaci­tor must be connected from this pin to GND pin.
Voltage supply for the internal 5V regulator. Oscillator's frequency can be set by using an external resistor from this pin to
GND. When RT pin is open, the frequency is 200kHz. An open drain output that requires a pull up resistor to Vcc or a voltage lower
than Vcc. When FB pin reaches 90% of the reference voltage PGOOD transi­tions from LO to HI state.
This pin is the error amplifier inverting input. This pin is also connected to the output UVLO comparator. When this pin falls below 0.48V, both HDRV and LDRV outputs are in hiccup.
25
26
27
21,28
29
30-32
Rev.1.1 08/01/07
COMP
BST
OCP
AGND
SW
D1
This pin is the output of the error amplifier and together with FB pin is used to compensate the voltage control feedback loop. This pin is also used as a shut down pin. When this pin is pulled below 0.3V, both drivers are turned off and internal soft start is reset.
This pin supplies voltage to the high side driver. A high frequency ceramic capacitor of 0.1 to 1 uF must be connected from this pin to SW pin.
This pin is connected to the drain of the external low side MOSFET and is the input of the over current protection(OCP) comparator. An internal current source is flown to the external resistor which sets the OCP voltage across the Rdson of the low side MOSFET. Current limit point is this voltage divided by the Rds­on.
Analog ground. This pin should be connected to the source of the high side MOSFET S1 and
drain of the low side MOSFET D2. Drain of High side MOSFET.
www.nexsem.com
5
Page 6
NEXSEM
BLOCK DIAGRAM
NX9521
VIN
VCC
FB
COMP
Bias Generator
START
Digital start Up
5V Regulator
0.8V
COMP
0.3V
START
1.25V
0.8V
ramp
PVCC
PVCC
OSC
0.6V CLAMP
UVLO
UVLO
1.3V CLAMP
BST
1.2Vref /0.75Vref
FB
POR
START
OC
OVP
S
Q
R
Hiccup Logic
Latch
Thermal Shutdown
PWM
OVP
Control Logic
SS_done
PVCC
70%*Vp
FB
D1
S1
SW
LG
D2
S2 GND
Rev.1.1 08/01/07
GND
32uA
START
VCC
Figure 2 - Simplified block diagram of the NX9521
www.nexsem.com
OCP
6
Loading...