Datasheet nx2511ds Datasheets

Page 1
Evaluation board available.
NEXSEM
2-4 PHASE SELECTABLE VRD10.X CONTROLLER
DESCRIPTION
NX2511
PRELIMINARY DATA SHEET
Pb Free Product
FEATURES
n VRM9/VRM10 compatible 6 bit VID n 2 to 4 Phase selectable interleaved PWM stages. n Differential current sensing allows accurate current
share using Inductor ESR or current sense resistor
n Programmable output voltage droop & offset control n Programmable UVLO for both BUS voltage and
Driver Supply Voltage
n Differential Remote Voltage Sensing n Over Voltage Protection (OVP) n Hiccup Current current Limit (OCP) n Power Good signal for Power Sequencing n Internal Soft start operation n Programmable switching frequency from 100kHz to
600kHz per phase n Pb-free and RoHS compliant
APPLICATIONS
n Desktop mother board VRD10.X n Low voltage high current applications
+5V
+12V
+5V
CS2
48
EN
39
ENDRV
47
ENBUS
12
DROOP
4
RT
37
OVP
40
PGOOD
5
OFS
16
CS2COMP
19 18
CS3COMP
CS3
22
CS4
CS4COMP
6
VP
8
VCOMP
7
FB
9
DIFF
45
VID0
44
VID1
43
VID2
42
VID3
41
VID4
46
VID12.5
N X 2 5 1 1
AGND
1,36
Figure1 - Typical application of 2511
VCC
2,35
PWM1
PWM2
PWM3
PWM4
VSEN
RGND
STRT
CS+1
CS-1
CS+2
CS-2
CS+3
CS-3
CS+4
CS-4
TYPICAL APPLICATION
PHASE1
BST
VCC
HDRV
EN
IN1
SW
LDRV
PGND
PHASE2
PHASE3
PHASE4
34
33
14
15
32 17
31 20 21
30 23 24
10 11
+12V
VOUT
Rev. 1.0 01/24/05
ORDERING INFORMATION
Device Temperature Package Pb-Free NX2511CMTR 0 to 70oC MLPQ-48 L Yes
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NEXSEM
C/W
PARAMETER
SYM
Test Condition
Min
TYP
MAX
Units
VID2, VID1,VID0, VID12.5)
DAC initial accuracy
0.5
%
DAC Voltage line regulation
Vcc=4.75 to 5.25V
0.1
%
VID Pull up Current
355065
uA
VID Input Low Level
0.4
V
VID Input HI Level
0.8VSupply Voltage(Vcc)
NX2511
ABSOLUTE MAXIMUM RATINGS
Vcc to PGND & BST to SW voltage .................... -0.3V to 6.5V
All other pins .................................................... -0.3V to 6.5V
Storage Temperature Range ............................... -65oC to 150oC
Operating Junction Temperature Range ............... -40oC to 125oC
CAUTION: Stresses above those listed in "ABSOLUTE MAXIMUM RATINGS", may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other condi­tions above those indicated in the operational sections of this specification is not implied.
PACKAGE INFORMATION
48-LEAD PLASTIC MLPQ
VID1
ENBUS
VID0
VID12.5
NX2511
VID2
VID3
VID4
ENDRV
PGOOD
4142434445464748
3940
OVP
PHS
3738
AGND
36
VCC35 STRT
34
PWM1
33
PWM2
32
PWM3
31
PWM4
30
NC
29
NC
28
NC
27
NC
26
NC
25
23
24
θ≈29
ο
JA
AGND
VCC
VREF
RT
OFS
VP
FB
VCOMP
DIFF
VSEN
RGND
DROOP
EN
1 2 3 4 5 6 7 8 9
10 11 12
13 14 15 16 17 181920 21 22
OCP
CS-1
CS+1
CS+2
CS2COMP
CS-2
CS+3
CS3COMP
CS-3
CS+4
CS4COMP
CS-4
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc = 5V, EN=HIGH, and TA = 0 to 70oC. Typical values refer to TA = 25oC. Low duty cycle pulse testing is used which keeps junction and case temperatures equal to the ambient temperature.
VID Voltage(VID4, VID3,
VCC Voltage Range V VCC Supply Current
Rev. 1.0 01/24/05
CC
I
CC
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4.5 5 5.5 V
- 5
mA
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NEXSEM
PARAMETER
SYM
Test Condition
Min
TYP
MAX
Units
Enable(EN) & ENBUS
Oscillator (Rt)
Frequency
FS
Clock Freq.
600 KHz
Ramp Peak
2.5
V
Ramp Valley
1.5
V
Max Duty Cycle
F=600Khz
93%
Min duty Cycle
0
%
OVP latched Drive Current
2
mA
OVP delay
Freq per phase=200kHz
160
uSec
Amplifiers
Open Loop Gain
5065dB
Transconductance
1600
umoh
Input Offset Voltage
Vio 0 mV
Amplifier
Open Loop Gain
50
dB
Output LOW Voltage
0.5
V
Gain
0.995
1
1.005
V/V
Common Mode Range
-0.3
VccVCommon Mode Rejection
50
dB
Output LOW Voltage
0.5VSS (Internal )
Fclock=600Khz
200Khz/Phase
Delay before SS ramp up
320
uSec
Under Voltage, Vcc ,
NX2511
VCC-Threshold VCC_UVLO
VCC-Hysteresis VCC_Hyst
EN Threshold EN Hysteresis
ENBUS Threshold ENBUS Rising 1.6 V
ENBUS Hysteresis
Ramp-Amplitude Voltage
Current Sense Transconductance
RAMP
VCC Rising
EN Rising 0.6 V
4
0.2
0.1 V
0.16 V
1
V
V
V
V
Voltage Mode Error
Output Current Source or Sink 1 mA
Output HI Voltage Vcc-1.5 V
Remote Sense Differential Amplifier (Vsen, Rgnd, Diff)
Output Current Source or Sink 5 mA Output HI Voltage Vcc-1.5 V
Soft Start time
Rev. 1.0 01/24/05
Tss
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mS6.4
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NEXSEM
PARAMETER
SYM
Test Condition
Min
TYP
MAX
Units
Power Good(Pgood)
Amplifier(CS+, CS-)
Input Offset Voltage
0 mVVoltage Gain
29.73030.3
V/V
(OFS)
Rofs connected to GND
1.25
OCP Adjust
OCP
per phase
Vref
Reference Voltage
1.6
V
to Vcc)
NX2511
Threshold V Hysteresis 5 %V PGood Voltage Low I
Current Sense
Pin Adjust Offset Voltage
Rofs connected to
Vcc(measured with respect
Blank time before activating
8 Clock cycles of 200 kHz
Falling 74 %V
SEN
=-5mA 0.5 V
PGood
1.25
40 uS
ID ID
VVoltage at OFS Pin
Rev. 1.0 01/24/05
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NEXSEM
PIN DESCRIPTIONS
NX2511
Pin #
2,35
34
48
33, 32,
31, 30
38
40
6
Symbol
VCC
STRT
EN
PWM1,PWM2, PWM3,PWM4
PHS_SEL
PGOOD
VP
Pin Description IC’s supply voltage. This pin biases the internal logic circuits. An internal undervoltage
lockout keeps IC off till VCC reach 4V. This pin is used to enable external drivers like NX3202. It goes high when all
Enable signal as well as internal UVLO is true. This pin is used to enable the IC when is pulled high. The pin has a threshold
voltage of 0.6 volts. These pins provide the PWM signal to the external drivers for phase 1, phase 2,
phase 3, and phase 4 respectively. The pin selects the number of phases the converter will operatate. Connect to
GND for 4 phase, leave open for 3 phase or connect to 5V for 2 phase operation. This pin is an open drain output. If used, it should be pulled to 5v with a resistor
greater than or equal to 10k, otherwise it my be left open. When soft start ends, the PGOOD pin switches high. Any fault or under voltage on the enable pins will cause the signal to be pulled low.
Input to the positive pin of the error amplifier. A resistor is connected from the output of the DAC to this pin. Place a small capacitor from this pin to GND to filter any noise as well as to provide a smooth transition during on the fly transistion.
7
4
37
14, 17 20, 23
15, 18 21, 24
16, 19,
22
8
5
FB
RT
OVP
CS+1,CS+2,
CS+3,CS+4
CS-1,CS-2,
CS-3,CS-4
CS2COMP, CS3COMP,
CS4COMP
Vcomp
OFS
This pin is the error amplifier inverting input. It is connected via a resistor to the output of the differential sense amplifier.
This pin programs the internal oscillator frequency using a resistor from this pin to ground. The frequency of each phase is 1/N of this frequency. When N is selected number of phases.
This pin indicates an over voltage fault has occurred. This pin switches high when the Diff pin is greater than 200mV above the Vp pin. It can drive a SCR to turn off the converter.
Positive input of the differential current sense amplifiers. It is connected directly to the RC junction of the respective phase’s output inductor.
Negative input of the differential current sense amplifiers. It is connected directly to the negative side of the respective phase’s output inductor.
The output of the transconductance op amp for current sharing circuit. An external RC is connected from these pins to GND to stabilize the current loop.
This is the output pin of the error amplifier. The compensation network is attached between this pin, the Fb pin and the Diff pins.
A resistor from this pin to ground or Vcc provides a positive or negative offset respectively. This is accomplished using two different internal current sources.
Rev. 1.0 01/24/05
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NEXSEM
NX2511
Pin #
10,
11,9
13
3
47
39
46 45, 44, 43, 42,
41
Symbol
VSEN,
RGND,DIFF
OCP
VREF
ENBUS
ENDRV
VID12.5, VID0, VID1, VID2, VID3,
VID4
Pin Description These pins are the input and output to a differential amplifier and are used to re-
motely sense the output voltage. Vsen is the positive input, Rgnd is the negative input, and Diff is the output voltage to the differential amplifier.
A resistor divider connected from this pin to Vref programs the current limit thresh­old. The outputs of the internal current sense differential amplifiers are summed together to represent the output current. This voltage is then compared to this threshold and resets the soft start after 64 clock cycles.
A 1.6V buffered reference is brought out. This pin is used to program the under voltage lockout of the bus supply. A resistor
divider from the bus voltage to this pin programs the under voltage lockout. When the voltage of this pin is greater than 1.6V, the bus voltage is assumed operation.This pin has a 10% hysterisis.
This pin is used to program the under voltage lockout of the gate driver supply. A resistor divider from the gate driver voltage to this pin programs the under voltage lockout. When the voltage of this pin is greater than 1.6V, the gate driver voltage is assumed operation.This pin has a 10% hysterisis.
These are the inputs to the internal DAC that provides the reference voltage for the regulated output. They can be connected directly to the open drain signal output or pulled up externally up to Vcc. These pins have 40uA internal pull up current source that goes to zero as the voltage rises above the logic threshold.
11
DROOP
A resistor from this pin to ground programs an internal current source that is fed into the FB pin. This current source is proportional to the output current of the regulator. The product of this current times the external resistor RFB provides a droop voltage.
Rev. 1.0 01/24/05
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