• These Devices are Pb−Free and are RoHS Compliant
DS(on)
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Applications
• Load Switches
• DC Motor Control
• DC−DC Conversion
MAXIMUM RATINGS (T
Parameter
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
Power Dissipation R
(Note 1)
Continuous Drain
Current R
Power Dissipation
R
q
JC
Pulsed Drain Current
Operating Junction and Storage TemperatureTJ,
Source Current (Body Diode)I
Single Pulse Drain−to−Source Avalanche Energy
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
q
JA
q
JC
(Note 1)
(Note 1)
(Note 1)
THERMAL RESISTANCE MAXIMUM RATINGS
ParameterSymbolValueUnit
Junction−to−Case – Steady
State (Note 1)
Junction−to−Ambient – Steady
State (Note 1)
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces.
= 25°C unless otherwise stated)
J
TA = 25°C
TA = 100°C−4.0
q
JA
Steady
State
tp = 10 ms
TA = 25°C
TA = 100°C1.6
TC = 25°C
TC = 100°C−14
TC = 25°C
TC = 100°C20
L = 0.1 mH
R
q
JC
R
q
JA
SymbolValueUnit
D
D
D
D
S
L
3.8
47
−60V
±20V
−5.7
3.2
−20
40
−76A
−55 to
+175
−20A
45mJ
30A
260°C
°C/W
A
W
A
W
°C
P
P
I
T
E
I
DSS
GS
I
I
DM
stg
AS
AS
T
V
(BR)DSS
−60 V
R
DS(on)
52 mW @ −10 V
72 mW @ −4.5 V
P−Channel MOSFET
D (5−8)
G (4)
MAXID MAX
−20 A
S (1,2,3)
MARKING DIAGRAM
1
WDFN8
(m8FL)
CASE 511AB
5116= Specific Device Code
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
1
S
5116
S
AYWWG
S
G
G
D
D
D
D
ORDERING INFORMATION
DevicePackageShipping
NTTFS5116PLTAGWDFN8
(Pb−Free)
NTTFS5116PLTWG WDFN8
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain CurrentI
Gate−to−Source Leakage CurrentI
V
(BR)DSS
V
(BR)DSS/TJ
DSS
GSS
VGS = 0 V, ID = −250 mA
VGS = 0 V,
V
= −60 V
DS
VDS = 0 V, VGS = ±20 V±100nA
ON CHARACTERISTICS (Note 2)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
Drain−to−Source On ResistanceR
V
GS(TH)
V
GS(TH)/TJ
DS(on)
VGS = VDS, ID = −250 mA
VGS =−10 VID = −6 A3752mW
VGS = −4.5 VID = −4.4 A5172
Forward Transconductanceg
FS
VDS = −15 V, ID = −6 A11S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
Output CapacitanceC
Reverse Transfer CapacitanceC
Total Gate ChargeQ
C
iss
oss
rss
G(TOT)
VGS =0 V, f=1.0 MHz, VDS = −30 V
VGS = −10 V, VDS = −48 V, ID = −5 A25nC
VGS = −4.5 V, VDS = −48 V, ID = −5 A14
Threshold Gate ChargeQ
Gate−to−Source ChargeQ
Gate−to−Drain ChargeQ
Plateau VoltageV
Gate ResistanceR
G(TH)
GS
GD
GP
G
VGS = −4.5 V, VDS = −48 V, ID = −5 A
SWITCHING CHARACTERISTICS (Note 3)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(on)
d(off)
r
f
VGS = −4.5 V, VDS = −48 V,
= −5 A, RG = 6 W
I
D
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Timet
Charge Timet
Discharge Timet
Reverse Recovery ChargeQ
V
SD
RR
a
b
RR
VGS = 0 V,
I
= −5 A
S
VGS = 0 V, dIS/dt = −100 A/ms,
I
= −5 A
S
2. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
3. Switching characteristics are independent of operating junction temperatures.
−60V
69.7mV/°C
TJ = 25°C−1.0mA
TJ = 125°C−100
−1−3V
−6.2mV/°C
1258
127
84
1
4
7
3.1V
5.3
15
58
30
37
TJ = 25°C−0.79−1.2
TJ = 125°C−0.64
20
15
5
19nC
pF
nC
W
ns
V
ns
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2
Page 3
NTTFS5116PL
TYPICAL CHARACTERISTICS
40
VGS = 10 V
30
20
10
, DRAIN CURRENT (A)
D
I
0
012345
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
VGS = 4.5 V
VGS = 4 V
VGS = 3.5 V
VGS = 3 V
Figure 1. On−Region Characteristics
0.075
ID = −6 A
T
= 25°C
J
0.065
0.055
40
VDS ≥ 10 V
30
20
10
, DRAIN CURRENT (A)
D
I
0
23456
TJ = 25°C
TJ = 125°C
TJ = −55°C
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 2. Transfer Characteristics
0.080
TJ = 25°C
0.070
0.060
0.050
VGS = 4.5 V
0.045
, DRAIN−TO−SOURCE RESISTANCE (W)
0.035
DS(on)
246810
R
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
2.0
ID = −4.4 A
1.8
V
= 4.5 V
GS
1.6
1.4
1.2
1.0
, DRAIN−TO−SOURCE RES-
ISTANCE (NORMALIZED)
0.8
DS(on)
R
0.6
−50 −250255075100125 150 175
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
0.040
, DRAIN−TO−SOURCE RESISTANCE (W)
0.030
DS(on)
5 10152025303540
R
VGS = 10 V
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10,000
VGS = 0 V
TJ = 150°C
1,000
, LEAKAGE (nA)
DSS
I
100
102030405060
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ = 125°C
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
Page 4
NTTFS5116PL
TYPICAL CHARACTERISTICS
1800
1600
1400
1200
C
iss
VGS = 0 V
T
= 25°C
J
1000
800
600
400
C, CAPACITANCE (pF)
200
C
rss
0
C
oss
0 102030405060
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
VDD = −48 V
I
= −5 A
D
= −4.5 V
V
GS
100
t, TIME (ns)
10
t
d(on)
t
r
t
t
f
d(off)
10
Q
T
8
6
(V)
4
, GATE−TO−SOURCE VOLTAGE
GS
V
Q
gs
2
0
Q
gd
VDS = −48 V
I
T
0510152025
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
40
VGS = 0 V
TJ = 25°C
30
20
10
, SOURCE CURRENT (A)
S
−I
= −5 A
D
= 25°C
J
1
110100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
100
10
VGS = −10 V
Single Pulse
TC = 25°C
1 ms
10 ms
dc
100 ms
10 ms
1
, DRAIN CURRENT (A)
D
−I
R
Limit
DS(on)
Thermal Limit
Package Limit
0.1
0.1110100
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
0
0.50.60.70.80.91.01.1
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
45
30
15
, SINGLE PULSE DRAIN−TO−
AS
E
SOURCE AVALANCHE ENERGY (mJ)
0
255075100125150175
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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4
Page 5
NTTFS5116PL
TYPICAL CHARACTERISTICS
100
D = 0.5
10
(t)
1
JA
q
R
0.1
0.01
0.0000010.000010.00010.0010.010.11101001000
D = 0.2
D = 0.1
D = 0.05
D = 0.02
D = 0.01
Single Pulse
PULSE TIME (sec)
Figure 13. Thermal Response
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5
Page 6
NTTFS5116PL
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB−01
ISSUE B
0.05
0.10 C
0.10 C
8X
A0.10BC
c
G
D
D1
78
1234
TOP VIEW
SIDE VIEW
b
L
14
E2
8
D2
BOTTOM VIEW
56
5
2X
E1
e/2
C
0.20
A
B
E
A
DETAIL A
K
M
L1
2X
c
0.20 C
6X
e
DETAIL A
4X
q
A1
SEATING
0.75
C
PLANE
PACKAGE
OUTLINE
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
DIM MINNOM
A10.00−−−
D12.953.05
D21.982.11
E12.953.05
E21.471.60
L10.060.13
MILLIMETERS
A0.700.75
b0.230.30
c0.150.20
D
E
e0.65 BSC
G0.300.41
K0.64−−−
L0.300.43
M1.401.50
q0 −−−
3.30 BSC
3.30 BSC
_
MAX
0.80
0.05
0.40
0.25
3.15
2.24
3.15
1.73
0.51
−−−
0.56
0.20
1.60
12
_
INCHES
MINNOM
0.028 0.030
0.000−−−
0.009 0.012
0.006 0.008
0.130 BSC
0.116 0.120
0.078 0.083
0.130 BSC
0.116 0.120
0.058 0.063
0.026 BSC
0.012 0.016
0.025−−−
0.012 0.017
0.002 0.005
0.055 0.059
0 −−−
_
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
0.022
0.008
0.063
SOLDERING FOOTPRINT*
8X
0.57
0.650.42
PITCH
4X
0.66
3.60
2.30
MAX
−−−
12
_
0.47
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTTFS5116PL/D
6
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