Datasheet ntms4706n-d Datasheet

Page 1
NTMS4706N
Power MOSFET
30 V, 10.3 A, Single N−Channel, SO−8
Features
• Low Gate Charge
• Standard SO−8 Single Package
• Pb−Free Package is Available
Applications
• Notebooks, Graphics Cards
• Synchronous Rectification
• High Side Switch
• DC−DC Converters
MAXIMUM RATINGS (T
Drain−to−Source Voltage V Gate−to−Source Voltage V Continuous Drain
Current (Note 1)
Power Dissipation (Note 1)
Continuous Drain Current (Note 2)
Power Dissipation (Note 2)
Pulsed Drain Current Operating Junction and Storage Temperature TJ,
Source Current (Body Diode) I Single Pulse Drain−to−Source Avalanche Energy
(VDD = 25 V, VGS = 10 V, IL Peak = 7.5 A, L = 10 mH, RG = 25 W)
Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)
THERMAL RESISTANCE MAXIMUM RATINGS
Junction−to−Ambient – Steady State (Note 1) Junction−to−Ambient – t v 10 s (Note 1) Junction−to−Ambient – Steady State (Note 2)
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
2. Surfacemounted on FR4 board using the minimum recommended pad size.
DS(on)
Parameter Symbol Value Unit
Parameter Symbol Value Unit
[1 oz] including traces).
= 25°C unless otherwise stated)
J
DSS
GS
Steady
State
t v 10 s TA = 25°C 10.3
Steady
State
t v 10 s 2.2
Steady
State
TA = 25°C TA = 85°C 6.2
TA = 25°C P
TA = 25°C TA = 85°C 4.6 TA = 25°C P
tp = 10 ms
I
D
D
I
D
D
I
DM
T
stg
S
E
AS
T
L
R
q
JA
R
q
JA
R
q
JA
30 V
±20 V
8.6
1.5
6.4
0.83 W
31 A
−55 to 150
2.1 A
150 mJ
260 °C
83.5 58
150
A
W
A
°C
°C/W
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V
(BR)DSS
30 V
R
TYP ID MAX
DS(ON)
9.0 mW @ 10 V
11.4 mW @ 4.5 V
N−Channel
D
G
(Note 1)
10.3 A
S
MARKING DIAGRAM/
PIN ASSIGNMENT
Source
1
SO−8 CASE 751 STYLE 12
4706N = Device Code A = Assembly Location L = WaferLot Y = Year WW = Work Week G = Pb−Free Package
(Note: Microdot may be in either location)
Source Source
18
G
Gate
Top View
ALYWG
4706N
Drain Drain Drain Drain
ORDERING INFORMATION
Device Package Shipping
NTMS4706NR2 SO−8 2500/Tape & Reel NTMS4706NR2G SO−8
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.
2500/Tape & Reel
†
*For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
November, 2005 − Rev. 3
1 Publication Order Number:
NTMS4706N/D
Page 2
NTMS4706N
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
(BR)DSS/TJ
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
DSS
GSS
VGS = 0 V, ID = 250 mA
VGS = 0 V, VDS = 24 V
VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage V Negative Threshold Temperature
V
Coefficient Drain−to−Source On Resistance R
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 10 V, ID = 10.3 A 9.0 12 mW
VGS = 4.5 V, ID = 10 A 11.4 15
Forward Transconductance g
FS
VDS = 15 V, ID = 10 A 19 S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Total Gate Charge Q Threshold Gate Charge Q Gate−to−Source Charge Q Gate−to−Drain Charge Q Gate Resistance R
iss oss rss
G(TOT)
G(TH)
GS GD
G
VGS = 0 V, f = 1.0 MHz, VDS = 24 V
VGS = 4.5 V, VDS = 15 V, ID = 10 A
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time t Rise Time t Turn−Off Delay Time t Fall Time t
d(on)
r
d(off)
f
VGS = 10 V, VDD = 15 V, ID = 1.0 A,
RG = 3.0 W
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage V
Reverse Recovery Time t Charge Time t Discharge Time t Reverse Recovery Charge Q
RR
SD
a
b RR
VGS = 0 V, IS = 2.1 A
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 2.1 A
3. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
30 V
21 mV/°C
TJ = 25°C 1.0 mA
TJ = 125°C 50
1.0 2.5 V
−4.8 mV/°C
950 400 100
10 15
1.25
2.4
4.5
1.82
7.5 12
4.0 8.0 24 40 14 25
TJ = 25°C 0.74 1.0
TJ = 125°C 0.57
34 16 18 29 nC
pF
nC
W
ns
V
ns
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NTMS4706N
R
DRAIN−TO−SOURCE RESISTANCE (
)
0
30
0
35
5
TYPICAL PERFORMANCE CURVES
7
TJ = 25°C
2.8 V
2.6 V
2.4 V
2.2 V
8
TJ = 25°C ID = 10 A
VDS ≥ 10 V
30
25
20
15
10
DRAIN CURRENT (AMPS)
D,
I
5
109
0
TJ = 125°C
TJ = 25°C
TJ = −55°C
3
2
2.51.5 4.
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
3.5
41
Figure 2. Transfer Characteristics
0.018 TJ = 25°C
0.015
VGS = 4.5 V
0.012
VGS = 10 V
16
81242
14
18
10
0.009
DRAIN−TO−SOURCE RESISTANCE (W)
0.006
DS(on),
R
ID, DRAIN CURRENT (AMPS)
10 V
25
20
15
10
DRAIN CURRENT (AMPS)
5
D,
I
0
0
5 V
3.2 V
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
4
3 V
62
513 7
Figure 1. On−Region Characteristics
W
0.03
0.025
0.02
0.015
0.01
0.005
DS(on),
2
3186496102
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
5
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.8 ID = 10.3 A VGS = 10 V
1.6
1.4
1.2
DRAIN−TO−SOURCE
1
DS(on),
0.8
R
RESISTANCE (NORMALIZED)
0.6
−50 0−25 25
50 150
75
TJ, JUNCTION TEMPERATURE (°C)
125100 3
Figure 5. On−Resistance Variation with
Temperature
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
10000
, LEAKAGE (nA)
DSS
I
1000
100
10
VGS = 0 V
TJ = 150°C
TJ = 100°C
126
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
18
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
27
24
21159
3
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NTMS4706N
TYPICAL PERFORMANCE CURVES
1800
1500
C
iss
VDS = 0 V VGS = 0 V
TJ = 25°C
1200
C
900
C
rss
iss
600
C
C, CAPACITANCE (pF)
oss
300
C
0
10 0 1020
V
V
DS
GS
20
rss
30
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
VDD = 10 V ID = 10.3 A VGS = 4.5 V
100
t
r
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
V
5
QT
V
DS
4
Q
GS
Q
GD
3
2
1
0
0
2
46
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and
Drain−To−Source Voltage vs. Total Charge
7
VGS = 0 V TJ = 25°C
6
5
4
V
ID = 10 A TJ = 25°C
8
GS
10
20
16
12
8
4
0
DS
V
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
t
t, TIME (ns)
10
1
f
t
d(off)
t
d(on)
1 10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
3
2
, SOURCE CURRENT (AMPS)
1
S
I
0
0.70.4 0.80.5
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
0.90.6
10.3
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NTMS4706N
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AG
−Y−
−Z−
−X− A
58
B
1
S
0.25 (0.010)
4
M
M
Y
K
G
N
C
SEATING PLANE
0.10 (0.004)
H
D
0.25 (0.010) Z
M
Y
SXS
X 45
_
M
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.
MILLIMETERS
DIMAMIN MAX MIN MAX
4.80 5.00 0.189 0.197
B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8
____
N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244
STYLE 12:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
7. DRAIN
8. DRAIN
INCHES
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
0.6
0.024
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
4.0
0.155
1.270
0.050
SCALE 6:1
mm
ǒ
inches
Ǔ
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NTMS4706N
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