Single Pulse Drain−to−Source Avalanche Energy
(V
L = 10 mH, R
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 secs)
THERMAL RESISTANCE MAXIMUM RATINGS
Junction−to−Ambient – Steady State (Note 1)
Junction−to−Ambient – t v 10 s (Note 1)
Junction−to−Ambient – Steady State (Note 2)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surfacemounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq
2. Surfacemounted on FR4 board using the minimum recommended pad size.
DS(on)
= 25°C unless otherwise stated)
J
Parameter
Steady
State
t v 10 sTA = 25°C12.3
Steady
State
t v 10 s2.3
Steady
State
tp = 10 ms
= 25 V, VGS = 10 V, IL Peak = 7.5 A,
DD
[1 oz] including traces).
= 25 W)
G
ParameterSymbolValueUnit
SymbolValueUnit
DSS
GS
TA = 25°C
TA = 85°C7.3
TA = 25°CP
TA = 25°C
TA = 85°C5.4
TA = 25°CP
I
D
D
I
D
D
I
DM
T
stg
S
E
AS
T
L
R
q
JA
R
q
JA
R
q
JA
30V
±20V
10
1.6
7.6
0.86W
37A
−55 to
150
2.3A
200mJ
260°C
80.5
55
145
A
W
A
°C
°C/W
http://onsemi.com
V
(BR)DSS
30 V
R
DS(ON)
7.5 mW @ 10 V
10 mW @ 4.5 V
N−Channel
G
TYPID MAX
12.3 A
D
S
MARKING DIAGRAM/
PIN ASSIGNMENT
Source
Source
1
SO−8
CASE 751
STYLE 12
4704N = Device Code
A= Assembly Location
L= WaferLot
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
Source
18
G
Gate
Top View
ALYWG
4704N
Drain
Drain
Drain
Drain
ORDERING INFORMATION
DevicePackageShipping
NTMS4704NR2SO−82500/Tape & Reel
NTMS4704NR2GSO−8
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
4. Switching characteristics are independent of operating junction temperatures.
30V
28mV/°C
TJ = 25°C1.0mA
TJ = 125°C50
1.02.5V
5.0mV/°C
1225
580
125
1217
1.6
3.25
5.25
1.8
8.2
5.4
28.4
10.5
TJ = 25°C0.751.0
TJ = 125°C0.56
35
18
17
33nC
pF
nC
W
ns
V
ns
http://onsemi.com
2
Page 3
NTMS4704N
TYPICAL PERFORMANCE CURVES
30
25
10 V
5 V
3.4 V
3.2 V
20
15
10
DRAIN CURRENT (AMPS)
5
D,
I
0
0
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
DS
Figure 1. On−Region Characteristics
0.05
0.04
0.03
0.02
0.01
DRAIN−TO−SOURCE RESISTANCE (W)
DS(on),
R
0
3186496102
2
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
3 V
4
62
5137
5
7
TJ = 25°C
2.8 V
2.6 V
2.4 V
2.2 V
8
TJ = 25°C
ID = 12.3 A
40
VDS ≥ 10 V
35
30
25
20
15
TJ = 100°C
10
DRAIN CURRENT (AMPS)
D,
I
5
0
109
03
TJ = 25°C
TJ = −55°C
3.5
2.51.50.5
2
41
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.020
TJ = 25°C
0.015
VGS = 4.5 V
VGS = 10 V
16
812420
14
18
DRAIN CURRENT (AMPS)
10
0.010
0.005
DRAIN−TO−SOURCE RESISTANCE (W)
DS(on),
R
0
I
D,
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.8
ID = 12.3 A
V
= 10 V
GS
1.6
1.4
1.2
DRAIN−TO−SOURCE
1
DS(on),
0.8
R
RESISTANCE (NORMALIZED)
0.6
−500−2525
75
50150
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
100000
10000
, LEAKAGE (nA)
1000
DSS
I
100
1251003
http://onsemi.com
3
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS = 0 V
TJ = 150°C
TJ = 100°C
18
126
21159
24
27
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
30
Page 4
2400
1800
1200
VDS = 0 V VGS = 0 V
C
iss
C
rss
NTMS4704N
TYPICAL PERFORMANCE CURVES
TJ = 25°C
C
iss
5
V
DS
4
Q
GS
3
2
V
20
QT
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
16
V
Q
GD
GS
12
8
25
C
oss
C
rss
600
C, CAPACITANCE (pF)
0
1005105
20
1530
V
V
GS
DS
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
VDD = 15 V
I
= 12.3 A
D
= 4.5 V
V
GS
t, TIME (ns)
100
10
t
r
t
f
t
d(off)
t
d(on)
1
110100
, GATE RESISTANCE (OHMS)
R
G
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
V
0
0
2
46
Q
, TOTAL GATE CHARGE (nC)
G
Figure 8. Gate−To−Source and
Drain−To −Source Voltage vs. Total Charge
7
VGS = 0 V
T
= 25°C
6
J
5
4
3
2
, SOURCE CURRENT (AMPS)
1
S
I
0
V
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
SD
Figure 10. Diode Forward Voltage vs. Current
ID = 10 A
4
T
= 25°C
J
8
10
0.90.6
0
12
1.20.3
http://onsemi.com
4
Page 5
NTMS4704N
PACKAGE DIMENSIONS
SOIC−8
CASE 751−07
ISSUE AG
−Y−
−Z−
−X−
A
58
B
1
S
0.25 (0.010)
4
M
M
Y
K
G
C
SEATING
PLANE
0.10 (0.004)
H
D
0.25 (0.010)Z
M
Y
SXS
N
X 45
_
M
J
SOLDERING FOOTPRINT*
1.52
0.060
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMS4704N/D
5
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