Datasheet ntms4700n Datasheet

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NTMS4700N

Power MOSFET

30 V, 14.5 A, Single N−Channel, SO−8

Features

• Ultra Low R

• Optimized for High Side Control Applications

• High Speed Switching Capability

• Pb−Free Package is Available

Applications

• Notebook Computer Vcore Applications

• Network Applications

• DC−DC Converters

(at 4.5 VGS), Low Gate Resistance and Low Q

DS(on)

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(BR)DSS

30 V

TYP

DS(on)

6.0 mW @ 10 V

7.3 mW @ 4.5 V

ID MAXV

14.5 A

MAXIMUM RATINGS (T

Drain−to−Source Voltage V

Gate−to−Source Voltage − Continuous V

Continuous Drain Current (Note 1)

Power Dissipation (Note 1)

Continuous Drain Current (Note 2)

Power Dissipation (Note 2)

Pulsed Drain Current

Operating and Storage Temperature TJ, T

Source Current (Body Diode) I

Single Pulse Drain−to−Source Avalanche Energy (VDD = 25 V, VGS = 10 V, IPK = 7.5 A, L = 10 mH, R

Lead Temperature for Soldering Purposes (1/8 in from case for 10 s)

= 25 W)

= 25°C unless otherwise noted)

Rating

Steady

State

t v10 s TA = 25°C 14.5

Steady

State

t v10 s 2.5

Steady

State

TA = 25°C

TA = 70°C 9.2

TA = 25°C

TA = 70°C 6.8

TA = 25°C

tp = 10 ms

Symbol Value Unit

DSS

stg

30 V

$20 V

11.5

1.56 W

8.6

0.86 W

40 A

−55 to 150

2.5 A

280 mJ

260 °C

°C

THERMAL RESISTANCE RATINGS

Rating Symbol Value Unit

Junction−to−Lead − Steady State

Junction−to−Ambient − Steady State (Note 1)

Junction−to−Ambient − t v10 s (Note 1)

Junction−to−Ambient − Steady State (Note 2)

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

1. Surface−mounted on FR4 board using 1 in sq. pad size (Cu area 1.127 in sq. [1 oz] including traces).

2. Surface−mounted on FR4 board using minimum recommended pad size (Cu area 0.412 in sq.).

145

°C/W

SO−8 CASE 751 STYLE 12

MARKING DIAGRAM / PIN ASSIGNMENT

AYWW G

Source Source Source

Gate

4700N = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package

(Note: Microdot may be in either location)

Top View

4700N

Drain Drain Drain Drain

ORDERING INFORMATION

Device Package Shipping

NTMS4700NR2 SO−8 2500/Tape & Reel

NTMS4700NR2G

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

SO−8

(Pb−Free)

2500/Tape & Reel

August, 2006 − Rev. 4

1 Publication Order Number:

NTMS4700N/D

Page 2

NTMS4700N

ELECTRICAL CHARACTERISTICS (T

Characteristic

= 25°C unless otherwise noted)

Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

(BR)DSS/TJ

DSS

GSS

VGS = 0 V, ID = 250 mA

VGS = 0 V, VDS = 24 V

VDS = 0 V, VGS = $20 V $100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage

Negative Threshold Temperature Coefficient V

Drain−to−Source On Resistance R

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 4.5 V, ID = 10 A 7.3 10 mW

VGS = 10 V, ID = 13 A 6.0 7.2

Forward Transconductance g

VDS = 15 V, ID = 10 A 25 S

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Gate Resistance R

ISS

OSS

RSS

G(TOT)

G(TH)

= 0 V, f = 1.0 MHz, V

VGS = 4.5 V, VDS = 15 V, ID = 10 A

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

d(ON)

d(OFF)

VGS = 10 V, VDD = 15 V,

= 1.0 A, RG = 3.0 W

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Charge Q

VGS = 0 V, IS = 10 A

VGS = 0 V, dIS/dt = 100 A/ms,

= 10 A

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

30 V

18 mV/°C

TJ = 25°C 1.0 mA

TJ = 125°C 50

1.0 3.0 V

5.0 mV/°C

1600

= 24 V

700

200

16 24

3.0

5.0

7.0

1.4

5.0

29.5

28.5

TJ = 25°C 0.75 1.0

TJ = 125°C 0.55

36 nC

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Page 3

NTMS4700N

TYPICAL PERFORMANCE CURVES

VGS = 10 V

5 V

4 V

3.4 V

3 V

TJ = 25°C

VDS ≥ 10 V

2.8 V

DRAIN CURRENT (AMPS)

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 1. On−Region Characteristics

0.012

0.4

0.50.1 0.3 0.7

2.4 V

0.60.2

0.8

DRAIN CURRENT (AMPS)

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 2. Transfer Characteristics

0.012 TJ = 25°C

0.010

0.008

0.006

0.004

TJ = 125°C

TJ = 25°C

0.010

0.008

0.006

0.004

TJ = −55°C

0.002

DRAIN−TO−SOURCE RESISTANCE (W)

DS(on),

610222

0.002

DRAIN−TO−SOURCE RESISTANCE (W)

222

DS(on),

610

ID, DRAIN CURRENT (AMPS)

VGS = 10 V

TJ = 125°C

TJ = 25°C

TJ = −55°C

VGS = 4.5 V

VGS = 10 V

DRAIN CURRENT (AMPS)

Figure 3. On−Resistance vs. Drain Current and

Temperature

ID = 13 A V

= 10 V

1.5

DRAIN−TO−SOURCE

0.5

DS(on),

RESISTANCE (NORMALIZED)

−50 0−25 25

50 150

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

1000000

100000

10000

, LEAKAGE (nA)

DSS

1000

100

125100 0

http://onsemi.com

Figure 4. On−Resistance vs. Drain Current and

Gate Voltage

VGS = 0 V

TJ = 150°C

TJ = 125°C

105

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

Page 4

NTMS4700N

TYPICAL PERFORMANCE CURVES

3000

iss

TJ = 25°C

2500

2000

rss

1500

1000

C, CAPACITANCE (pF)

500

10 0 5 105

VDS = 0 V VGS = 0 V

15 25

iss

oss

rss

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation

1000

t, TIME (ns)

100

VDD = 15 V I

= 10 A

= 4.5 V

d(off)

d(on)

, GATE−TO−SOURCE VOLTAGE (VOLTS)

468 14

21016

, TOTAL GATE CHARGE (nC)

Figure 8. Gate−To−Source and

Drain−To −Source Voltage vs. Total Charge

VGS = 0 V

= 25°C

ID = 10 A T

= 25°C

1 10 100

, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation vs. Gate Resistance

280

240

200

160

120

AVALANCHE ENERGY (mJ)

EAS, SINGLE PULSE DRAIN−TO−SOURCE

, STARTING JUNCTION TEMPERATURE (°C)

Figure 11. Maximum Avalanche Energy vs.

Starting Junction Temperature

, SOURCE CURRENT (AMPS)

0 0.4

, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage vs. Current

ID = 7.5 A

10025

12575

150

0.80.6

1.00.2

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Page 5

−Y−

−Z−

NTMS4700N

PACKAGE DIMENSIONS

SO−8

CASE 751−07

ISSUE AG

−X−

0.25 (0.010) Z

0.25 (0.010)

SXS

SEATING PLANE

0.10 (0.004)

X 45

SOLDERING FOOTPRINT*

1.52

0.060

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8

____

N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244

STYLE 12:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

INCHES

7.0

0.275

0.6

0.024

4.0

0.155

1.270

0.050

SCALE 6:1

inches

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTMS4700N/D