Datasheet ntms4177p Datasheet

NTMS4177P

Power MOSFET

-30 V, -11.4 A, P-Channel, SOIC-8

Features

•Low R

•Low Capacitance to Minimize Driver Losses

•Optimized Gate Charge to Minimize Switching Losses

•SOIC-8 Surface Mount Package Saves Board Space

•This is a Pb-Free Device

Applications

•Load Switches

•Notebook PC's

•Desktop PC's

MAXIMUM RATINGS (T

Drain-to-Source Voltage V

Gate-to-Source Voltage V

Continuous Drain
Current R

Power Dissipation

(Note 1)

R

q

JA

Continuous Drain
Current R

Power Dissipation

(Note 2)

R

q

JA

Continuous Drain
Current R
(Note 1)

Power Dissipation
R

t < 10 s (Note 1)

q

JA

Pulsed Drain Current T

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) I

Single Pulse Drain-to-Source Avalanche
Energy TJ = 25°C, VDD = 30 V, VGS = 10 V,

= 20 Apk, L = 1.0 mH, RG = 25 W

I

L

Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.

1. Surface-mounted on FR4 board using 1 inch sq pad size, 1 oz Cu.

2. Surface-mounted on FR4 board using the minimum recommended pad size.

) to Minimize Conduction Losses

DS(on

= 25°C unless otherwise stated)

J

Rating

T

= 25°C

(Note 1)

q

JA

(Note 2)

q

JA

t < 10 s

q

JA

Steady

State

A

T

= 70°C -7.1

A

T

= 25°C P

A

T

= 25°C

A

T

= 70°C -5.3

A

T

= 25°C P

A

T

= 25°C

A

T

= 70°C -9.3

A

T

= 25°C P

A

= 25°C,

A

t

= 10 ms

p

Symbol Value Unit

STG

-30 V

±20 V

-8.9

1.52 W

-6.6

0.84 W

-11.4

2.5 W

-46 A

-55 to
+150

-2.1 A

A

A

A

°C

DSS

I

I

I

I

DM

GS

D

D

D

D

D

D

S

EAS 200 mJ

T

L

260 °C

http://onsemi.com

R

V

(BR)DSS

-30 V

12 mW @ -10 V

DS(on)

Max

I

Max

D

-11.4 A

19 mW @ -4.5 V

P-Channel

D

G

S

MARKING DIAGRAM

& PIN ASSIGNMENT

DDDD

8

8

1

SOIC-8

CASE 751

STYLE 12

4177P

AYWW

G

1

SSSG

4177P = Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb-Free Package

ORDERING INFORMATION

Device Package Shipping

NTMS4177PR2G SOIC-8

2500/Tape & Reel

(Pb-Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.

†

© Semiconductor Components Industries, LLC, 2008

March, 2008 - Rev. 0

1 Publication Order Number:

NTMS4177P/D

NTMS4177P

THERMAL RESISTANCE RATINGS

Rating Symbol Max Unit

Junction-to-Ambient – Steady State (Note 3)

Junction-to-Ambient – t≤10 s (Note 3)

Junction-to-FOOT (Drain)

Junction-to-Ambient – Steady State (Note 4)

3. Surface-mounted on FR4 board using 1 inch sq pad size, 1 oz Cu.

4. Surface-mounted on FR4 board using the minimum recommended pad size.

R

q

JA

R

q

JA

R

q

JF

R

q

JA

82

50

20

148

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)jk

J

Characteristic Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain-to-Source Breakdown Voltage

Drain-to-Source Breakdown Voltage Tem‐
perature Coefficient

Zero Gate Voltage Drain Current I

Gate-to-Source Leakage Current I

V

(BR)DSS

V

(BR)DSS/TJ

DSS

GSS

V

V

V

GS

DS

V

= 0 V, I

GS

= 0 V,

= -24 V

= 0 V, V

DS

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage

Negative Threshold Temperature Coeffi‐
cient

Drain-to-Source On Resistance R

Forward Transconductance g

V

GS(TH)

V

GS(TH)/TJ

DS(on)

FS

V

= VDS, I

GS

V

= -10 V I

GS

V

= -4.5 V I

GS

V

= -1.5 V I

DS

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate-to-Source Charge Q

Gate-to-Drain Charge Q

Total Gate Charge Q

Gate Resistance R

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

G(TOT)

G

V

= 0 V, f = 1.0 MHz,

GS

V

= -24 V

DS

VGS = -4.5 V, VDS = -15 V,

I

= -11.4 A

D

V

= -10 V, VDS = -15 V,

GS

I

= -11.4 A,

D

SWITCHING CHARACTERISTICS (Note 6)

Turn-On Delay Time

Rise Time t

Turn-Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

V

= -10 V, V

GS

= -1.0 A, R

I

D

DRAIN-TO-SOURCE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time T

Discharge Time T

Reverse Recovery Time Q

V

SD

RR

a

b

RR

VGS = 0 V

I

= -2.1 A

D

VGS = 0 V, dIS/dt = 100 A/ms,

I

= -2.1 A

S

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

= -250 mA

D

-30 V

29

TJ = 25°C

TJ = 85°C

= ±20 V ±100 nA

GS

= -250 mA

D

-1.5 -2.5 V

-1.0

-5.0

6.0

= -11.4 A

D

= -9.1 A

D

= -11.4 A 30 S

D

10 12

15 19

3100

550

370

29

3.3

10

13

55

2.0 4.0

18

= -15 V,

DD

= 6.0 W

G

13

64

36

TJ = 25°C

TJ = 125°C

-0.73 -1.0

0.54

34

18

16

30

mV/°C

mA

mV/°C

mW

pF

nC

nC

W

ns

V

ns

nC

http://onsemi.com

2

NTMS4177P

TYPICAL PERFORMANCE CURVES

22

20

18

16

14

12

-10V

-4.5 V

-4 V

-3.6 V

-5 V

-4.2 V

-3.8 V

10

8

6

DRAIN CURRENT (AMPS)

4

D,

-I
2

0

0 0.5 1.0 1.5 2.0 2.5 3.0

-V

, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

DS

Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics

0.05

0.04

0.03

TJ = 25°C

3.5 4.0 4.5 5.0

-3.4 V

-3.2 V

-3.0 V

-2.8 V

-2.6 V

TJ = 25°C
I

= -11.4 A

D

22

VDS ≥ 10 V

20

18

16

14

12

10

8

6

DRAIN CURRENT (AMPS)

4

D,

-I
2

0

1.5 2.5 3.5 4.0

2.0 3.0

TJ = 125°C

TJ = 25°C

TJ = -55°C

-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

0.016
TJ = 25°C

0.014

VGS = -4.5 V

0.012

0.02

0.01

DRAIN-TO-SOURCE RESISTANCE (W)

0

246 810

DS(on),

R

-VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

Figure 3. On-Resistance vs. Gate-to-Source

Voltage

1.6
ID = -11.4 A
V

= -10 V

GS

1.4

1.2

1.0

DRAIN-TO-SOURCE

0.8

DS(on),

R

RESISTANCE (NORMALIZED)

0.6

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (°C)

0.010

VGS = -10 V

0.008

DRAIN-TO-SOURCE RESISTANCE (W)

0.006
2101218

DS(on),

R

DRAIN CURRENT (AMPS)

-I

D,

14 16468

20 22

Figure 4. On-Resistance vs. Drain Current and

Gate Voltage

10000

VGS = 0 V

TJ = 150°C

1000

, LEAKAGE (nA)

DSS

-I

100

51015202530

-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

TJ = 125°C

Figure 5. On-Resistance Variation with

Temperature

http://onsemi.com

Figure 6. Drain-to-Source Leakage Current

vs. Voltage

3

4500

4000

C

3500

iss

3000

2500

2000

1500

C, CAPACITANCE (pF)

1000

500

0

C

oss

C

rss

0510

DRAIN-TO-SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation Figure 8. Gate-To-Source and

TYPICAL PERFORMANCE CURVES

TJ = 25°C

VGS = 0 V

15 25

20

NTMS4177P

10

9

8

7

6

5

Q

4

3

2

, GATE-TO-SOURCE VOLTAGE (VOLTS)

1

GS

0

-V

30

0

Drain-To-Source Voltage vs. Total Charge

QT

V

DS

Q

GS

10

GD

20 30

QG, TOTAL GATE CHARGE (nC)

V

GS

ID = -11.4 A
T

= 25°C

J

40 6050

20

18

16

14

12

10

8

6

4

2

0

DS

-V

, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

1000

VDD = -15 V
I

= -1 A

D

= -10 V

V

GS

100

t, TIME (ns)

10

1

1 10 100

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation vs. Gate Resistance

100

10

t

d(off)

t

t

r

t

d(on)

10 ms

100 ms

1 ms

4

VGS = 0 V
T

= 25°C

J

f

3

2

1

, SOURCE CURRENT (AMPS)

S

-I

0

0.8

0.90.5 0.6 0.7

-VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage vs. Current

200

175

150

125

ID = -20 A

1

VGS = -20 V
SINGLE PULSE
TC = 25°C

0.1

, DRAIN CURRENT (AMPS)

D

-I

0.01

0.1 10 100

R

LIMIT

DS(on)

THERMAL LIMIT
PACKAGE LIMIT

1

-VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

10 ms

100

dc

AVALANCHE ENERGY (mJ)

EAS, SINGLE PULSE DRAIN-TO-SOURCE

http://onsemi.com

4

75

50

25

0

25 50 75 100

, STARTING JUNCTION TEMPERATURE (°C)

T

J

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

150125

-Y-

-Z-

NTMS4177P

PACKAGE DIMENSIONS

SOIC-8 NB

CASE 751-07

ISSUE AJ

NOTES:

-X­A

58

B

1

S

0.25 (0.010)

4

M

M

Y

K

G

C

SEATING
PLANE

0.10 (0.004)

H

D

0.25 (0.010) Z

M

Y

SXS

N

X 45

_

M

SOLDERING FOOTPRINT*

J

1.52

0.060

7.0

0.275

4.0

0.155

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

6. 751-01 THRU 751-06 ARE OBSOLETE. NEW
STANDARD IS 751-07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.053 0.069
D 0.33 0.51 0.013 0.020
G 1.27 BSC 0.050 BSC
H 0.10 0.25 0.004 0.010
J 0.19 0.25 0.007 0.010
K 0.40 1.27 0.016 0.050
M 0 8 0 8

____

N 0.25 0.50 0.010 0.020
S 5.80 6.20 0.228 0.244

STYLE 12:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

7. DRAIN

8. DRAIN

INCHES

0.6

0.024

1.270

0.050

SCALE 6:1

ǒ

inches

mm

Ǔ

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

LITERATURE FULFILLMENT:

Literature Distribution Center for ON Semiconductor
 P.O. Box 5163, Denver, Colorado 80217 USA
 Phone: [phone] or 800-344-3860 Toll Free USA/Canada
 Fax: [phone] or 800-344-3867 Toll Free USA/Canada
 Email: [email protected]

N. American Technical Support: 800-282-9855 Toll Free
USA/Canada

Japan: ON Semiconductor, Japan Customer Focus Center
 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051
 Phone: [phone]

http://onsemi.com

ON Semiconductor Website: http://onsemi.com

Order Literature: http://www.onsemi.com/litorder

For additional information, please contact your
local Sales Representative.

NTMS4177P/D

5