Pulsed Drain Current
Operating Junction and Storage TemperatureTJ, T
Continuous Source Current (Body Diode)I
Single Pulse Drain−to−Source Avalanche
Energy (V
L = 1 mH, R
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
THERMAL RESISTANCE RATINGS
Junction−to−Ambient − Steady State (Note 1)
Junction−to−Ambient − t v 10 s (Note 1)
Junction−to−Ambient − Steady State (Note 2)
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously . If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface−mounted on FR4 board using 1″ sq. pad size
(Cu area = 1.127″ sq. [1 oz] including traces).
2. Surface−mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.412″ sq.).
= 30 V , VGS = 10 V, IPK = 32 A,
DD
= 25 W)
G
(at 4.5 VGS), Low Gate Resistance and Low Q
DS(on)
= 25°C unless otherwise noted)
J
RatingSymbolValueUnit
DSS
GS
Steady
State
t v10 s TA = 25°C18
Steady
State
t v10 s2.5
Steady
State
RatingSymbolMaxUnit
TA = 25°C
TA = 85°C11
TA = 25°C
TA = 25°C
TA = 85°C8.0
TA = 25°C
tp = 10 ms
I
D
P
D
I
D
P
D
I
DM
stg
S
E
AS
T
L
R
q
JA
R
q
JA
R
q
JA
30V
$20V
15
1.67W
11
0.93W
56A
−55 to 150°C
3.0A
512mJ
260°C
75
50
135
A
A
°C/W
G
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(BR)DSS
30 V
3.4 mW @ 10 V
4.7 mW @ 4.5 V
G
R
DS(on)
TYP
D
S
ID MAXV
18 A
MARKING DIAGRAM/
PIN ASSIGNMENT
8
1
SO−8
CASE 751
STYLE 12
4107N = Specific Device Code
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
Source
Source
Source
18
AYWWG
G
Gate
(Top View)
4107N
Drain
Drain
Drain
Drain
ORDERING INFORMATION
DevicePackageShipping
NTMS4107NR2SO−82500/Tape & Reel
NTMS4107NR2GSO−8
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD801 1/D.
3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
30V
21mV/°C
TJ = 25°C1.0mA
TJ = 125°C10
1.02.5V
7.4mV/°C
6000
DS
= 15 V
1030
550
45
6.5
16.3
19.3
0.60
9.0
10
94
38
TJ = 25°C0.81.1
TJ = 125°C0.6
41
20
21
48nC
pF
nC
W
ns
V
ns
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2
Page 3
NTMS4107N
6
0
28
28
TYPICAL PERFORMANCE CURVES
3.2 V
24
VGS = 4 V to 10 V
20
16
12
8
DRAIN CURRENT (AMPS)
D,
I
4
0
17359
0
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
DS
Figure 1. On−Region Characteristics
0.008
0.007
0.006
0.005
0.004
VGS = 10 V
4
62
TJ = 125°C
TJ = 25°C
3.0 V
2.8 V
2.6 V
8
10
VDS ≥ 10 V
24
20
16
12
8
DRAIN CURRENT (AMPS)
D,
I
4
0
03
TJ = 125°C
TJ = 25°C
12
TJ = −55°C
4
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.008
0.007
0.006
0.005
0.004
TJ = 25°C
VGS = 4.5 V
5
0.003
TJ = 25°C
0.002
0.001
DRAIN−TO−SOURCE RESISTANCE (W)
TJ = −55°C
0
226
DS(on),
R
101822
146
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs. Drain Current and
Temperature
2
ID = 16 A
V
= 12 V
GS
1.5
1
DRAIN−TO−SOURCE
0.5
DS(on),
R
RESISTANCE (NORMALIZED)
0
−500−2525
TJ, JUNCTION TEMPERATURE (°C)
50150
75
1251000
0.003
0.002
0.001
DRAIN−TO−SOURCE RESISTANCE (W)
0
DS(on),
R
Figure 4. On−Resistance vs. Drain Current and
1000000
100000
10000
, LEAKAGE (nA)
1000
DSS
I
VGS = 0 V
100
VGS = 10 V
62
10
14
ID, DRAIN CURRENT (AMPS)
Gate Voltage
TJ = 150°C
TJ = 125°C
5
1020
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
15
18
22
2
25
3
Figure 5. On−Resistance Variation with
Temperature
http://onsemi.com
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
3
Page 4
NTMS4107N
TYPICAL PERFORMANCE CURVES
8000
7000
6000
TJ = 25°C
C
iss
5000
4000
3000
C, CAPACITANCE (pF)
2000
C
1000
C
rss
0
0510
152025
oss
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance VariationFigure 8. Gate−To−Source and
1000
VDD = 15 V
I
= 1 A
D
= 4.5 V
V
GS
100
t
d(off)
10
8
6
V
QT
4
Q
GS
Q
GD
2
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
V
0
102040
0
30
, TOTAL GATE CHARGE (nC)
Q
G
5060708090
Drain−To−Source Voltage vs. Total Charge
12
VGS = 0 V
T
= 25°C
J
10
8
GS
ID = 16 A
T
= 25°C
J
100
t
f
t
t, TIME (ns)
10
1
110100
d(on)
t
r
, GATE RESISTANCE (OHMS)
R
G
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1000
100
10
VGS = 20 V
1
SINGLE PULSE
TC = 25°C
, DRAIN CURRENT (AMPS)
0.1
D
I
0.01
0.1
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
V
DS
Figure 11. Maximum Rated Forward Biased
, SOURCE CURRENT (AMPS)
S
I
R
LIMIT
DS(on)
THERMAL LIMIT
PACKAGE LIMIT
1
Safe Operating Area
6
4
2
0
0.2
V
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
SD
0.40
0.80.6
Figure 10. Diode Forward Voltage vs. Current
10 ms
100 ms
1 ms
10 ms
dc
10
100
1
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4
Page 5
NTMS4107N
PACKAGE DIMENSIONS
SO−8
CASE 751−07
ISSUE AG
−Y−
−Z−
−X−
A
58
B
1
S
0.25 (0.010)
4
M
M
Y
K
G
C
SEATING
PLANE
0.10 (0.004)
H
D
0.25 (0.010)Z
M
Y
SXS
N
X 45
_
M
J
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
4.0
0.155
1.270
0.050
SCALE 6:1
ǒ
inches
mm
Ǔ
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5
Page 6
NTMS4107N
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NTMS4107N/D
6
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