Datasheet ntmfs4939n-d Datasheet

NTMFS4939N

Power MOSFET

30 V, 53 A, Single N−Channel, SO−8 FL

Features

• Low R

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

• CPU Power Delivery

• DC−DC Converters

MAXIMUM RATINGS (T

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current R (Note 1)

Power Dissipation

(Note 1)

R

q

JA

Continuous Drain Current R (Note 1)

Power Dissipation

≤ 10 s (Note 1)

R

q

JA

Continuous Drain Current R (Note 2)

Power Dissipation

(Note 2)

R

q

JA

Continuous Drain Current R (Note 1)

Power Dissipation

(Note 1)

R

q

JC

Pulsed Drain Current

Current Limited by Package TA = 25°C I

Operating Junction and Storage Temperature

Source Current (Body Diode) I

Drain to Source DV/DT dV/d

Single Pulse Drain−to−Source Avalanche Energy (T

= 31 Apk, L = 0.1 mH, RG = 25 W)

I

L

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size.

to Minimize Conduction Losses

DS(on)

= 25°C unless otherwise stated)

J

Parameter

TA = 25°C

q

JA

TA = 100°C 9.9

TA = 25°C P

TA = 25°C

≤ 10 s

q

JA

TA = 100°C 17

TA = 25°C P

Steady

State

q

JA

TA = 25°C

TA = 100°C 5.9

TA = 25°C P

TC = 25°C

q

JC

TC =100°C 34

TC = 25°C P

TA = 25°C, tp = 10 ms

= 25°C, VDD = 50 V, VGS = 10 V,

J

Symbol Value Unit

t

30 V

±20 V

15.7

2.58 W

26

7.6 W

9.3

0.92 W

53

30 W

159 A

100 A

−55 to +150

27 A

7.0 V/ns

48 mJ

260 °C

A

°C

DSS

GS

I

DM

Dmax

TJ,

T

STG

E

AS

T

D

S

L

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V

(BR)DSS

30 V

G (4)

R

MAX ID MAX

DS(ON)

5.5 mW @ 10 V

8.0 mW @ 4.5 V

D (5,6)

S (1,2,3)

N−CHANNEL MOSFET

53 A

MARKING DIAGRAM

D

S

4939N

1

SO−8 FLAT LEAD

CASE 488AA

STYLE 1

S

AYWWG

S

G

D

A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location)

ORDERING INFORMATION

Device Package Shipping

NTMFS4939NT1G SO−8 FL

(Pb−Free)

NTMFS4939NT3G SO−8 FL

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

1500 /

Tape & Reel

5000 /

Tape & Reel

D

†

September, 2010 − Rev. 3

1 Publication Order Number:

NTMFS4939N/D

NTMFS4939N

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain)

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – Steady State (Note 4)

Junction−to−Ambient – (t ≤ 10 s) (Note 3)

3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

4. Surface−mounted on FR4 board using the minimum recommended pad size.

R

q

JC

R

q

JA

R

q

JA

R

q

JA

4.2

48.5

136

16.6

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

J

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage (transient)

Drain−to−Source Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

V

(BR)DSS

V

(BR)DSSt

V

(BR)DSS

T

DSS

GSS

VGS = 0 V, ID = 250 mA

VGS = 0 V, I

T

= 25°C, t

case

/

J

VGS = 0 V,

V

= 24 V

DS

VDS = 0 V, VGS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage

Negative Threshold Temperature Coefficient V

Drain−to−Source On Resistance R

V

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V

VGS = 4.5 V

Forward Transconductance g

FS

VDS = 1.5 V, ID = 15 A 34 S

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Total Gate Charge Q

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

G(TOT)

VGS = 0 V, f = 1 MHz, VDS = 15 V

VGS = 4.5 V, VDS = 15 V; ID = 30 A

VGS = 10 V, VDS = 15 V; ID = 30 A 28.5 nC

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

VGS = 4.5 V, VDS = 15 V,

= 15 A, RG = 3.0 W

I

D

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

30 V

D(aval) transient

= 13 A,

= 100 ns

34

TJ = 25°C 1.0

TJ = 125°C 10

1.2 1.6 2.2 V

ID = 30 A 4.1 5.5

ID = 15 A 4.1

ID = 30 A 6.0 8.0

ID = 15 A 6.0

V

19

mV/°C

mA

4.0 mV/°C

mW

1954

642

pF

26.5

12.8

2.9

6.0

nC

2.5

12.7

26

21.4

ns

4.5

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2

NTMFS4939N

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

J

Parameter UnitMaxTypMinTest ConditionSymbol

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

VGS = 10 V, VDS = 15 V,

= 15 A, RG = 3.0 W

I

D

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Charge Q

V

SD

RR

a

b

RR

VGS = 0 V,

I

= 30 A

S

VGS = 0 V, dIS/dt = 100 A/ms,

IS = 30 A

PACKAGE PARASITIC VALUES

Source Inductance

Drain Inductance L

Gate Inductance L

Gate Resistance R

L

S

D

G

TA = 25°C

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

9.4

21.4

26.7

3.0

TJ = 25°C 0.9 1.1

TJ = 125°C 0.79

35

18

17

26 nC

0.93 nH

0.005 nH

1.84 nH

1.1 2.0

ns

V

ns

W

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NTMFS4939N

TYPICAL CHARACTERISTICS

90

10 V

80

70

60

50

40

30

, DRAIN CURRENT (A)

20

D

I

10

0

VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.016

0.014

0.012

0.010

3.8 V to 6 V

2.4 V

TJ = 25°C

3.6 V

3.4 V

3.2 V

3.0 V

2.8 V

2.6 V

ID = 30 A T

= 25°C

J

90

80

70

60

50

40

30

, DRAIN CURRENT (A)

20

D

I

10

43210

0

0.008

0.007

0.006

VDS = 10 V

TJ = 25°C

TJ = 125°C

TJ = −55°C

2.5

VGS = 4.5 V

4.03.53.02.01.51.0

0.008

0.006

0.004

, DRAIN−TO−SOURCE RESISTANCE (W)

0.002

DS(on)

R

VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)

Figure 3. On−Resistance vs. V

2.0 ID = 30 A

1.8

V

= 10 V

GS

1.6

1.4

1.2

1.0

, DRAIN−TO−SOURCE RES-

ISTANCE (NORMALIZED)

0.8

DS(on)

R

0.6

TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 5. On−Resistance Variation with

50

Temperature

GS

0.005

VGS = 10 V

0.004

, DRAIN−TO−SOURCE RESISTANCE (W)

9.08.07.0 106.05.04.03.0

0.003

DS(on)

R

80

705030 90604020

Figure 4. On−Resistance vs. Drain Current and

Gate Voltage

10,000

, LEAKAGE (nA)

DSS

I

15012510075250−25−50

VGS = 0 V

TJ = 150°C

1000

TJ = 125°C

100

TJ = 85°C

10

30252015105

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

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NTMFS4939N

TYPICAL CHARACTERISTICS

2400

2200

2000

1800

1600

1400

1200 1000

800

600

C, CAPACITANCE (pF)

400

200

0

1000

100

13

C

iss

12 11 10

Q

T

9

VGS = 0 V T

= 25°C

J

C

oss

8 7 6 5

Q

gs

4 3 2

, GATE−TO−SOURCE VOLTAGE (V)

C

rss

25201510 3050

1

GS

0

V

0 2 4 6 8 101214161820 2224262830

Q

gd

VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

Drain−to−Source Voltage vs. Total Charge

30

VDD = 15 V I

= 15 A

D

= 10 V

V

GS

t

d(off)

t

f

t

r

VGS = 0 V

25

20

TJ = 125°C

15

TJ = 25°C V

= 15 V

DD

= 10 V

V

GS

I

= 30 A

D

t, TIME (ns)

10

1

RG, GATE RESISTANCE (W)

Figure 9. Resistive Switching Time Variation

1000

100

10

VGS = 20 V Single Pulse

1

TC = 25°C

R

Limit

DS(on)

, DRAIN CURRENT (A)

D

I

Thermal Limit Package Limit

0.1

VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C)

Figure 11. Maximum Rated Forward Biased

vs. Gate Resistance

Safe Operating Area

t

d(on)

100 ms

1 ms

10 ms

dc

10

, SOURCE CURRENT (A)

S

I

5

100101

0

V

, SOURCE−TO−DRAIN VOLTAGE (V)

SD

TJ = 25°C

0.90.80.70.60.50.4

1.0

Figure 10. Diode Forward Voltage vs. Current

48

44

ID = 31 A

40 36

32

28 24

20

16

12

, SINGLE PULSE DRAIN−TO−

8

AS

E

4

SOURCE AVALANCHE ENERGY (mJ)

1001010.1

0

150125100755025

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

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5

100

10

1

R(t) (°C/W)

0.1

0.01

Duty Cycle = 50%

20%

10%

5%

2%

1%

Single Pulse

80

70

NTMFS4939N

TYPICAL CHARACTERISTICS

0.010.0010.00010.000010.000001

PULSE TIME (sec)

Figure 13. Thermal Response

0.1 1 10 100 1000

(S)

FS

G

60

50

30

20

10

0

20 504060 70

Figure 14. GFS vs. I

4030100

ID (A)

D

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6

NTMFS4939N

PACKAGE DIMENSIONS

DFN5 5x6, 1.27P (SO8 FL)

CASE 488AA−01

ISSUE D

0.10 C

C

0.05

c

PIN 5

(EXPOSED PAD)

D

2

D1

1234

TOP VIEW

SIDE VIEW

b

8X

A0.10 B

L

14

E2

2 X

e/2

0.20

A

E1

2

A

DETAIL A

K

M

L1

NOTES:

C

B

2 X

0.20 C

4 X

q

E

c

3 X

e

A1

C

SEATING

PLANE

DETAIL A

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

DIM MIN NOM

A1 0.00 −−−

D1 4.50 4.90 D2 3.50 −−−

E1 5.50 5.80 E2 3.45 −−−

L1 0.05 0.17

MILLIMETERS

A 0.90 1.00

b 0.33 0.41 c 0.23 0.28 D 5.15 BSC

E 6.15 BSC

e 1.27 BSC G 0.51 0.61 K 0.51 −−− L 0.51 0.61

M 3.00 3.40

q 0 −−−

_

MAX

1.10

0.05

0.51

0.33

5.10

4.22

6.10

4.30

0.71

−−−

0.71

0.20

3.80 12

_

SOLDERING FOOTPRINT*

3X 4X

STYLE 1:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

1.330

3.200

0.965

2X

0.495

1.270

0.750

2X

0.905

0.475

4X

1.000

4.530

G

D2

BOTTOM VIEW

4.560

2X

1.530

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTMFS4939N/D

7