• Next Generation Enhanced Body Diode, Engineered for Soft
Recovery, Provides Schottky−Like Performance
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• CPU Power Delivery
• DC−DC Converters
, Low Capacitance and Optimized Gate Charge to
DS(on)
V
(BR)DSS
30 V
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R
MAXID MAX
DS(ON)
4.0 mW @ 10 V
5.5 mW @ 4.5 V
D (5,6)
79 A
MAXIMUM RATINGS (T
ParameterSymbolValueUnit
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Continuous Drain
Current R
(Note 2)
Power Dissipation
R
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Pulsed DrainCurrent
Current Limited by PackageTA = 25°CI
Operating Junction and Storage
Temperature
Source Current (Body Diode)I
Drain to Source DV/DTdV/d
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V,
I
L
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
q
JA
(Note 1)
q
JA
≤ 10 s
q
JA
≤ 10 s (Note 1)
q
JA
q
JA
(Note 2)
q
JA
q
JC
(Note 1)
q
JC
= 44 Apk, L = 0.1 mH, RG = 25 W)
= 25°C unless otherwise stated)
J
TA = 25°C
TA = 100°C12.3
TA = 25°CP
TA = 25°C
TA = 100°C22
TA = 25°CP
Steady
State
TA = 25°C, tp = 10 ms
TA = 25°C
TA = 100°C7.3
TA = 25°CP
TC = 25°C
TC =100°C50
TC = 25°CP
DSS
GS
I
I
I
I
I
DM
Dmax
TJ,
T
STG
E
AS
T
30V
±20V
t
19.5
2.62W
35
8.4W
11.6
0.92W
79
43W
235A
100A
−55 to
+150
39.2A
6.0V/ns
96.8mJ
260°C
D
D
D
D
D
D
D
D
S
L
A
A
A
A
°C
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
D
S
4936N
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
S
AYWWG
S
G
G
D
ORDERING INFORMATION
DevicePackageShipping
NTMFS4936NT1GSO−8 FL
(Pb−Free)
NTMFS4936NT3GSO−8 FL
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JC
R
q
JA
R
q
JA
R
q
JA
2.9
47.7
135.2
14.8
°C/W
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterSymbolTest ConditionMinTypMaxUnit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain CurrentI
Gate−to−Source Leakage CurrentI
V
(BR)DSS
V
(BR)DSS
T
DSS
GSS
VGS = 0 V, ID = 250 mA
/
J
VGS = 0 V,
VDS = 24 V
VDS = 0 V, VGS = ±20 V±100nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature CoefficientV
Drain−to−Source On ResistanceR
V
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 10 V
VGS = 4.5 V
Forward Transconductanceg
FS
VDS = 1.5 V, ID = 15 A50S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
Output CapacitanceC
Reverse Transfer CapacitanceC
Total Gate ChargeQ
Threshold Gate ChargeQ
Gate−to−Source ChargeQ
Gate−to−Drain ChargeQ
Total Gate ChargeQ
C
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
G(TOT)
VGS = 0 V, f = 1 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
VGS = 10 V, VDS = 15 V; ID = 30 A43nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDS = 15 V,
= 15 A, RG = 3.0 W
I
D
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
30V
TBD
TJ = 25°C1.0
TJ = 125°C10
1.21.62.2V
4.0mV/°C
ID = 30 A2.94.0
ID = 15 A2.9
ID = 30 A3.95.5
ID = 15 A3.9
3044
1014
39
19
4.6
9.2
2.4
15.5
20.6
24.6
7.0
mV/°C
mA
mW
pF
nC
ns
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2
Page 3
NTMFS4936N
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterUnitMaxTypMinTest ConditionSymbol
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = 10 V, VDS = 15 V,
= 15 A, RG = 3.0 W
I
D
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Timet
Charge Timet
Discharge Timet
Reverse Recovery ChargeQ
V
SD
RR
a
b
RR
VGS = 0 V,
I
= 30 A
S
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
PACKAGE PARASITIC VALUES
Source Inductance
Drain InductanceL
Gate InductanceL
Gate ResistanceR
L
S
D
G
G
TA = 25°C
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
10.4
19
29
8.0
TJ = 25°C0.81.1
TJ = 125°C0.65
39
21.5
17.5
36nC
0.65nH
0.005nH
1.84nH
1.12.0
ns
V
ns
W
http://onsemi.com
3
Page 4
140
4
120
100
80
60
4.5 V to
10 V
4.0 V
NTMFS4936N
TYPICAL CHARACTERISTICS
140
VGS = 3.8 V
3.6 V
3.4 V
3.2 V
120
100
80
60
VDS = 10 V
TJ = 125°C
40
, DRAIN CURRENT (A)
D
I
20
0
01234
, DRAIN−TO−SOURCE VOLTAGE (V)
V
DS
2.8 V
3.0 V
2.4 V
2.6 V
Figure 1. On−Region Characteristics
0.012
0.011
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
, DRAIN−TO−SOURCE RESISTANCE (W)
0.002
2.54.55.56.57.58.59.510.5
DS(on)
R
3.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID = 30 A
T
= 25°C
J
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
40
, DRAIN CURRENT (A)
D
I
20
0
11.522.533.54
VGS, GATE−TO−SOURCE VOLTAGE (V)
TJ = 25°C
TJ = −55°C
Figure 2. Transfer Characteristics
0.006
0.0055
0.005
0.0045
0.004
0.0035
0.003
0.0025
, DRAIN−TO−SOURCE RESISTANCE (W)
0.002
DS(on)
R
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
20 30 40 50 60 70 80 90 100 110 120 130 1
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.8
1.7
ID = 30 A
1.6
V
= 10 V
GS
1.5
1.4
1.3
1.2
1.1
1
(NORMALIZED)
0.9
0.8
0.7
, DRAIN−TO−SOURCE RESISTANCE
0.6
DS(on)
0.5
R
−50−250255075100125150
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
10000
1000
100
, LEAKAGE (nA)
DSS
I
10
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4
VGS = 0 V
TJ = 150°C
TJ = 125°C
TJ = 85°C
5 1015202530
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Page 5
NTMFS4936N
TIME (
)
TYPICAL CHARACTERISTICS
3600
C
3200
iss
2800
2400
2000
1600
C
oss
1200
C, CAPACITANCE (pF)
800
C
400
rss
0
051015202530
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
1000
VDD = 15 V
I
= 15 A
D
= 10 V
V
100
ns
t,
GS
10
TJ = 25°C
VGS = 0 V
t
d(off)
t
f
t
r
t
d(on)
10
Q
9
T
8
7
6
5
Q
GS
GD
4
Q
3
2
1
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
V
0391215 212427 3336 42
VDD = 15 V
V
I
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate−To−Source and
Drain−To −Source Voltage vs. Total Charge
30
VGS = 0 V
25
20
15
10
TJ = 125°C
TJ = 25°C
TJ = 25°C
= 10 V
GS
= 30 A
D
456183039
, SOURCE CURRENT (A)
S
5
1
110100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
I
0
0.40.50.60.70.80.91.0
, SOURCE−TO−DRAIN VOLTAGE (V)
V
SD
Figure 10. Diode Forward Voltage vs. Current
Variation vs. Gate Resistance
1000
100
10
VGS = 20 V
1
, DRAIN CURRENT (A)
D
I
SINGLE PULSE
TC = 25°C
0.1
R
DS(on)
LIMIT
THERMAL LIMIT
0.01
PACKAGE LIMIT
0.1110100
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10 ms
100 ms
1 ms
10 ms
dc
100
90
80
70
60
50
40
30
20
AVALANCHE ENERGY (mJ)
10
, SINGLE PULSE DRAIN−TO−SOURCE
0
AS
E
255075100125150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
ID = 44 A
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5
Page 6
NTMFS4936N
TYPICAL CHARACTERISTICS
100
D = 0.5
0.2
10
0.1
0.05
0.02
1
0.01
r(t) (°C/W)
0.1
SINGLE PULSE
0.01
0.001
0.0000010.000010.00010.0010.010.11101001000
t, TIME (ms)
Figure 13. Thermal Response
100
90
80
70
60
50
GFS (S)
40
30
20
10
0
0 10 20 304050 60 708090
, (A)
I
D
Figure 14. GFS vs. I
D
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6
Page 7
NTMFS4936N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P (SO8 FL)
CASE 488AA−01
ISSUE D
0.10 C
0.10 C
C
0.05
c
PIN 5
(EXPOSED PAD)
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10B
L
14
E2
2 X
e/2
0.20
A
E1
2
A
DETAIL A
K
M
L1
NOTES:
C
B
2 X
0.20 C
4 X
q
E
c
3 X
e
A1
C
SEATING
PLANE
DETAIL A
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MINNOM
A10.00−−−
D14.504.90
D23.50−−−
E15.505.80
E23.45−−−
L10.050.17
MILLIMETERS
A0.901.00
b0.330.41
c0.230.28
D5.15 BSC
E6.15 BSC
e1.27 BSC
G0.510.61
K0.51−−−
L0.510.61
M3.003.40
q0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
−−−
0.71
0.20
3.80
12
_
SOLDERING FOOTPRINT*
3X4X
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
1.330
3.200
0.965
2X
0.495
1.270
0.750
2X
0.905
0.475
4X
1.000
4.530
4.560
2X
1.530
G
D2
BOTTOM VIEW
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFS4936N/D
7
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