Datasheet ntmfs4927-d Datasheet

NTMFS4927N

Power MOSFET

30 V, 38 A, Single N−Channel, SO−8 FL

Features

• Low R

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• Optimized for 5 V, 12 V Gate Drives

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

• CPU Power Delivery

• DC−DC Converters

MAXIMUM RATINGS (T

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current R (Note 1)

Power Dissipation

(Note 1)

R

q

JA

Continuous Drain Current R (Note 1)

Power Dissipation

≤ 10 s (Note 1)

R

q

JA

Continuous Drain Current R (Note 2)

Power Dissipation

(Note 2)

R

q

JA

Continuous Drain Current R (Note 1)

Power Dissipation

(Note 1)

R

q

JC

Pulsed Drain Current

Current Limited by Package TA = 25°C I

Operating Junction and Storage Temperature

Source Current (Body Diode) I

Drain to Source DV/DT dV/d

Single Pulse Drain−to−Source Avalanche Energy (T

= 20 Apk, L = 0.1 mH, RG = 25 W)

I

L

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size.

to Minimize Conduction Losses

DS(on)

= 25°C unless otherwise stated)

J

Parameter

TA = 25°C

q

JA

≤ 10 s

q

JA

Steady

State

q

JA

q

JC

TA = 25°C, tp = 10 ms

= 25°C, VDD = 24 V, VGS = 10 V,

J

TA = 100°C 8.6

TA = 25°C P

TA = 25°C

TA = 100°C 12.9

TA = 25°C P

TA = 25°C

TA = 100°C 5.0

TA = 25°C P

TC = 25°C

TC =100°C 24

TC = 25°C P

Symbol Value Unit

t

30 V

±20 V

13.6

2.70 W

20.4

6.04 W

7.9

0.92 W

38

20.8 W

160 A

100 A

−55 to +150

21 A

6.0 V/ns

20 mJ

260 °C

A

°C

DSS

GS

I

DM

Dmax

TJ,

T

STG

E

AS

T

D

S

L

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V

(BR)DSS

30 V

G (4)

R

MAX ID MAX

DS(ON)

9.0 mW @ 10 V

13.5 mW @ 4.5 V

D (5,6)

S (1,2,3)

N−CHANNEL MOSFET

38 A

MARKING DIAGRAM

D

1

SO−8 FLAT LEAD

CASE 488AA

STYLE 1

A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location)

S

4927N

S

AYWWG

S

G

D

ORDERING INFORMATION

Device Package Shipping

NTMFS4927NT1G SO−8 FL

(Pb−Free)

NTMFS4927NT3G SO−8 FL

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

1500 /

Tape & Reel

5000 /

Tape & Reel

D

†

February, 2011 − Rev. 1

1 Publication Order Number:

NTMFS4927N/D

NTMFS4927N

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain)

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – Steady State (Note 4)

Junction−to−Ambient – (t ≤ 10 s) (Note 3)

3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

4. Surface−mounted on FR4 board using the minimum recommended pad size.

R

q

JC

R

q

JA

R

q

JA

R

q

JA

6.0

46.3

136.2

20.7

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

J

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

V

(BR)DSS

V

(BR)DSS

T

DSS

GSS

VGS = 0 V, ID = 250 mA

/

J

VGS = 0 V,

VDS = 24 V

VDS = 0 V, VGS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage

Negative Threshold Temperature Coefficient V

Drain−to−Source On Resistance R

V

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V

VGS = 4.5 V

Forward Transconductance g

FS

VDS = 1.5 V, ID = 15 A 40 S

CHARGES, CAPACITANCES & GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Total Gate Charge Q

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

G(TOT)

VGS = 0 V, f = 1 MHz, VDS = 15 V

VGS = 4.5 V, VDS = 15 V; ID = 30 A

VGS = 10 V, VDS = 15 V; ID = 30 A 16.0 nC

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

VGS = 4.5 V, VDS = 15 V,

= 15 A, RG = 3.0 W

I

D

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

30 V

24

TJ = 25°C 1.0

TJ = 125°C 10

1.2 1.6 2.2 V

3.7 mV/°C

ID = 30 A 5.4 9.0

ID = 15 A 5.3

ID = 30 A 8.9 13.5

ID = 15 A 8.5

913

366

108

8.0

1.6

3.1

9.2

25.5

14.0

4.4

mV/°C

mA

mW

pF

nC

ns

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2

NTMFS4927N

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

J

Parameter UnitMaxTypMinTest ConditionSymbol

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

VGS = 10 V, VDS = 15 V,

= 15 A, RG = 3.0 W

I

D

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Charge Q

V

SD

RR

a

b

RR

VGS = 0 V,

I

= 30 A

S

VGS = 0 V, dIS/dt = 100 A/ms,

IS = 30 A

PACKAGE PARASITIC VALUES

Source Inductance

Drain Inductance L

Gate Inductance L

Gate Resistance R

L

S

D

G

TA = 25°C

5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

6.5

21.0

18.0

3.0

TJ = 25°C 0.87 1.1

TJ = 125°C 0.76

21.4

10.5

10.9

8.4 nC

1.00 nH

0.005 nH

1.84 nH

0.90 2.2

ns

V

ns

W

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3

NTMFS4927N

TYPICAL CHARACTERISTICS

100

10 V

90

80

70

60

50

40

30

, DRAIN CURRENT (A)

D

I

20

10

0

VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.015

0.014

0.013

0.012

0.011

0.010

0.009

0.008

0.007

0.006

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

0.004

DS(on)

R

Figure 3. On−Resistance vs. V

100

TJ = 25°C

ID = 30 A

VGS (V) ID, DRAIN CURRENT (A)

4.5 V

4.0 V

3.5 V

3.0 V

VGS = 2.5 V

543210

981076543

GS

90

80

70

VDS = 10 V

60

50

40

30

, DRAIN CURRENT (A)

D

I

20

10

0

0.019

0.017

0.015

0.013

0.011

0.009

0.007

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

0.003

DS(on)

R

T = 25°C

Figure 4. On−Resistance vs. Drain Current and

TJ = 25°C

VGS = 4.5 V

VGS = 10 V

40 9080

TJ = −55°C

Gate Voltage

TJ = 125°C

54321

100706050302010

1.7

1.6

1.5

1.4

1.3

1.2

1.1

1.0

, DRAIN−TO−SOURCE

0.9

0.8

DS(on)

R

RESISTANCE (NORMALIZED)

0.7

0.6

ID = 30 A V

= 10 V

GS

TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 5. On−Resistance Variation with

Temperature

10,000

1,000

, LEAKAGE (nA)

100

DSS

I

150

1251007550250−25−50

10

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4

TJ = 150°C

TJ = 125°C

TJ = 85°C

VGS = 0 V

30252015105

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

NTMFS4927N

TYPICAL CHARACTERISTICS

1200

1000

800

600

400

C, CAPACITANCE (pF)

200

0

1000

100

11

C

iss

V

= 0 V

GS

TJ = 25°C

10

9

QT

8

7

6

C

oss

5

Qgs Qgd

4

3

C

rss

302520151050

2

, GATE−TO−SOURCE VOLTAGE (V)

1

GS

0

V

13 7 131516

68 11 14

VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

Drain−to−Source Voltage vs. Total Charge

30

VGS = 0 V

VGS = 10 V V

= 15 V

DD

= 15 A

I

D

t

d(off)

t

f

t

r

25

20

15

TJ = 25°C

VGS = 10 V V

= 15 V

DD

= 30 A

I

D

17121095420

t, TIME (ns)

10

1

RG, GATE RESISTANCE (W)

Figure 9. Resistive Switching Time Variation

1000

100

10

0 V < VGS < 10 V

1

Single Pulse

, DRAIN CURRENT (A)

D

I

0.1

TC = 25°C

R

DS(on)

Limit Thermal Limit Package Limit

0.01

VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C)

Figure 11. Maximum Rated Forward Biased

vs. Gate Resistance

Safe Operating Area

t

d(on)

10 ms

100 ms

1 ms

10 ms

dc

10

, SOURCE CURRENT (A)

S

I

5

0

100101

20

18

16

14

12

10

8

6

4

, SINGLE PULSE DRAIN−TO−

AS

2

E

SOURCE AVALANCHE ENERGY (mJ)

0

1001010.10.01

TJ = 125°C

TJ = 25°C

0.90.8 1.00.70.60.50.40.3

V

, SOURCE−TO−DRAIN VOLTAGE (V)

SD

Figure 10. Diode Forward Voltage vs. Current

ID = 20 A

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

150125100755025

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5

NTMFS4927N

TYPICAL CHARACTERISTICS

100

D = 0.5

0.2

10

0.1

0.05

0.02

1

r(t)

(°C/W)

0.01

0.1 SINGLE PULSE

0.01

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000

t, TIME (ms)

Figure 13. Thermal Response

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6

0.10 C

C

0.05

c

PIN 5

(EXPOSED PAD)

D

2

D1

1234

TOP VIEW

SIDE VIEW

b

8X

A0.10 B

L

14

E2

2 X

e/2

0.20 C

A

E1

2

A

DETAIL A

K

M

L1

NTMFS4927N

PACKAGE DIMENSIONS

DFN5 5x6, 1.27P (SO8 FL)

CASE 488AA−01

ISSUE E

B

2 X

0.20 C

E

c

3 X

DETAIL A

STYLE 1:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

DIM MIN NOM

4 X

A1 0.00 −−−

q

D1 4.50 4.90

A1

D2 3.50 −−−

E1 5.50 5.80 E2 3.45 −−−

C

e

SEATING

PLANE

MILLIMETERS

A 0.90 1.00

b 0.33 0.41 c 0.23 0.28 D 5.15 BSC

E 6.15 BSC

e 1.27 BSC G 0.51 0.61 K 0.51 −−− L 0.51 0.61

L1 0.05 0.17

M 3.00 3.40

q 0 −−−

_

MAX

1.10

0.05

0.51

0.33

5.10

4.22

6.10

4.30

0.71

−−−

0.71

0.20

3.80 12

_

SOLDERING FOOTPRINT*

3X 4X

1.330

3.200

0.965

2X

0.495

1.270

0.750

2X

0.905

0.475

4X

1.000

4.530

G

D2

BOTTOM VIEW

4.560

2X

1.530

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTMFS4927N/D

7