Datasheet ntmfs4899nf Datasheet

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Page 1

NTMFS4899NF

Power MOSFET

30 V, 75 A, Single N−Channel, SO−8 FL

Features

• Integrated Schottky Diode

• Low R

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Applications

• CPU Power Delivery

• DC−DC Converters

• Low Side Switching

MAXIMUM RATINGS (T

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current R (Note 1)

Power Dissipation R

(Note 1)

Continuous Drain Current R 10 sec

Power Dissipation R

t v 10 sec

JA,

Continuous Drain Current R (Note 2)

Power Dissipation R

(Note 2)

Continuous Drain Current R (Note 1)

Power Dissipation R

(Note 1)

Pulsed Drain Current

Current limited by package TA = 25°C I

Operating Junction and Storage Temperature

Source Current (Body Diode) I

Drain to Source dV/dt dV/dt 6 V/ns

Single Pulse Drain−to−Source Avalanche Energy (VDD = 50 V, VGS = 10 V, IL = 41 Apk, L = 0.1 mH, RG = 25 W)

Lead Temperature for Soldering Purposes (1/8” from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

to Minimize Conduction Losses

DS(on)

= 25°C unless otherwise stated)

Parameter Symbol Value Unit

DSS

TA = 25°C

Steady

State

tp=10ms

TA = 85°C 12.9

TA = 25°C P

TA = 25°C

TA = 85°C 21

TA = 25°C P

TA = 25°C

TA = 85°C 7.5

TA = 25°C P

TC = 25°C

TC = 85°C 54

TC = 25°C P

TA = 25°C I

Dmaxpkg

TJ,

STG

EAS 84 mJ

30 V

±20 V

17.8

2.70 W

29.1

7.18 W

10.4

0.92 W

48 W

188 A

90 A

−55 to +150

46 A

260 °C

°C

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(BR)DSS

30 V

MAX ID MAX

DS(ON)

5.0 mW @ 10 V

7.5 mW @ 4.5 V

N−CHANNEL MOSFET

75 A

MARKING DIAGRAM

SO−8 FLAT LEAD

CASE 488AA

STYLE 1

A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package

(Note: Microdot may be in either location)

S S S

4899NF AYWWG

ORDERING INFORMATION

Device Package Shipping

NTMFS4899NFT1G SO−8FL

NTMFS4899NFT3G SO−8FL

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.

*For additional information on our Pb−Free strategy

and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

(Pb−Free)

Tape & Reel

†

1500 /

5000 /

March, 2010 − Rev. 0

1 Publication Order Number:

NTMFS4899NF/D

Page 2

NTMFS4899NF

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain)

Junction−to−Ambient – Steady State (Note 1)

Junction−to−Ambient – Steady State (Note 2)

Junction−to−Ambient − t v 10 sec

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size (50 mm2, 1 oz Cu).

2.6

46.3

136.2

17.4

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V

Drain−to−Source Breakdown Voltage

Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

DSS

GSS

VGS = 0 V, ID = 1.0 mA 30 V

VGS = 0 V,

VDS = 24 V

VDS = 0 V, VGS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage V

Negative Threshold Temperature Coefficient V

Drain−to−Source On Resistance R

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 1.0 mA 1.5 2.5 V

VGS = 10 V

VGS = 4.5 V

Forward Transconductance g

VDS = 1.5 V, ID = 15 A 57 S

CHARGES AND CAPACITANCES

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Total Gate Charge Q

ISS

OSS

RSS

G(TOT)

G(TH)

G(TOT)

VGS = 0 V, f = 1 MHz, VDS = 12 V

VGS = 4.5 V, VDS = 15 V; ID = 30 A

VGS = 10 V, VDS = 15 V,

ID = 30 A

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time t

Rise Time t

Turn−Off Delay Time t

Fall Time t

d(ON)

d(OFF)

VGS = 4.5 V, VDS = 15 V,

ID = 15 A, RG = 3.0 W

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

TJ = 25 °C 500

10 mV/°C

ID = 30 A 3.9 5.0

ID = 15 A 3.8

ID = 30 A 6.0 7.5

ID = 15 A 5.8

1600

360

165

12.2

1.6

4.6

12.6

20.3

4.2

mV/°C

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NTMFS4899NF

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

Parameter UnitMaxTypMinTest ConditionSymbol

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time t

Rise Time t

Turn−Off Delay Time t

Fall Time t

d(ON)

d(OFF)

VGS = 10 V, VDS = 15 V,

ID = 15 A, RG = 3.0 W

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V

VGS = 0 V,

IS = 2.0 A

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Charge Q

VGS = 0 V, dIS/dt = 100 A/ms,

IS = 30 A

PACKAGE PARASITIC VALUES

Source Inductance L

Drain Inductance L

Gate Inductance L

Gate Resistance R

TA = 25°C

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

8.8

18.5

25.9

2.5

TJ = 25°C 0.45 0.70

TJ = 125°C 0.43

9.2

9.8

5.7 nC

0.38

0.005

1.84

1.5 2.4

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NTMFS4899NF

TYPICAL CHARACTERISTICS

180

7 V to

160

10 V

140

120

100

, DRAIN CURRENT (A)

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

VGS = 4.6 V

4.8 V

5 V

6 V

Figure 1. On−Region Characteristics

1.1E−02

1E−02

9E−03

8E−03

7E−03

6E−03

5E−03

4E−03

, DRAIN−TO−SOURCE RESISTANCE (W)

3E−03

DS(on)

3.0 4.0 5.0 6.0 7.0 8.0 9.0 10.0

VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 3. On−Region versus V

TJ = 25°C

4.4 V

4.2 V

4 V

3.8 V

3.6 V

3.4 V

3.2 V

3 V

2.8 V

2.6 V

ID = 30 A TJ = 25°C

180

VDS = 10 V

160

140

120

100

, DRAIN CURRENT (A)

1 1.5 2 2.5 3 3.5 4 4.5 5

TJ = 25°C

VGS, GATE−TO−SOURCE VOLTAGE (V)

TJ = 125°C

TJ = −55°C

Figure 2. Transfer Characteristics

9E−03

8E−03

7E−03

6E−03

5E−03

4E−03

3E−03

, DRAIN−TO−SOURCE RESISTANCE (W)

2E−03

DS(on)

TJ = 25°C

VGS = 4.5 V

VGS = 10 V

10 20 30 40 50 60 70 80 90 100

ID, DRAIN CURRENT (A)

Figure 4. On−Resistance versus Drain Current

and Gate Voltage

1.8

1.7

ID = 30 A VGS = 10 V

1.6

1.5

1.4

1.3

1.2

1.1

, DRAIN−TO−SOURCE

0.9

DS(on)

RESISTANCE (NORMALIZED)

0.8

0.7

0.6

−50 −25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

1.0E−01

1.0E−02

1.0E−03

1.0E−04

, LEAKAGE (nA)

DSS

1.0E−05

1.0E−06

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VGS = 0 V

TJ = 150°C

TJ = 125°C

TJ = 25°C

5 1015202530

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

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NTMFS4899NF

TYPICAL CHARACTERISTICS

2000

1800

iss

1600

1400

1200

1000

800

600

C, CAPACITANCE (pF)

400

200

oss

rss

0 5 10 15 20 25 30

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 7. Capacitance Variation

1000

VDD = 15 V ID = 15 A VGS = 10 V

100

d(off)

TJ = 25°C

= 0 V

, GATE−TO−SOURCE VOLTAGE (V)

ID = 30 A TJ = 25°C VDD = 15 V VGS = 10 V

0 5 10 15 20 2

Qg, TOTAL GATE CHARGE (nC)

Figure 8. Gate−to−Source and

Drain−to−Source Voltage vs. Total Charge

VGS = 0 V

TJ = 25°C

t, TIME (ns)

1 10 100

RG, GATE RESISTANCE (W)

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance

1000

VGS = 30 V Single Pulse

100

TC = 25°C

, DRAIN CURRENT (A)

0.1

Limit

DS(on)

Thermal Limit Package Limit

0.01

0.1 1 10 100

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

d(on)

10 ms

100

1 ms

10 ms

, SOURCE CURRENT (A)

0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0. VSD, SOURCE−TO−DRAIN VOLTAGE (V)

Figure 10. Diode Forward Voltage vs. Current

, SINGLE PULSE DRAIN−TO−

SOURCE AVALANCHE ENERGY (mJ)

25 50 75 100 125 15

TJ, STARTING JUNCTION TEMPERATURE(°C)

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

ID = 41 A

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Page 6

0.10 C

0.05 c

PIN 5

(EXPOSED PAD)

1234

TOP VIEW

SIDE VIEW

A0.10 BC

2 X

e/2

0.20 C

DETAIL A

NTMFS4899NF

PACKAGE DIMENSIONS

DFN5 5x6, 1.27P

(SO−8FL)

CASE 488AA−01

ISSUE D

2 X

0.20 C

DETAIL A

SOLDERING FOOTPRINT*

3X 4X

1.270

0.965

1.330

0.495

3.200

3 X

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

DIM MIN NOM

4 X

A1 0.00 −−−

D1 4.50 4.90

D2 3.50 −−−

E1 5.50 5.80 E2 3.45 −−−

SEATING

PLANE

0.750

0.905

1.000

STYLE 1:

L1 0.05 0.17

PIN 1. SOURCE

MILLIMETERS

A 0.90 1.00

b 0.33 0.41 c 0.23 0.28

D 5.15 BSC

E 6.15 BSC

e 1.27 BSC G 0.51 0.61 K 0.51 −−−

L 0.51 0.61

M 3.00 3.40

q 0 −−−

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

MAX

1.10

0.05

0.51

0.33

5.10

4.22

6.10

4.30

0.71

−−−

0.71

0.20

3.80 12

4.530

0.475

BOTTOM VIEW

1.530

4.560

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTMFS4899NF/D