• Optimized Gate Charge to Minimize Switching Losses
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
MAXIMUM RATINGS (T
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
(Note 1)
Power Dissipation
(Note 1)
R
q
JA
Continuous Drain
Current R
10 sec
Power Dissipation
t v 10 sec
R
q
JA,
Continuous Drain
Current R
(Note 2)
Power Dissipation
(Note 2)
R
q
JA
Continuous Drain
Current R
(Note 1)
Power Dissipation
(Note 1)
R
q
JC
Pulsed Drain
Current
Current limited by packageTA = 25°CI
Operating Junction and Storage
Temperature
Source Current (Body Diode)I
Drain to Source dV/dtdV/dt6V/ns
Single Pulse Drain−to−Source Avalanche
Energy (V
= 39 Apk, L = 0.3 mH, RG = 25 W)
I
L
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
to Minimize Conduction Losses
DS(on)
= 25°C unless otherwise stated)
J
Parameter
TA = 25°C
q
JA
v
q
JA
Steady
State
q
JA
q
JC
tp=10ms
= 50 V, VGS = 10 V,
DD
TA = 85°C16.2
TA = 25°CP
TA = 25°C
TA = 85°C26.5
TA = 25°CP
TA = 25°C
TA = 85°C9.5
TA = 25°CP
TC = 25°C
TC = 85°C84.4
TC = 25°CP
TA = 25°CI
SymbolValueUnit
DSS
GS
I
D
D
I
D
D
I
D
D
I
D
D
DM
Dmaxpkg
TJ,
T
STG
S
EAS228mJ
T
L
30V
±20V
22.5
2.72W
36.7
7.23W
13.2
0.93W
117
73.5W
234A
100A
−55 to
+150
92A
260°C
A
A
A
A
°C
http://onsemi.com
V
(BR)DSS
30 V
R
MAXID MAX
DS(ON)
3.0 mW @ 10 V
4.8 mW @ 4.5 V
N−CHANNEL MOSFET
D
G
S
117 A
MARKING
DIAGRAM
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
S
S
S
G
4898NF
AYWWG
G
D
D
D
ORDERING INFORMATION
DevicePackageShipping
NTMFS4898NFT1GSO−8FL
NTMFS4898NFT3GSO−8FL
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JC
R
q
JA
R
q
JA
R
q
JA
1.7
46
134.2
17.3
°C/W
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterSymbolTest ConditionMinTypMaxUnit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
V
V
Temperature Coefficient
Zero Gate Voltage Drain CurrentI
Gate−to−Source Leakage CurrentI
(BR)DSS
(BR)DSS
T
J
DSS
GSS
/
VGS = 0 V, ID = 1.0 mA30V
VGS = 0 V,
V
= 24 V
DS
VDS = 0 V, VGS = ±20 V±100nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature CoefficientV
Drain−to−Source On ResistanceR
V
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 1.0 mA1.52.5V
VGS = 10 V
VGS = 4.5 V
Forward Transconductanceg
FS
VDS = 1.5 V, ID = 15 A77S
CHARGES AND CAPACITANCES
Input Capacitance
Output CapacitanceC
Reverse Transfer CapacitanceC
Total Gate ChargeQ
Threshold Gate ChargeQ
Gate−to−Source ChargeQ
Gate−to−Drain ChargeQ
Total Gate ChargeQ
C
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
G(TOT)
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
VGS = 10 V, VDS = 15 V,
I
= 30 A
D
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDS = 15 V,
= 15 A, RG = 3.0 W
I
D
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
26
TJ = 25 °C40500
4mV/°C
ID = 30 A2.23.0
ID = 15 A2.2
ID = 30 A3.44.8
ID = 15 A3.4
3233
700
310
24.5
3.2
10
9
49.5
17.6
23
28
8.3
mV/°C
mA
mW
pF
nC
nC
ns
http://onsemi.com
2
Page 3
NTMFS4898NF
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterUnitMaxTypMinTest ConditionSymbol
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
VGS = 0 V,
IS = 2.0 A
Reverse Recovery Timet
Charge Timet
Discharge Timet
Reverse Recovery ChargeQ
RR
a
b
RR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
PACKAGE PARASITIC VALUES
Source Inductance
Drain InductanceL
Gate InductanceL
Gate ResistanceR
L
S
D
G
G
TA = 25°C
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
11.3
17.8
37.3
5.6
TJ = 25°C0.380.70
TJ = 125°C0.31
26.7
13.7
13.0
17.3nC
0.65
0.20
1.5
1.4
ns
V
ns
nH
W
200
180
10 V
7.5 V
160
140
120
100
80
60
, DRAIN CURRENT (A)
D
I
40
20
0
VDS, DRAIN−TO−SOURCE VOLTAGE (V)VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
VGS = 4.4 V
TYPICAL CHARACTERISTICS
160
TJ = 25°C
4.2 V
4.0 V
3.8 V
3.6 V
3.4 V
3.2 V
3.0 V
2.8 V
4.53.52.51.50.5
140
120
100
80
60
, DRAIN CURRENT (A)
40
D
I
20
0
543210
VDS = 10 V
TJ = 25°C
TJ = 125°C
TJ = −55°C
4321
4.53.52.51.5
http://onsemi.com
3
Page 4
NTMFS4898NF
TYPICAL CHARACTERISTICS
0.019
0.017
0.015
0.013
0.011
0.009
0.007
0.005
0.003
, DRAIN−TO−SOURCE RESISTANCE (W)
0.001
DS(on)
R
VGS, GATE−TO−SOURCE VOLTAGE (V)ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
1.8
ID = 30 A
1.7
V
= 10 V
GS
1.6
1.5
1.4
1.3
1.2
1.1
1.0
, DRAIN−TO−SOURCE
0.9
DS(on)
0.8
R
RESISTANCE (NORMALIZED)
0.7
0.6
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
4500
4000
C
3500
iss
3000
2500
2000
1500
C
C, CAPACITANCE (pF)
1000
500
oss
C
rss
0
4242850
VDS, DRAIN−TO−SOURCE VOLTAGE (V)Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
6
Voltage
Temperature
ID = 30 A
T
= 25°C
J
TJ = 25°C
V
= 0 V
GS
0.005
TJ = 25°C
0.004
VGS = 4.5 V
0.003
VGS = 10 V
0.002
, DRAIN−TO−SOURCE RESISTANCE (W)
0.001
10987543
DS(on)
R
40100
706050302010
9080
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.0E−01
1.0E−02
1.0E−03
1.0E−04
, LEAKAGE (A)
DSS
I
1.0E−05
1.0E−06
150
1251007550250−25−50
VGS = 0 V
5
TJ = 150°C
TJ = 125°C
TJ = 25°C
15103020
, DRAIN−TO−SOURCE VOLTAGE (V)
V
DS
25
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
11
10
9
8
7
6
5
Q
gs
Q
4
3
2
, GATE−TO−SOURCE VOLTAGE (V)
1
GS
0
V
3220161280
QT
gd
ID = 30 A
T
= 25°C
J
VDD = 15 V
VGS = 10 V
1540
45353025201050
Drain−to−Source Voltage vs. Total Charge
http://onsemi.com
4
Page 5
NTMFS4898NF
TYPICAL CHARACTERISTICS
1000
VDD = 15 V
ID = 15 A
VGS = 10 V
100
t, TIME (ns)
10
1
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
1000
100
10
VGS = 30 V
1
Single Pulse
0.1
TC = 25°C
R
, DRAIN CURRENT (A)
D
I
Thermal Limit
0.01
Package Limit
VDS, DRAIN−TO−SOURCE VOLTAGE (V)TJ, STARTING JUNCTION TEMPERATURE(°C)
Figure 11. Maximum Rated Forward Biased
vs. Gate Resistance
Limit
DS(on)
Safe Operating Area
160
t
d(off)
t
f
t
r
t
d(on)
10 ms
100 ms
1 ms
10 ms
dc
30
25
20
15
10
, SOURCE CURRENT (A)
S
I
5
0
100101
250
200
150
100
50
, SINGLE PULSE DRAIN−TO−
AS
E
SOURCE AVALANCHE ENERGY (mJ)
0
1001010.1
VGS = 0 V
T
= 25°C
J
0.40.6
V
, SOURCE−TO−DRAIN VOLTAGE (V)
SD
Figure 10. Diode Forward Voltage vs. Current
ID = 39 A
751501251005025
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
0.80.70.50.30.20.1
(S)
FS
g
140
120
100
80
60
40
20
0
30120
VDS = 1.5 V
90756045150
105
DRAIN CURRENT (A)
Figure 13. gFS vs. Drain Current
http://onsemi.com
5
Page 6
0.05
0.10 C
0.10 C
C
c
G
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10B
L
14
E2
6
D2
BOTTOM VIEW
56
5
2 X
e/2
0.20
A
E1
E
2
A
DETAIL A
K
M
L1
NTMFS4898NF
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
C
B
2 X
0.20 C
c
DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
3 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MINNOM
4 X
A10.00−−−
q
D14.504.90
A1
D23.50−−−
E15.505.80
E23.45−−−
C
e
SEATING
PLANE
L10.050.17
MILLIMETERS
A0.901.00
b0.330.41
c0.230.28
D5.15 BSC
E6.15 BSC
e1.27 BSC
G0.510.61
K0.51−−−
L0.510.61
M3.003.40
q0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
−−−
0.71
0.20
3.80
12
_
SOLDERING FOOTPRINT*
3X4X
1.330
3.200
0.965
2X
0.495
1.270
4.560
2X
1.530
0.750
2X
0.905
0.475
4X
1.000
4.530
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFS4898NF/D
6
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