Page 1
NTMFS4897NF
Power MOSFET
30 V, 171 A, Single N−Channel, SO−8 FL
Features
• Low R
• Low Capacitance to Minimize Driver Losses
• Includes Schottky Diode
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Device
Applications
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
to Minimize Conduction Losses
DS(on)
V
(BR)DSS
30 V
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R
MAX ID MAX
DS(ON)
2.0 mW @ 10 V
3.0 mW @ 4.5 V
171 A
MAXIMUM RATINGS (T
Parameter Symbol Value Unit
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Continuous Drain
Current R
10 sec
Power Dissipation
R
Continuous Drain
Current R
(Note 2)
Power Dissipation
R
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Pulsed Drain
Current
Current limited by package TA = 25°C I
Operating Junction and Storage
Temperature
Source Current (Body Diode) I
Drain to Source dV/dt dV/dt 6 V/ns
Single Pulse Drain−to−Source Avalanche
Energy (V
I
L
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
q
JA
(Note 1)
q
JA
v
q
JA
t v 10 sec
q
JA,
q
JA
(Note 2)
q
JA
q
JC
(Note 1)
q
JC
= 50 V, VGS = 10 V,
DD
= 50 Apk, L = 0.3 mH, RG = 25 W)
= 25°C unless otherwise stated)
J
TA = 25°C
TA = 85°C 21
TA = 25°C P
TA = 25°C
TA = 85°C 34
TA = 25°C P
Steady
State
tp=10ms
TA = 25°C
TA = 85°C 12
TA = 25°C P
TC = 25°C
TC = 85°C 123
TC = 25°C P
TA = 25°C I
DSS
GS
I
D
D
I
D
D
I
D
D
I
D
D
DM
Dmaxpkg
TJ,
T
STG
S
EAS 375 mJ
T
L
30 V
±20 V
29
2.74 W
47
7.3 W
17
0.95 W
171
96.2 W
288 A
100 A
−55 to
+150
120 A
260 °C
A
A
A
A
°C
N−CHANNEL MOSFET
D
G
S
MARKING
DIAGRAM
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
S
S
S
G
4897NF
AYWWG
G
D
D
D
ORDERING INFORMATION
Device Package Shipping
NTMFS4897NFT1G SO−8FL
NTMFS4897NFT3G SO−8FL
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy
and soldering details, please download the ON
Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
(Pb−Free)
(Pb−Free)
Tape & Reel
Tape & Reel
†
1500 /
5000 /
© Semiconductor Components Industries, LLC, 2010
June, 2010 − Rev. 1
1 Publication Order Number:
NTMFS4897NF/D
Page 2
NTMFS4897NF
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case (Drain)
Junction−to−Ambient – Steady State (Note 1)
Junction−to−Ambient – Steady State (Note 2)
Junction−to−Ambient − t v 10 sec
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JC
R
q
JA
R
q
JA
R
q
JA
1.3
45.7
132.1
17.2
°C/W
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
V
V
Temperature Coefficient
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
(BR)DSS
T
J
DSS
GSS
/
VGS = 0 V, ID = 1.0 mA 30 V
VGS = 0 V,
V
= 24 V
DS
VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient V
Drain−to−Source On Resistance R
V
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 1.0 mA 1.5 2.0 2.5 V
VGS = 10 V
VGS = 4.5 V
Forward Transconductance g
FS
VDS = 15 V, ID = 15 A 90 S
CHARGES AND CAPACITANCES
Input Capacitance
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
Total Gate Charge Q
C
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
G(TOT)
VGS = 0 V, f = 1 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V; ID = 23 A
VGS = 10 V, VDS = 15 V,
I
= 23 A
D
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time t
Turn−Off Delay Time t
Fall Time t
t
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDS = 15 V,
= 15 A, RG = 3.0 W
I
D
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
28.5
TJ = 25 °C 60 500
4 mV/°C
ID = 22 A 1.3 2.0
ID = 20 A 1.3
ID = 20 A 2.0 3.0
ID = 18 A 2.0
5660
1150
495
40.2
6.4
15.3
13.4
83.6
26
24
36
13
mV/°C
mA
mW
pF
nC
nC
ns
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2
Page 3
NTMFS4897NF
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
Parameter UnitMaxTypMinTest ConditionSymbol
SWITCHING CHARACTERISTICS (Note 4)
Turn−On Delay Time
Rise Time t
Turn−Off Delay Time t
Fall Time t
t
d(ON)
r
d(OFF)
f
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
V
SD
VGS = 0 V,
IS = 2.0 A
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
RR
a
b
RR
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 23 A
PACKAGE PARASITIC VALUES
Source Inductance
Drain Inductance L
Gate Inductance L
Gate Resistance R
L
S
D
G
G
TA = 25°C
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
15.7
21.2
44.6
14.5
TJ = 25°C 0.35 0.70
TJ = 125°C 0.26
39.1
20.1
19
34 nC
0.66
0.20
1.5
0.7 2.0
ns
V
ns
nH
W
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3
Page 4
NTMFS4897NF
TYPICAL PERFORMANCE CURVES
300
280
260
240
220
200
180
160
140
120
100
80
, DRAIN CURRENT (A)
D
I
60
40
20
0
021
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.010
0.008
0.006
4.2 V thru 10 V
TJ = 25°C
300
VGS = 4.0 V
280
260
VDS = 10 V
240
3.8 V
220
200
3.6 V
180
160
140
3.4 V
3.2 V
3.0 V
2.8 V
3
41
5
120
100
80
, DRAIN CURRENT (A)
D
I
60
40
TJ = 125°C
20
0
23
1.5
, GATE−TO−SOURCE VOLTAGE (V)
V
GS
TJ = 25°C
TJ = −55°C
2.5 3.5 4.5
45
0.0035
ID = 20 A
T
= 25°C
J
0.0030
0.0025
TJ = 25°C
VGS = 4.5 V
0.0020
0.004
0.002
, DRAIN−TO−SOURCE RESISTANCE (W)
0
DS(on)
2
R
4
5793
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.8
ID = 20 A
1.7
V
= 10 V
GS
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
−50 250−25 50 75
, DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
DS(on)
R
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
0.0015
VGS = 10 V
0.0010
0.0005
, DRAIN−TO−SOURCE RESISTANCE (W)
0
630
8
10
DS(on)
R
10
70
50 17090
110
130 190150
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
100
125
1.0E−01
1.0E−02
1.0E−03
1.0E−04
, LEAKAGE (A)
DSS
I
1.0E−05
1.0E−06
150
VGS = 0 V
5
TJ = 150°C
TJ = 125°C
TJ = 25°C
1510 30
20
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
210
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Page 5
NTMFS4897NF
TYPICAL PERFORMANCE CURVES
8000
7000
6000
5000
4000
3000
2000
C, CAPACITANCE (pF)
C
1000
rss
0
0816
4
, DRAIN−TO−SOURCE VOLTAGE (V)
V
DS
12 24
Figure 7. Capacitance Variation
1000
t, TIME (ns)
100
10
VDD = 15 V
I
= 15 A
D
= 10 V
V
GS
VGS = 0 V
20
TJ = 25°C
C
C
t
d(off)
t
f
t
r
t
d(on)
iss
oss
28
11
10
Q
T
9
8
7
6
5
4
3
2
, GATE−TO−SOURCE VOLTAGE (V)
1
GS
0
V
0
Q
Q
gs
gd
2010 30 807060
Q
, TOTAL GATE CHARGE (nC)
G
40
ID = 30 A
T
V
V
50
Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Charge
30
VGS = 0 V
TJ = 25°C
25
20
15
10
, SOURCE CURRENT (A)
S
I
5
= 25°C
J
= 15 V
DD
= 30 A
GS
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1000
VGS = 30 V
Single Pulse
TC = 25°C
100
10
1
, DRAIN CURRENT (A)
D
I
0.1
RDS(on) LIMIT
THERMAL LIMIT
0.01
0.1 1 100
V
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
PACKAGE LIMIT
10
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10 ms
100 ms
1 ms
10 ms
dc
0
0.2 0.4
0.1
, SOURCE−TO−DRAIN VOLTAGE (V)
V
SD
Figure 10. Diode Forward Voltage vs. Current
400
350
300
250
200
150
100
50
AVALANCHE ENERGY (mJ)
, SINGLE PULSE DRAIN−TO−SOURCE
0
AS
25
E
50 75
T
, STARTING JUNCTION TEMPERATURE (°C)
J
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
0.3 0.5 0.7
0.6 0.8
ID = 50 A
100 125
150
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5
Page 6
0.10 C
0.10 C
0.05 c
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10 BC
L
14
E2
6
G
D2
BOTTOM VIEW
56
5
2 X
e/2
0.20
A
E1
E
2
A
DETAIL A
K
M
L1
NTMFS4897NF
PACKAGE DIMENSIONS
DFN6 5x6, 1.27P (SO8 FL)
CASE 488AA−01
ISSUE C
C
B
2 X
0.20 C
c
DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
3 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MIN NOM
4 X
A1 0.00 −−−
q
D1 4.50 4.90
A1
D2 3.50 −−−
E1 5.50 5.80
E2 3.45 −−−
C
e
SEATING
PLANE
L1 0.05 0.17
MILLIMETERS
A 0.90 1.00
b 0.33 0.41
c 0.23 0.28
D 5.15 BSC
E 6.15 BSC
e 1.27 BSC
G 0.51 0.61
K 0.51 −−−
L 0.51 0.61
M 3.00 3.40
q 0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
−−−
0.71
0.20
3.80
12
_
SOLDERING FOOTPRINT*
3X 4X
1.330
3.200
0.965
2X
0.495
1.270
4.560
2X
1.530
0.750
2X
0.905
0.475
4X
1.000
4.530
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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NTMFS4897NF/D
6
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