• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices*
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
to Minimize Conduction Losses
DS(ON)
V
(BR)DSS
30 V
http://onsemi.com
R
MAXID MAX
DS(ON)
5.5 mW @ 10 V
9.5 mW @ 4.5 V
66 A
MAXIMUM RATINGS (T
ParameterSymbolValueUnit
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Continuous Drain
Current R
(Note 2)
Power Dissipation
R
Continuous Drain
Current R
(Note 1)
Power Dissipation
R
Pulsed Drain
Current
Operating Junction and Storage
Temperature
Source Current (Body Diode)I
Drain to Source DV/DTdV/dt6V/ns
Single Pulse Drain−to−Source Avalanche
Energy TJ = 25°C, VDD = 30 V, VGS = 10 V,
IL = 19 Apk, L = 1.0 mH, RG = 25 W
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
(Note 1)
q
JA
(Note 2)
q
JA
(Note 1)
q
JC
q
JA
q
JA
q
JC
= 25°C unless otherwise stated)
J
TA = 25°C
TA = 85°C11
TA = 25°CP
TA = 25°C
Steady
State
TA = 85°C7.0
TA = 25°CP
TC = 25°C
TC = 85°C48
TC = 25°CP
TA = 25°C,
tp = 10 ms
DSS
GS
I
D
D
ID
D
I
D
D
I
DM
TJ,
T
STG
S
EAS180.5mJ
T
L
30V
±20V
15
2.17W
9.5
0.87W
66
41.7W
132A
−55 to
+150
35A
260°C
A
A
A
°C
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
(Note: Microdot may be in either location)
D
S
4839N
S
AYWWG
S
G
G
D
ORDERING INFORMATION
DevicePackageShipping
NTMFS4839NT1GSO−8FL
(Pb−Free)
NTMFS4839NT3GSO−8FL
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Gate Charge
http://onsemi.com
4
Page 5
NTMFS4839N
1000
VDS = 15 V
= 30 A
I
D
VGS = 11.5 V
100
t
d(off)
t, TIME (ns)
10
1
110100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
1000
VGS = 20 V
Single Pulse
TC = 25°C
100
10
, DRAIN CURRENT (A)
1
D
I
0.1
0.1110100
R
Limit
DS(on)
Thermal Limit
Package Limit
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
t
f
t
r
t
d(on)
10 ms
100 ms
1 ms
10 ms
dc
30
VGS = 0 V
25
TJ = 25°C
20
15
10
, SOURCE CURRENT (A)
S
I
5
0
0.40.50.60.70.80.911.1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage versus
Current
200
190
180
170
160
150
140
130
120
110
100
90
80
70
60
50
40
30
AVALANCHE ENERGY (mJ)
20
10
0
EAS, SINGLE PULSE DRAIN−TO−SOURCE
255075100125150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
ID = 19 A
http://onsemi.com
5
Page 6
0.10 C
l
0.10 C
0.05 c
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10BC
L
14
E2
6
G
D2
BOTTOM VIEW
56
5
2 X
e/2
0.20 C
A
E1
E
2
A
DETAIL A
K
M
L1
NTMFS4839N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
B
2 X
0.20 C
c
DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
3 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
DIM MINNOM
4 X
A10.00−−−
q
D14.504.90
A1
D23.50−−−
E15.505.80
E23.45−−−
C
e
SEATING
PLANE
L10.050.17
MILLIMETERS
A0.901.00
b0.330.41
c0.230.28
D5.15 BSC
E6.15 BSC
e1.27 BSC
G0.510.61
K0.51−−−
L0.510.61
M3.003.40
q0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
−−−
0.71
0.20
3.80
12
_
SOLDERING FOOTPRINT*
3X4X
1.330
3.200
0.965
2X
0.495
1.270
4.560
2X
1.530
0.750
2X
0.905
0.475
4X
1.000
4.530
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
http://onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loca
Sales Representative
NTMFS4839N/D
6
Loading...
+ hidden pages
You need points to download manuals.
1 point = 1 manual.
You can buy points or you can get point for every manual you upload.