Datasheet ntmfs4839n Datasheet

Page 1
NTMFS4839N
Power MOSFET
30 V, 66 A, Single N−Channel, SO−8FL
Features
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices*
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
to Minimize Conduction Losses
DS(ON)
V
(BR)DSS
30 V
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R
MAX ID MAX
DS(ON)
5.5 mW @ 10 V
9.5 mW @ 4.5 V
66 A
MAXIMUM RATINGS (T
Parameter Symbol Value Unit
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain Current R (Note 1)
Power Dissipation R
Continuous Drain Current R (Note 2)
Power Dissipation R
Continuous Drain Current R (Note 1)
Power Dissipation R
Pulsed Drain Current
Operating Junction and Storage Temperature
Source Current (Body Diode) I
Drain to Source DV/DT dV/dt 6 V/ns
Single Pulse Drain−to−Source Avalanche Energy TJ = 25°C, VDD = 30 V, VGS = 10 V, IL = 19 Apk, L = 1.0 mH, RG = 25 W
Lead Temperature for Soldering Purposes (1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
(Note 1)
q
JA
(Note 2)
q
JA
(Note 1)
q
JC
q
JA
q
JA
q
JC
= 25°C unless otherwise stated)
J
TA = 25°C
TA = 85°C 11
TA = 25°C P
TA = 25°C
Steady
State
TA = 85°C 7.0
TA = 25°C P
TC = 25°C
TC = 85°C 48
TC = 25°C P
TA = 25°C,
tp = 10 ms
DSS
GS
I
D
D
ID
D
I
D
D
I
DM
TJ,
T
STG
S
EAS 180.5 mJ
T
L
30 V
±20 V
15
2.17 W
9.5
0.87 W
66
41.7 W
132 A
−55 to +150
35 A
260 °C
A
A
A
°C
D (5,6)
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING DIAGRAM
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location)
D
S
4839N
S
AYWWG
S
G
G
D
ORDERING INFORMATION
Device Package Shipping
NTMFS4839NT1G SO−8FL
(Pb−Free)
NTMFS4839NT3G SO−8FL
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
1500 /
Tape & Reel
5000 /
Tape & Reel
D
D
†
© Semiconductor Components Industries, LLC, 2010
May, 2010 − Rev. 4
1 Publication Order Number:
NTMFS4839N/D
Page 2
NTMFS4839N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case (Drain)
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – Steady State (Note )
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JC
R
q
JA
R
q
JA
3.0
57.7
143.4
°C/W
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V
Drain−to−Source Breakdown Voltage
V
Temperature Coefficient
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
(BR)DSS
T
J
DSS
GSS
/
VGS = 0 V, ID = 250 mA
VGS = 0 V,
VDS = 24 V
VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage V
Negative Threshold Temperature Coefficient V
Drain−to−Source On Resistance R
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 10 V to
11.5 V
VGS = 4.5 V
Forward Transconductance g
FS
VDS = 15 V, ID = 15 A 14.7 S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
Total Gate Charge Q
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
G(TOT)
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
VGS = 11.5 V, VDS = 15 V;
ID = 30 A
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
d(ON)
r
d(OFF)
f
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
30 V
25
TJ = 25 °C 1
TJ = 125°C 10
1.5 2.5 V
5.8 mV/°C
ID = 30 A 4.5 5.5
ID = 15 A 4.5
ID = 30 A 8.4 9.5
ID = 15 A 8.4
1588
352
196
13 18
1.6
4.8
5.8
28
12
29
18
7.0
8.0
21
24
7.0
mV/°C
mA
mW
pF
nC
nC
ns
ns
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Page 3
NTMFS4839N
ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
Parameter UnitMaxTypMinTest ConditionSymbol
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage V
SD
VGS = 0 V,
IS = 30 A
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
RR
a
b
RR
VGS = 0 V, dIS/dt = 100 A/ms,
= 30 A
I
S
PACKAGE PARASITIC VALUES
Source Inductance L
Drain Inductance L
Gate Inductance L
Gate Resistance R
S
D
G
G
TA = 25°C
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
90
80
70
6.0 V
60
50
40
30
, DRAIN CURRENT (A)
20
D
I
10
0
012345678
4.6 V
4.4 V
4.2 V
TJ = 25°C
4.0 V
3.5 V
VGS = 3.0 V
90
80
70
60
50
40
30
, DRAIN CURRENT (A)
20
D
I
10
0
123456
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ = 25°C 0.9 1.2
TJ = 125°C 0.8
22.2
12.5
9.7
10.8 nC
0.93 nH
0.005 nH
1.84 nH
3.3
TC = 25°C
TC = 125°C
TC = −55°C
VGS, GATE−TO−SOURCE VOLTAGE (V)
V
ns
W
Figure 1. On−Region Characteristics
0.012
0.01
0.008
0.006
, DRAIN−TO−SOURCE RESISTANCE (W)
0.004
2.5 3.5 4.5 5.5 6.5 7.5 8.5 9.5 10.5 11.5
DS(on)
R
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
ID = 30 A
TJ = 25°C
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3
Figure 2. Transfer Characteristics
0.01
0.009
0.008
VGS = 4.5 V
0.007
0.006
0.005 VGS = 11.5 V
0.004
0.003
0.002
, DRAIN−TO−SOURCE RESISTANCE (W)
0.001
DS(on)
10 15 20 25 30 35 40
R
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance versus Drain Current
and Temperature
Page 4
NTMFS4839N
1.80 ID = 30 A
= 10 V & 4.5 V
V
1.60
GS
1.40
1.20
1.00
(NORMALIZED)
0.80
, DRAIN−TO−SOURCE RESISTANCE
0.60
DS(on)
−50 250−25 50 75 125
R
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
3000 2800 2600 2400 2200 2000 1800 1600 1400 1200 1000
C, CAPACITANCE (pF)
C
ISS
C
RSS
800 600 400 200
0
1510 5 0 5 1015202530
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
100000
VGS = 0 V
10000
1000
, LEAKAGE (nA)
SS
I
100
10
100
150
4 8 12 16 20 24 28
Figure 6. Drain−to−Source Leakage Current
TJ = 25°C
C
ISS
C
OSS
C
RSS
V
GS
V
DS
Figure 7. Capacitance Variation
TJ = 150°C
TJ = 125°C
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
versus Voltage
12
Q
T
10
V
DS
V
GS
8
6
GS
Q
GD
ID = 30 A TJ = 25°C
4
2
GATE−TO−SOURCE VOLTAGE (V)
GS,
V
0
Q
0 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 30
20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
DRAIN−TO−SOURCE VOLTAGE (V)
DS,
V
Qg, TOTAL GATE CHARGE (nC)
Figure 8. Gate−to−Source and Drain−to−Source Voltage vs. Total Gate Charge
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Page 5
NTMFS4839N
1000
VDS = 15 V
= 30 A
I
D
VGS = 11.5 V
100
t
d(off)
t, TIME (ns)
10
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
1000
VGS = 20 V Single Pulse TC = 25°C
100
10
, DRAIN CURRENT (A)
1
D
I
0.1
0.1 1 10 100
R
Limit
DS(on)
Thermal Limit Package Limit
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
t
f
t
r
t
d(on)
10 ms
100 ms
1 ms
10 ms
dc
30
VGS = 0 V
25
TJ = 25°C
20
15
10
, SOURCE CURRENT (A)
S
I
5
0
0.4 0.5 0.6 0.7 0.8 0.9 1 1.1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage versus
Current
200 190 180 170 160 150 140 130 120
110
100
90 80 70 60 50 40 30
AVALANCHE ENERGY (mJ)
20 10
0
EAS, SINGLE PULSE DRAIN−TO−SOURCE
25 50 75 100 125 150
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
ID = 19 A
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Page 6
0.10 C
l
0.10 C
0.05 c
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10 BC
L
14
E2
6
G
D2
BOTTOM VIEW
56
5
2 X
e/2
0.20 C
A
E1
E
2
A
DETAIL A
K
M
L1
NTMFS4839N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
B
2 X
0.20 C
c
DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
3 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
DIM MIN NOM
4 X
A1 0.00 −−−
q
D1 4.50 4.90
A1
D2 3.50 −−−
E1 5.50 5.80 E2 3.45 −−−
C
e
SEATING
PLANE
L1 0.05 0.17
MILLIMETERS
A 0.90 1.00
b 0.33 0.41 c 0.23 0.28
D 5.15 BSC
E 6.15 BSC
e 1.27 BSC G 0.51 0.61 K 0.51 −−−
L 0.51 0.61
M 3.00 3.40
q 0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
−−−
0.71
0.20
3.80 12
_
SOLDERING FOOTPRINT*
3X 4X
1.330
3.200
0.965
2X
0.495
1.270
4.560
2X
1.530
0.750
2X
0.905
0.475
4X
1.000
4.530
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NTMFS4839N/D
6
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