Datasheet ntmfs4836n Datasheet

Page 1
NTMFS4836N
Power MOSFET
30 V, 90 A, Single N−Channel, SO−8FL
Features
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb−Free Devices
Applications
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters
• Low Side Switching
to Minimize Conduction Losses
DS(on)
V
(BR)DSS
30 V
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R
MAX ID MAX
DS(ON)
4.0 mW @ 10 V
6.0 mW @ 4.5 V
D (5,6)
90 A
MAXIMUM RATINGS (T
Parameter Symbol Value Unit
Drain−to−Source Voltage V
Gate−to−Source Voltage V
Continuous Drain Current R (Note 1)
Power Dissipation R
Continuous Drain Current R (Note 2)
Power Dissipation R
Continuous Drain Current R (Note 1)
Power Dissipation R
Pulsed Drain Current
Operating Junction and Storage Temperature
Source Current (Body Diode) I
Drain to Source DV/DT dV/dt 6 V/ns
Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL = 22 Apk, L = 1.0 mH, RG = 25 W)
Lead Temperature for Soldering Purposes (1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
(Note 1)
q
JA
(Note 2)
q
JA
(Note 1)
q
JC
q
JA
q
JA
q
JC
= 25°C unless otherwise stated)
J
TA = 25°C
TA = 85°C 13
TA = 25°C P
TA = 25°C
Steady
State
TA = 85°C 8
TA = 25°C P
TC = 25°C
TC = 85°C 65
TC = 25°C P
TA = 25°C,
tp = 10 ms
DSS
GS
I
D
D
ID
D
I
D
D
I
DM
TJ,
T
STG
S
EAS 242 mJ
T
L
30 V
±20 V
18
2.25 W
11
0.89 W
90
55.6 W
180 A
−55 to +150
46 A
260 °C
A
A
A
°C
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING DIAGRAM
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package (Note: Microdot may be in either location)
S S S G
4836N
AYWWG
G
D
ORDERING INFORMATION
Device Package Shipping
NTMFS4836NT1G SO−8FL
(Pb−Free)
NTMFS4836NT3G SO−8FL
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
1500 /
Tape & Reel
5000 /
Tape & Reel
D
D
†
© Semiconductor Components Industries, LLC, 2010
May, 2010 − Rev. 6
1 Publication Order Number:
NTMFS4836N/D
Page 2
NTMFS4836N
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case (Drain)
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – Steady State (Note 4)
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JC
R
q
JA
R
q
JA
2.25
55.6
140.8
°C/W
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V
Drain−to−Source Breakdown Voltage Temperature Coefficient
V
(BR)DSS/TJ
Zero Gate Voltage Drain Current I
Gate−to−Source Leakage Current I
(BR)DSS
DSS
GSS
VGS = 0 V, ID = 250 mA
VGS = 0 V,
VDS = 24 V
VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage V
Negative Threshold Temperature Coefficient V
Drain−to−Source On Resistance R
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = 250 mA
VGS = 10 V to
11.5 V
VGS = 4.5 V
Forward Transconductance g
FS
VDS = 15 V, ID = 15 A 24 S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Total Gate Charge Q
Threshold Gate Charge Q
Gate−to−Source Charge Q
Gate−to−Drain Charge Q
Total Gate Charge Q
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
G(TOT)
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V;
VGS = 11.5 V, VDS = 15 V;
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
d(ON)
r
d(OFF)
f
d(ON)
r
d(OFF)
f
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
ID = 30 A
ID = 30 A
30 V
25
TJ = 25 °C 1
TJ = 125°C 10
1.5 2.5 V
6.0 mV/°C
ID = 30 A 2.8 4.0
ID = 15 A 2.8
ID = 30 A 4.8 6.0
ID = 15 A 4.8
2677
565
307
20 28
3.2
8.0
8.0
45
14
30
20
12
8.0
27
31
7.0
mV/°C
mA
mW
pF
nC
nC
ns
ns
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Page 3
NTMFS4836N
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise specified)
J
Symbol Test Condition Min Typ Max Unit
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage V
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
PACKAGE PARASITIC VALUES
Source Inductance L
Drain Inductance L
Gate Inductance L
Gate Resistance R
RR
SD
a
b
RR
S
D
G
G
VGS = 0 V,
IS = 30 A
TJ = 25°C 0.83 1.2
TJ = 125°C 0.7
VGS = 0 V, dIS/dt = 100 A/ms,
= 30 A
I
S
TA = 25°C
27.1
13.8
ns
13.3
16 nC
0.65 nH
0.005 nH
1.84 nH
1.2
W
V
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Page 4
NTMFS4836N
TYPICAL PERFORMANCE CURVES
120
110
100
90 80
70
60
50 40
30
, DRAIN CURRENT (AMPS)
20
D
I
10
0
021
VGS = 4.5 to 5.0 V
3
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
0.030
0.025
0.020
0.015
110
TJ = 25°C
40
5
768910
4.0 V
3.8 V
3.6 V
3.4 V
3.2 V
3.0 V
2.8 V
ID = 30 A TJ = 25°C
0.008
0.007
0.006
0.005
0.004
VDS ≥ 10 V
100
90
80
70
60
50
40
30
, DRAIN CURRENT (AMPS)
20
D
I
10
0
TJ = 25°C
TJ = 25°C
TJ = 125°C
1
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
23
TJ = −55°C
46
VGS = 4.5 V
5
0.010
0.005
, DRAIN−TO−SOURCE RESISTANCE (W)
0
DS(on)
2
R
4
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 3. On−Resistance vs. Gate−to−Source
1.80 ID = 30 A V
= 10 V & 4.5 V
1.60
1.40
1.20
1.00
(NORMALIZED)
0.80
, DRAIN−TO−SOURCE RESISTANCE
0.60
DS(on)
R
GS
−50 250−25 50 75
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
0.003
0.002
0.001
, DRAIN−TO−SOURCE RESISTANCE (W)
0
615
8
10 12
DS(on)
R
10
20
25 30 55
ID, DRAIN CURRENT (AMPS)
VGS = 11.5 V
35
40 5045
Figure 4. On−Resistance vs. Drain Current and
Voltage
100
125
100,000
10,000
1,000
, LEAKAGE (nA)
100
DSS
I
150
VGS = 0 V
10
8
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Gate Voltage
TJ = 150°C
TJ = 125°C
1612 304
20
24
28
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
60
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Page 5
NTMFS4836N
TYPICAL PERFORMANCE CURVES
5000
4500
C
iss
TJ = 25°C
4000
3500
3000
2500
2000
C
rss
C
iss
1500
C, CAPACITANCE (pF)
1000
500
C
oss
0
15 0 10 15
55
10 25
V
GS
V
DS
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 7. Capacitance Variation
1000
VDS = 15 V ID = 15 A
100
t, TIME (ns)
10
VGS = 11.5 V
t
f
t
d(off)
t
r
t
d(on)
30
12
Q
T
10
8
V
DS
V
GS
6
Q
4
2
Q
gs
gd
ID = 30 A TJ = 25°C
0
, GATE−TO−SOURCE VOLTAGE (VOLTS)
0
GS
V
QG, TOTAL GATE CHARGE (nC)
2010 25 4540
155
30
35
Figure 8. Gate−To−Source and Drain−To−Source
Voltage vs. Total Charge
30
VGS = 0 V
TJ = 25°C
25
20
15
10
20
18
16
14
12
10
8
6
4
2
0
V
DS
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
1
1 10 100
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1000
100
10
VGS = 20 V SINGLE PULSE TC = 25°C
1
, DRAIN CURRENT (AMPS)
D
I
0.1
0.1 1 100
R
LIMIT
DS(on)
THERMAL LIMIT PACKAGE LIMIT
10
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
10 ms
100 ms
1 ms
10 ms
dc
, SOURCE CURRENT (AMPS)
5
S
I
0
0.5 0.6
0.4 1.1
0.7 0.8
0.9 1.0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
260 240 220 200 180 160 140 120 100
80 60 40
AVALANCHE ENERGY (mJ)
20
, SINGLE PULSE DRAIN−TO−SOURCE
0
AS
25
E
50 75
100 125
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
ID = 22 A
150
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Page 6
NTMFS4836N
TYPICAL PERFORMANCE CURVES
100
10
125°C
100°C
, DRAIN CURRENT (AMPS)
D
I
1
125°C
10
PULSE WIDTH (ms)
10001 100
Figure 13. Avalanche Characteristics
10000
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Page 7
0.10 C
0.10 C
0.05 c
D
2
D1
1234
TOP VIEW
SIDE VIEW
b
8X
A0.10 BC
L
14
E2
6
G
D2
BOTTOM VIEW
56
5
2 X
e/2
0.20 C
A
E1
E
2
A
DETAIL A
K
M
L1
NTMFS4836N
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
B
2 X
0.20 C
c
DETAIL A
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
3 X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.
DIM MIN NOM
4 X
q
A1
C
e
SEATING
PLANE
MILLIMETERS
A 0.90 1.00
A1 0.00 −−−
b 0.33 0.41
c 0.23 0.28
D 5.15 BSC D1 4.50 4.90 D2 3.50 −−−
E 6.15 BSC E1 5.50 5.80 E2 3.45 −−−
e 1.27 BSC G 0.51 0.61 K 0.51 −−− L 0.51 0.61
L1 0.05 0.17
M 3.00 3.40
q 0 −−−
_
MAX
1.10
0.05
0.51
0.33
5.10
4.22
6.10
4.30
0.71
−−−
0.71
0.20
3.80 12
_
SOLDERING FOOTPRINT*
3X 4X
1.330
3.200
0.965
2X
0.495
1.270
4.560
2X
1.530
0.750
2X
0.905
0.475
4X
1.000
4.530
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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NTMFS4836N/D
7
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