Datasheet ntmfs4119n Datasheet

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NTMFS4119N

Power MOSFET

30 V, 30 A, Single N-Channel, SO-8 Flat Lead

Features

•Low R

•Fast Switching Times

•Low Inductance SO-8 Package

•These are Pb-Free Devices

Applications

•Notebooks, Graphics Cards

•Low Side Switch

•DC-DC

DS(on)

(BR)DSS

30 V

http://onsemi.com

Typ

DS(on)

2.3 mW @ 10 V

3.1 mW @ 4.5 V

ID Max

(Note 1)

30 A

MAXIMUM RATINGS (T

Drain-to-Source Voltage V

Gate-to-Source Voltage V

Continuous Drain Current

(Note 1)

Power Dissipation (Note 1) Steady

Continuous Drain Current

(Note 2)

Power Dissipation (Note 2)

Pulsed Drain Current

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) I

Single Pulse Drain-to-Source Avalanche Energy

(VDD = 30 V, VGS = 10 V, IPK = 29 A, L = 1 mH, RG = 25 W)

Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s)

= 25°C unless otherwise noted)

Parameter Symbol Value Unit

stg

30 V

$20 V

2.3 W

0.9 W

89 A

-55 to 150

8.0 A

421 mJ

260 °C

°C

DSS

Steady

State

t v10 s TA = 25°C 30

State

t v10 s 6.1

Steady

State

TA = 25°C

TA = 85°C 13

TA = 25°C

TA = 85°C 8.0

TA = 25°C

tp = 10 ms

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction-to-Case - Steady State

Junction-to-Ambient - Steady State (Note 1)

Junction-to-Ambient - t v10 s (Note 1)

Junction-to-Ambient - Steady State (Note 2)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).

2. Surface mounted on FR4 board using the minimum recommended pad size (Cu area = 0.412 in sq).

1.3

°C/W

53.7

20.5

138.5

MARKING DIAGRAM

SO-8 FLAT LEAD

CASE 488AA

STYLE 1

4119N = Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package

(Note: Microdot may be in either location)

S S S G

4119N

AYWWG

ORDERING INFORMATION

Device Package Shipping

NTMFS4119NT1G SO-8 FL

(Pb-Free)

NTMFS4119NT3G SO-8 FL

(Pb-Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

1500 Tape & Reel

5000 Tape & Reel

†

© Semiconductor Components Industries, LLC, 2007

July, 2007 - Rev. 5

1 Publication Order Number:

NTMFS4119N/D

Page 2

NTMFS4119N

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Characteristic Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain-to-Source Breakdown Voltage V

Drain-to-Source Breakdown Voltage Temperature Coefficient

(BR)DSS/TJ

Zero Gate Voltage Drain Current I

Gate-to-Source Leakage Current I

(BR)DSS

DSS

GSS

VGS = 0 V, ID = 250 mA

VGS = 0 V, VDS = 24 V

VDS = 0 V, VGS = 20 V 100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage V

Negative Threshold Temperature Coefficient V

Drain-to-Source On Resistance R

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V, ID = 29 A

VGS = 4.5 V, ID = 25 A

Forward Transconductance g

VDS = 15 V, ID = 10 A 23 S

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate-to-Source Charge Q

Gate-to-Drain Charge Q

Gate Resistance R

ISS

OSS

RSS

G(TOT)

G(TH)

= 0 V, f = 1.0 MHz, V

VGS = 4.5 V, VDS = 15 V, ID = 18 A

SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 4)

Turn-On Delay Time t

Rise Time t

Turn-Off Delay Time t

Fall Time t

d(ON)

d(OFF)

VGS = 4.5 V, VDS = 15 V,

ID = 1.0 A, RG = 3.0 W

DRAIN-SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Charge Q

VGS = 0 V, IS = 8.0 A

VGS = 0 V, dIS/dt = 100 A/ms,

IS = 8.0 A

3. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

TJ = 25°C

TJ = 125°C

= 24 V

TJ = 25°C

TJ = 125°C

30 V

19 mV/°C

1.0 mA

1.0 2.5 V

7.0 mV/°C

2.3 3.5 mW

3.1 4.8

4800

800

530

36.8 60

7.3

17.4

0.73

0.74 1.0

0.56

36.5

19.3

19.8

37 nC

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Page 3

NTMFS4119N

TYPICAL PERFORMANCE CURVES

70 70

DRAIN CURRENT (AMPS)

VGS = 3.8 V to 10 V

13 957

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

410

3.6 V

TJ = 25°C

3.4 V

3.2 V

3.0 V

2.8 V

2.6 V

Figure 1. On-Region Characteristics

0.007 ID = 10 A

0.006

0.005

0.004

0.003

0.002

DRAIN-TO-SOURCE RESISTANCE (W)

0.001

DS(on),

310

256

VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

TJ = 25°C

87 7060

0.0035

0.0025

DRAIN-TO-SOURCE RESISTANCE (W)

0.0015

DS(on),

Figure 3. On-Resistance vs. Gate-to-Source

Voltage

VDS ≥ 10 V

DRAIN CURRENT (AMPS)

TJ = 125°C

TJ = 25°C

TJ = -55°C

VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)

Figure 2. Transfer Characteristics

0.004

TJ = 25°C

0.003

0.002

2010 40 5030

ID, DRAIN CURRENT (AMPS)

VGS = 4.5 V

VGS = 10 V

Figure 4. On-Resistance vs. Drain Current and

Gate Voltage

ID = 29 A VGS = 10 V

1.75

1.5

1.25

DRAIN-TO-SOURCE

DS(on),

0.75

RESISTANCE (NORMALIZED)

0.5

-50 0-25 25

Figure 5. On-Resistance Variation with

50 150

TJ, JUNCTION TEMPERATURE (°C)

Temperature

100000

10000

1000

100

, LEAKAGE (nA)

DSS

125100

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VGS = 0 V

TJ = 150°C

TJ = 100°C

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

12 27

211869

Figure 6. Drain-to-Source Leakage Current

vs. Voltage

Page 4

NTMFS4119N

TYPICAL PERFORMANCE CURVES

7000

6300

5600

iss

VGS = 0 V TJ = 25°C

4900

4200

3500

2800

2100

C, CAPACITANCE (pF)

1400

oss

700

rss

0510

15 20

GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation Figure 8. Gate-To-Source and

1000

VDD = 15 V ID = 1 A VGS = 4.5 V

, GATE-TO-SOURCE VOLTAGE (VOLTS)

51015

2520

QG, TOTAL GATE CHARGE (nC)

Drain-To-Source Voltage vs. Total Charge

VGS = 0 V TJ = 25°C

ID = 18 A TJ = 25°C

, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

4035

100

t, TIME (ns)

1 10 100

d(off)

d(on)

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation vs. Gate Resistance

, SOURCE CURRENT (AMPS)

0.4 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage vs. Current

0.80.6

0.90.70.5

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Page 5

NTMFS4119N

PACKAGE DIMENSIONS

DFN6 5x6, 1.27P (SO8 FL)

CASE 488AA-01

ISSUE C

0.10 C

0.05 c

1234

TOP VIEW

SIDE VIEW

A0.10 BC

BOTTOM VIEW

2 X

e/2

0.20 C

DETAIL A

2 X

0.20 C

DETAIL A

STYLE 1:

PIN 1. SOURCE

2. SOURCE

3. SOURCE

4. GATE

5. DRAIN

6. DRAIN

3 X

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH PROTRUSIONS OR GATE BURRS.

DIM MIN NOM

4 X

A1 0.00 ---

D1 4.50 4.90

D2 3.50 ---

E1 5.50 5.80 E2 3.45 ---

SEATING

PLANE

L1 0.05 0.17

MILLIMETERS

A 0.90 1.00

b 0.33 0.41

c 0.23 0.28

D 5.15 BSC

E 6.15 BSC

e 1.27 BSC G 0.51 0.61 K 0.51 --- L 0.51 0.61

M 3.00 3.40

q 0 ---

MAX

1.10

0.05

0.51

0.33

5.10

4.22

6.10

4.30

0.71

---

0.71

0.20

3.80 12

SOLDERING FOOTPRINT*

3X 4X

1.330

3.200

0.965

0.495

1.270

4.560

1.530

0.750

0.905

0.475

1.000

4.530

*For additional information on our Pb-Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTMFS4119N/D