Datasheet ntmd6p02r2-d Datasheet

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NTMD6P02R2

Preferred Device

Power MOSFET 6 Amps, 20 Volts

P−Channel SOIC−8, Dual

Features

• Ultra Low R

• Higher Efficiency Extending Battery Life

• Logic Level Gate Drive

• Miniature Dual SOIC−8 Surface Mount Package

• Diode Exhibits High Speed, Soft Recovery

• Avalanche Energy Specified

• SOIC−8 Mounting Information Provided

• Pb−Free Packages are Available

Applications

• Power Management in Portable and Battery−Powered Products,

i.e.: Cellular and Cordless Telephones, and PCMCIA Cards

MAXIMUM RATINGS

Drain−to−Source Voltage V Gate−to−Source Voltage − Continuous V Thermal Resistance −

Junction−to−Ambient (Note 1) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4)

Thermal Resistance −

Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4)

Thermal Resistance −

Junction−to−Ambient (Note 3) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 70°C Maximum Operating Power Dissipation Maximum Operating Drain Current Pulsed Drain Current (Note 4)

Operating and Storage Temperature Range TJ, T

Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = −20 Vdc, VGS = −5.0 Vdc, Peak IL = −5.0 Apk, L = 40 mH, RG = 25 W)

Maximum Lead Temperature for Soldering Purposes for 10 seconds

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz. Cu 0.06″ thick single sided), t = 10 seconds.

2. Mounted onto a 2″ square FR−4 Board (1 in sq, 2 oz. Cu 0.06″ thick single sided), t = steady state.

3. Minimum FR−4 or G−10 PCB, t = steady state.

4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.

DS(on)

Rating Symbol Value Unit

JA D

stg

−20 V

"12 V

62.5

2.0

−7.8

−5.7

0.5

−3.89

−40

1.28

−6.2

−4.6

0.3

−3.01

−35

166

0.75

−4.8

−3.5

0.2

−2.48

−30

− 55 to +150

500 mJ

260 °C

DSS

°C/W

A A

°C/W

A A

°C/W

A A

°C

6 AMPERES, 20 VOLTS

SOIC−8 CASE 751 STYLE 11

E6P02 = Specific Device Code x = Blank or S A = Assembly Location Y = Year WW = Work Week G = Pb−Free Package

(Note: Microdot may be in either location)

ORDERING INFORMATION

Device Package Shipping

NTMD6P02R2 SOIC−8 2500 / Tape & Ree NTMD6P02R2G SOIC−8

NTMD6P02R2SG SOIC−8

†For information on tape and reel specifications

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D

Preferred devices are recommended choices for future use and best overall value.

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P−Channel

MARKING DIAGRAM &

PIN ASSIGNMENT

D1 D1 D2 D2

E6P02x

AYWW G

S1 G1 S2 G2

†

2500 / Tape & Ree

(Pb−Free)

2500 / Tape & Ree

(Pb−Free)

March, 2007 − Rev. 3

1 Publication Order Number:

NTMD6P02R2/D

Page 2

NTMD6P02R2

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)*

Characteristic

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

(VGS = 0 Vdc, ID = −250 mAdc)

Temperature Coefficient (Positive) Zero Gate Voltage Drain Current

(VDS = −20 Vdc, VGS = 0 Vdc, TJ = 25°C) (VDS = −20 Vdc, VGS = 0 Vdc, TJ = 70°C)

Gate−Body Leakage Current

(VGS = −12 Vdc, VDS = 0 Vdc)

Gate−Body Leakage Current

(VGS = +12 Vdc, VDS = 0 Vdc)

ON CHARACTERISTICS

Gate Threshold Voltage

(VDS = VGS, ID = −250 mAdc)

Temperature Coefficient (Negative) Static Drain−to−Source On−State Resistance

(VGS = −4.5 Vdc, ID = −6.2 Adc) (VGS = −2.5 Vdc, ID = −5.0 Adc) (VGS = −2.5 Vdc, ID = −3.1 Adc)

Forward Transconductance (VDS = −10 Vdc, ID = −6.2 Adc) g

DYNAMIC CHARACTERISTICS

Input Capacitance Output Capacitance C

(VDS = −16 Vdc, VGS = 0 Vdc,

f = 1.0 MHz)

Reverse Transfer Capacitance C

SWITCHING CHARACTERISTICS (Notes 5 and 6)

Turn−On Delay Time Rise Time t Turn−Off Delay Time t

(VDD = −10 Vdc, ID = −1.0 Adc,

VGS = −10 Vdc,

RG = 6.0 W)

Fall Time t Turn−On Delay Time Rise Time t Turn−Off Delay Time t

(VDD = −16 Vdc, ID = −6.2 Adc,

VGS = −4.5 Vdc,

RG = 6.0 W)

Fall Time t Total Gate Charge Gate−Source Charge Q Gate−Drain Charge Q

(VDS = −16 Vdc, VGS = −4.5 Vdc,

ID = −6.2 Adc)

BODY−DRAIN DIODE RATINGS (Note 5)

Diode Forward On−Voltage (IS = −1.7 Adc, VGS = 0 Vdc)

(IS = −1.7 Adc, VGS = 0 Vdc, TJ = 125°C)

Diode Forward On−Voltage (IS = −6.2 Adc, VGS = 0 Vdc)

(IS = −6.2 Adc, VGS = 0 Vdc, TJ = 125°C)

Reverse Recovery Time

(IS = −1.7 Adc, VGS = 0 Vdc,

dIS/dt = 100 A/ms)

Reverse Recovery Stored Charge Q

5. Indicates Pulse Test: Pulse Width =300 ms max, Duty Cycle = 2%.

6. Switching characteristics are independent of operating junction temperature. *Handling precautions to protect against electrostatic discharge are mandatory.

Symbol Min Typ Max Unit

(BR)DSS

DSS

GSS

GS(th)

DS(on)

d(on)

d(off)

d(on)

d(off)

t t

iss oss rss

f tot gs gd

rr a

−20

−

−11.6

−

−1.0

−5.0

− − −100

− − 100

−0.6

−

−0.88

2.6

0.027

0.038

−1.20

−

0.033

0.050

−

− 15 − Mhos

− 1380 1700 pF

− 515 775

− 250 450

− 15 25

− 20 50

− 85 125

− 50 110

− 17 −

− 65 −

− 50 −

− 80 −

− 20 35

− 4.0 −

− 8.0 −

−

−0.80

−0.65

−0.95

−0.80

−1.2

−

− 50 80

− 20 −

− 30 −

− 0.04 −

Vdc

mV/°C

mAdc

nAdc

Vdc

mV/°C

Vdc

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NTMD6P02R2

−I

, DRAIN CURRENT (AMPS)

−10 V

8.0

6.0

4.0

2.0

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

−4.5 V

−3.8 V

−3.1 V

−2.5 V

−2.1 V

Figure 1. On−Region Characteristics

0.05

0.04

0.03

0.02

TJ = 25°C

−1.8 V

−1.5 V

VGS = −1.3 V

ID = −6.2 A TJ = 25°C

VDS ≥ −10 V

8.0

6.0

4.0 100°C

, DRAIN CURRENT (AMPS)

2.0

−I

1.751.501.251.000.750.500.250

−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

TJ = −55°C

25°C

2.01.51.00

Figure 2. Transfer Characteristics

0.05 TJ = 25°C

0.04

0.03

VGS = −2.5 V

−2.7 V

−4.5 V

0.01

, DRAIN−TO−SOURCE RESISTANCE (W)

DS(on)

1.6

1.4

1.2

(NORMALIZED)

0.8

, DRAIN−TO−SOURCE RESISTANCE

0.6

DS(on)

−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 3. On−Resistance versus

Gate−To−Source Voltage

ID = −6.2 A VGS = −4.5 V

TJ, JUNCTION TEMPERATURE (°C)

, DRAIN−TO−SOURCE RESISTANCE (W)

108.06.04.02.00

DS(on)

, LEAKAGE (nA)

DSS

−I

1501251007550250−25−50

0.02

0.010

−ID, DRAIN CURRENT (AMPS)

6.04.02.00

Figure 4. On-Resistance versus Drain Current

and Gate Voltage

1000

100

0.1

0.01

VGS = 0 V

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

TJ = 125°C

100°C

25°C

12108.0 1

161284

Figure 5. On−Resistance Variation with

Temperature

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Figure 6. Drain−To−Source Leakage Current

versus Voltage

Page 4

NTMD6P02R2

C, CAPACITANCE (pF)

5000

100

4500 4000

VDS = 0 V VGS = 0 V

iss

TJ = 25°C

3500 3000

2500

rss

2000

1500 1000

500

rss

iss

oss

10 0 5.0 105.0

−V

15 20

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation

1000

VDD = −16 V ID = −1.0 A VGS = −10 V

100

t, TIME (ns)

1 10 100

RG, GATE RESISTANCE (OHMS)

d(off)

d(on)

416

ID = −6.2 A

VDS = −16 V VGS = −4.5 V

TJ = 25°C

, GATE−TO−SOURCE VOLTAGE (VOLT

5.0 10 20

Qg, TOTAL GATE CHARGE (nC)

, DRAIN−TO−SOURCE VOLTAGE (VOLT

Figure 8. Gate−To−Source

and Drain−To−Source Voltage versus Total Charge

1000

VDD = −16 V ID = −6.2 A VGS = −4.5 V

100

t, TIME (ns)

11010

d(off)

d(on)

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time Variation

versus Gate Resistance

Figure 10. Resistive Switching Time Variation

versus Gate Resistance

DRAIN−TO−SOURCE DIODE CHARACTERISTICS

VGS = 2.5 V

, DRAIN CURRENT (AMPS)

−I

0.1

SINGLE PULSE TC = 25°C

1.0 ms

10 ms

LIMIT

DS(on)

THERMAL LIMIT PACKAGE LIMIT

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 12. Maximum Rated Forward Biased

Safe Operating Area

VGS = 0 V TJ = 25°C

, SOURCE CURRENT (AMPS)

−I 0

0 0.2 0.4 0.6

0.8 1.0

1.2

−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 11. Diode Forward Voltage versus Current

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Page 5

NTMD6P02R2

di/dt

TIME

0.1

0.01

THERMAL RESISTANCE

Rthja(t), EFFECTIVE TRANSIENT

0.001

1.0E−05 1.0E−04 1.0E−03 1.0E−02 1.0E−01 1.0E+00 1.0E+01

D = 0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

0.25 I

Figure 13. Diode Reverse Recovery Waveform

TYPICAL ELECTRICAL CHARACTERISTICS

Normalized to qja at 10s.

0.0175 W 0.0710 W 0.2706 W 0.5776 W 0.7086 W

Chip

t, TIME (s)

Figure 14. Thermal Response

107.55 F1.7891 F0.3074 F0.0854 F0.0154 F

Ambient

1.0E+02 1.0E+03

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Page 6

−Y−

−Z−

NTMD6P02R2

PACKAGE DIMENSIONS

SOIC−8 NB

CASE 751−07

ISSUE AH

NOTES:

−X− A

0.25 (0.010)

SEATING PLANE

0.10 (0.004)

0.25 (0.010) Z

SXS

X 45

SOLDERING FOOTPRINT*

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDARD IS 751−07.

MILLIMETERS

DIMAMIN MAX MIN MAX

4.80 5.00 0.189 0.197

B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.053 0.069 D 0.33 0.51 0.013 0.020 G 1.27 BSC 0.050 BSC H 0.10 0.25 0.004 0.010 J 0.19 0.25 0.007 0.010 K 0.40 1.27 0.016 0.050 M 0 8 0 8

____

N 0.25 0.50 0.010 0.020 S 5.80 6.20 0.228 0.244

INCHES

1.52

0.060

7.0

0.275

0.6

0.024

4.0

0.155

1.270

0.050

SCALE 6:1

inches

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTMD6P02R2/D