Datasheet ntljs2103p Datasheet

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Page 1

NTLJS2103P

Power MOSFET

−12 V, −7.7 A, mCoolt Single P−Channel, 2x2 mm, WDFN Package

Features

• Recommended Replacement Device − NTLUS3A40P

• WDFN Package Provides Exposed Drain Pad for Excellent Thermal

Conduction

• 2x2 mm Footprint Same as SC−88 Package

• Lowest R

• 1.2 V R

Drive

DS(on)

• Low Profile (< 0.8 mm) for Easy Fit in Thin Environments

• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS

Compliant

Solution in 2x2 mm Package

DS(on)

Rating for Operation at Low Voltage Logic Level Gate

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TYP

(BR)DSS

−12 V 45 mW @ −1.8 V

DS(on)

25 mW @ −4.5 V

35 mW @ −2.5 V

60 mW @ −1.5 V

95 mW @ −1.2 V

ID MAX (Note 1)V

−5.9 A

−5.3 A

−2.0 A

−1.0 A

−0.2 A

Applications

• High Side Load Switch

• DC−DC Converters (Buck and Boost Circuits)

• Optimized for Battery and Load Management Applications in

Portable Equipment

• Li−Ion Battery Linear Mode Charging

MAXIMUM RATINGS (T

Parameter Symbol Value Unit

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current (Note 1)

Power Dissipation (Note 1)

Continuous Drain Current (Note 2)

Power Dissipation (Note 2)

Pulsed Drain Current

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) (Note 2) I

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

2. Surface Mounted on FR4 Board using the minimum recommended pad size, (30 mm

, 2 oz Cu).

= 25°C unless otherwise noted)

DSS

STG

= 25°C

Steady

State

t ≤ 5 s T

Steady

State

t ≤ 5 s 3.3

Steady

State

= 85°C −4.2

= 25°C −7.7

= 25°C

= 85°C −2.5

= 25°C

= 10 ms

−12 V

±8.0 V

−5.9

−3.5

−24 A

−55 to

150

−2.7 A

260 °C

1.9

0.7 W

°C

Pin 1

J7 = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location)

P−CHANNEL MOSFET

WDFN6

CASE 506AP

MARKING DIAGRAM

J7MG

PIN CONNECTIONS

(Top View)

ORDERING INFORMATION

Device Package Shipping

NTLJS2103PTAG WDFN6

(Pb−Free)

NTLJS2103PTBG WDFN6

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

3000/Tape & Reel

†

6 5 4

March, 2011 − Rev. 3

1 Publication Order Number:

NTLJS2103P/D

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NTLJS2103P

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Unit

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – t ≤ 5 s (Note 3)

Junction−to−Ambient – Steady State Min Pad (Note 4)

3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm

MOSFET ELECTRICAL CHARACTERISTICS (T

Parameter

Symbol Test Conditions Min Ty p Max Unit

= 25°C unless otherwise noted)

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

(BR)DSS/TJ

DSS

GSS

= −250 mA, Ref to 25°C

= −12 V, V

= 0 V, V

= 0 V, I

= −250 mA

= 0 V

= ±8.0 V ±0.1

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage

Negative Gate Threshold Temperature Coefficient

Drain−to−Source On−Resistance R

Forward Transconductance g

GS(TH)

GS(TH)/TJ

DS(on)

= VDS, I

= −4.5, I

= −2.5, I

= −1.8, I

= −1.5, I

= −1.2, I

= −6.0 V, I

= −250 mA

= −5.9 A 25 40

= −3.0 A 25 40

= −5.3 A 35 50

= −3.0 A 35 50

= −2.0 A 45 75

= −1.0 A 60 100

= −200 mA 95 400

= −2.0 A 8.8 S

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Gate Resistance R

ISS

OSS

RSS

G(TOT)

G(TH)

= 0 V, f = 1.0 MHz,

= −4.5 V, V

= −6.0 V

= −5.9 A

= −9.6 V,

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

d(ON)

d(OFF)

= −4.5 V, V

= −5.9 A, R

= −8.0 V,

= 2.0 W

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Recovery Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Time Q

VGS = 0 V, IS = −1.0 A

= 0 V, d

ISD/dt

= −1.0 A

= 100 A/ms,

5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

, 2 oz Cu).

−12 V

TJ = 25°C −1.0

TJ = 85°C −5.0

−0.3 −0.8 V

TJ = 25°C 0.62 1.0

TJ = 85°C 0.56

°C/W

180

−8.0 mV/°C

2.6 mV/°C

1157

300

200

12.8 15

0.4

1.6

3.6

15.7

8.0

27 50

14 nC

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NTLJS2103P

TYPICAL PERFORMANCE CURVES (T

DRAIN CURRENT (AMPS)

−I

0 0.5 1.0 1.5 2.0 2.5 3.0

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.20

0.18

0.16

0.14

0.12

0.10

0.08

0.06

ID = −0.2 A

0.04

0.02

DRAIN−TO−SOURCE RESISTANCE (W)

0.00

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0

DS(on),

−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 3. On−Resistance vs. Gate−to−Source

VGS = −4.5 V

−2.5 V

−1.1 V−1.0 V

3.5 4.0 4.5 5.0

TJ = 25°C

ID = −5.9 A

Voltage

TJ = 25°C

−2 V

−1.8 V

−1.5 V

−1.2 V

= 25°C unless otherwise noted)

VDS = −5 V

DRAIN CURRENT (AMPS)

−I 2

TJ = 25°C

TJ = 125°C

TJ = −55°C

0.5 0.75 1.0 1.25 1.5 1.75 2.0

−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

0.20

0.18

0.16

0.14

0.12

−1.2 V

VGS = −1.5 V

0.10

0.08

0.06

0.04

0.02

DRAIN−TO−SOURCE RESISTANCE (W)

0.00 024681012

DS(on),

−ID, DRAIN CURRENT (AMPS)

Figure 4. On−Resistance vs. Drain Current and

Gate Voltage

2.25 2.5

TJ = 25°C

VGS = −1.8 V

VGS = −2.5 V

VGS = −4.5 V

14 16 18 20

1.5

VGS = −4.5 V

1.4 I

= −5.9 A

1.3

1.2

1.1

1.0

DRAIN−TO−SOURCE

0.9

DS(on),

0.8

RESISTANCE (NORMALIZED)

0.7

−50 −25 0 25 50 75 100

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

100000

10000

, LEAKAGE (nA)

DSS

−I

125 150

1000

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VGS = 0 V

TJ = 150°C

TJ = 125°C

2 4 6 8 10 12

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

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NTLJS2103P

TYPICAL PERFORMANCE CURVES (T

1800

1600

1400

iss

1200

1000

800

600

C, CAPACITANCE (pF)

400

200

oss

rss

02 4 6 81012

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

10000

VGS = −4.5 V V

= −8.0 V

= −5.9 A

100

VGS = 0 V T

= 25°C

f = 1 MHz

d(off)

= 25°C unless otherwise noted)

-V

, GATE-TO-SOURCE VOLTAGE (VOLTS)

-V

02 4 6 8 1012

VDS = −9.6 V I

= −5.9 A

= 25°C

QG, TOTAL GATE CHARGE (nC)

Drain−to−Source Voltage vs. Total Charge

100

VGS = 0 V

-V

, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

t, TIME (ns)

1 10 100

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

0.8

0.7

ID = −250 mA

0.6

0.5

(V)

0.4

GS(th)

0.3

−V

0.2

0.1

−50 50 150

−25 750 10025 125

TJ, JUNCTION TEMPERATURE (°C)

Figure 11. Threshold Voltage

d(on)

, SOURCE CURRENT (AMPS)

−I

TJ = 150°C

TJ = 25°C

0 0.2 0.4 0.6 0.8 1.0 1.2 1.4

−VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage vs. Current

POWER (WATTS)

0.001 10

0.01 1000.1 10001

SINGLE PULSE TIME (s)

Figure 12. Single Pulse Maximum Power

Dissipation

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Page 5

NTLJS2103P

TYPICAL PERFORMANCE CURVES (T

= 25°C unless otherwise noted)

100

1 ms

10 ms

VGS = −8 V SINGLE PULSE T

= 25°C

0.1

0.01

DS(on)

Package Limit Thermal Limit

, DRAIN CURRENT (A)

−I

LIMIT

0.1 1 10 100

−VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 13. Maximum Rated Forward Biased

Safe Operating Area

Duty Cycle = 0.5

0.2

0.1

0.05

RESPONSE NORMALIZED (°C/W)

0.01

R(t), EFFECTIVE TRANSIENT THERMAL

0.0001 0.001 0.01 0.1 1 10 100 1000

Single Pulse

(pk)

DUTY CYCLE, D = t1/t

Test Type = 1 sq in 2 oz R

= 1 sq in 2 oz

PULSE TIME (s)

Figure 14. FET Thermal Response

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Page 6

PIN ONE

REFERENCE

0.10 C

0.08 C

BOTTOM VIEW

NTLJS2103P

PACKAGE DIMENSIONS

WDFN6 2x2

CASE 506AP−01

ISSUE B

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

SEATING

PLANE

A0.10 Cb1B

0.43

0.05 C

NOTE 5

A0.10 C

0.05 C

NOTE 3

1.25

0.34

Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.20mm FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.

5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL LEAD IS CONNECTED TO TERMINAL LEAD # 4.

6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.

MILLIMETERS

DIMAMIN MAX

0.70 0.80

A1 0.00 0.05 A3 0.20 REF

b 0.25 0.35

0.51 0.61

2.00 BSC

1.00 1.20

2.00 BSC

1.10 1.30

0.65 BSC

0.15 REF

0.20 0.30

0.27 REF

0.65 REF

SOLDERMASK DEFINED

MOUNTING FOOTPRINT

2.30

1.10

STYLE 1:

PIN 1. DRAIN

2. DRAIN

3. GATE

4. SOURCE

5. DRAIN

6. DRAIN

0.35

0.60

0.35

0.65

PITCH

0.66

DIMENSIONS: MILLIMETERS

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ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTLJS2103P/D