See detailed ordering and shipping information in the package
ORDERING INFORMATION
dimensions section on page 3 of this data sheet.
1Publication Order Number:
NTLJS1102P/D
Page 2
NTLJS1102P
THERMAL RESISTANCE RATINGS
ParameterSymbolMaxUnit
Junction−to−Ambient – Steady State (Note 3)
Junction−to−Ambient – t v 5 s (Note 3)
Junction−to−Ambient – Steady State min Pad (Note 4)
R
q
JA
R
q
JA
R
q
JA
3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = 30 mm2 [2 oz] including traces).
65
38
180
°C/W
MOSFET ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterSymbolTest ConditionMinTypMaxUnit
OFF CHARACTERISTICS
Drain−to−Source Breakdown VoltageV
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V
(BR)DSS/TJ
Zero Gate Voltage Drain CurrentI
Gate−to−Source Leakage CurrentI
(BR)DSS
DSS
GSS
VGS = 0 V, ID = −250 mA
ID = −250 mA, Ref to 25°C
VGS = 0 V,
VDS = −8V
VDS = 0 V, VGS = ±6V±0.1
ON CHARACTERISTICS (Note 5)
Gate Threshold VoltageV
Negative Threshold Temperature
V
Coefficient
Drain−to−Source On ResistanceR
GS(TH)
GS(TH)/TJ
DS(on)
VGS = VDS, ID = −250 mA
VGS = −4.5 V, ID = −6.2 A2536mW
VGS = −4.5 V, ID = −3.0 A2536
VGS = −2.5 V, ID = −5.5 A3445
VGS = −2.5 V, ID = −3.0 A3445
VGS = −1.8 V, ID = −3.0 A4568
VGS = −1.5 V, ID = −1.0 A5590
VGS = −1.2 V, ID = −0.2 A80300
Forward Transconductanceg
FS
VDS = −4 V, ID = −6.2 A14.3S
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input CapacitanceC
Output CapacitanceC
Reverse Transfer CapacitanceC
Total Gate ChargeQ
Threshold Gate ChargeQ
Gate−to−Source ChargeQ
Gate−to−Drain ChargeQ
ISS
OSS
RSS
G(TOT)
G(TH)
GS
GD
VGS = 0 V, f = 1 MHz, VDS = −4 V
VGS = −4.5 V, VDS = − 4 V;
ID = −6.2 A
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6)
Turn−On Delay Timet
Rise Timet
Turn−Off Delay Timet
Fall Timet
D(ON)
r
d(OFF)
f
VGS = −4.5 V, VDS = −4 V,
ID = −6.2 A, RG = 1 W
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%
6. Switching characteristics are independent of operating junction temperatures
−8.0V
−7.2mV/°C
TJ = 25°C−1.0mA
TJ = 85°C−10
mA
−0.29−0.72V
2.7mV/°C
1585
350
185
15.725
0.8
1.9
3.3
8.0
ns
41
80
70
pF
nC
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2
Page 3
NTLJS1102P
MOSFET ELECTRICAL CHARACTERISTICS (T
= 25°C unless otherwise specified)
J
ParameterUnitMaxTypMinTest ConditionSymbol
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6)
Turn−On Delay Timet
D(ON)
Rise Timet
Turn−Off Delay Timet
d(OFF)
Fall Timet
8.0
r
VGS = −4.5 V, VDS = −4 V,
ID = −8.1 A, RG = 1 W
f
19
78
50
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode VoltageV
Reverse Recovery Timet
Charge Timet
Discharge Timet
Reverse Recovery ChargeQ
RR
SD
a
b
RR
VGS = 0 V,
IS = −1.0 A
VGS = 0 V, d
IS = −1.0 A
ISD/dt
TJ = 25°C−0.6−1.0
TJ = 85°C−0.58
5585
= 100 A/ms,
18
37
39nC
V
ns
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%
6. Switching characteristics are independent of operating junction temperatures
ORDERING INFORMATION
DevicePackageShipping
NTLJS1102PTBGWDFN6
3000 / Tape & Reel
(Pb−Free)
NTLJS1102PTAGWDFN6
3000 / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
†
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3
Page 4
NTLJS1102P
TYPICAL CHARACTERISTICS
30
−4.5 V
25
20
15
10
, DRAIN CURRENT (A)
D
−I
5
0
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)−VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
, DRAIN−TO−SOURCE RESISTANCE (W)
DS(on)
R
ID = −0.2 A
0
Figure 3. On−Resistance vs. Gate−to−Source
−2.5 V
−2.0 V
−1.8 V
−1.5 V
VGS = −1.2 V
1.54.05.0
ID = −6.2 A
−VGS, GATE VOLTAGE (V)ID, DRAIN CURRENT (A)
4.53.53.02.52.01.00.50
TJ = 25°C
4.03.02.52.01.51.00.50
3.54.5
30
VDS = −5 V
25
20
15
10
, DRAIN CURRENT (A)
D
−I
5
TJ = 125°C
0
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
, DRAIN−TO−SOURCE RESISTANCE (W)
DS(on)
R
0
−1.2 V−1.5 V
TJ = 25°C
TJ = −55°C
1.252.02.5
−1.8 V
Figure 4. On−Resistance vs. Drain Current and
Voltage
Gate Voltage
2.251.751.51.00.750.50.250
TJ = 25°C
−2.5 V
VGS = −4.5 V
18141062
201612840
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
DS(on)
R
1.5
VGS = −4.5 V
1.4
ID = −6.2 A
1.3
1.2
1.1
1.0
0.9
0.8
0.7
TJ, JUNCTION TEMPERATURE (°C)VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
100,000
10,000
, LEAKAGE (nA)
1,000
DSS
I
1251007550250−25−50
150
100
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4
TJ = 150°C
TJ = 125°C
TJ = 85°C
87654321
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
Page 5
NTLJS1102P
TYPICAL CHARACTERISTICS
2400
2200
C
2000
1800
1600
1400
1200
C
oss
1000
800
600
C, CAPACITANCE (pF)
400
C
200
0
1000
VGS = −4.5 V
VDD = −4 V
ID = −6.2 A
100
t, TIME (ns)
10
1
Figure 9. Resistive Switching Time Variation
iss
VGS = 0 V
T
= 25°C
J
f = 1 MHz
5
4
Q
T
−V
−V
DS
3
2
rss
Q
1
, GATE−TO−SOURCE VOLTAGE (V)
GS
0
76543210
−V
8
GS
Q
GD
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)QG, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10
t
d(off)
t
f
t
r
1
TJ = 125°C
t
d(on)
, SOURCE CURRENT (A)
S
−I
TJ = 150°C
0.1
TJ = 25°C
TJ = −55°C
100101
RG, GATE RESISTANCE (W)
−VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 10. Diode Forward Voltage vs. Current
vs. Gate Resistance
GS
VDS = −4 V
ID = −6.2 A
TJ = 25°C
5
4
3
2
1
, DRAIN−TO−SOURCE VOLTAGE (V)
DS
0
16
−V
1.0
14121086420
0.90.80.70.60.50.40.30.2
(V)
GS(th)
−V
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
50
ID = −250 mA
40
30
20
POWER (W)
10
0
1251007550250−25−50
150
0
1E+001E−011E−021E−03
1E+01 1E+02 1E+03
TJ, TEMPERATURE (°C)SINGLE PULSE TIME (s)
Figure 11. Threshold VoltageFigure 12. Single Pulse Maximum Power
Dissipation
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5
Page 6
1
Duty Cycle = 0.5
TYPICAL CHARACTERISTICS
100
VGS = −6 V
Single Pulse
TC = 25°C
10
1
, DRAIN CURRENT (A)
D
−I
0.1
−VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 13. Maximum Rated Forward Biased
NTLJS1102P
100 ms
1 ms
10 ms
R
Limit
DS(on)
Thermal Limit
Package Limit
Safe Operating Area
dc
1001010.1
0.2
0.1
0.1
0.05
R(t), EFFECTIVE TRANSIENT
THERMAL RESPONSE (NORMALIZED)
0.01
Single Pulse
1E−011E−021E−031E−04
t, TIME (s)
1E+001E+011E+021E+03
Figure 14. FET Thermal Response
R
q
JA
= 65°C/W
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6
Page 7
2X
l
2X
7X
PIN ONE
REFERENCE
0.10 C
0.10 C
0.10 C
0.08 C
6X
L
E2
K
D
D2
1
6
J
J1
BOTTOM VIEW
NTLJS1102P
PACKAGE DIMENSIONS
WDFN6 2x2
CASE 506AP−01
ISSUE B
A
B
E
A3
A
A1
4X
e
L2
3
NOTE 5
4
b
6X
0.05 C
6X
0.05 C
C
A0.10 C
NOTE 3
SEATING
PLANE
A0.10 Cb1B
B
6X
0.43
1.25
0.34
0.65
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL AND
IS MEASURED BETWEEN 0.15 AND 0.20mm FROM
TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED PAD AS
WELL AS THE TERMINALS.
5. CENTER TERMINAL LEAD IS OPTIONAL. TERMINAL
LEAD IS CONNECTED TO TERMINAL LEAD # 4.
6. PINS 1, 2, 5 AND 6 ARE TIED TO THE FLAG.
MILLIMETERS
DIMAMINMAX
0.700.80
A10.000.05
A30.20 REF
b0.250.35
0.510.61
b1
2.00 BSC
D
1.001.20
D2
E
2.00 BSC
1.101.30
E2
e
0.65 BSC
K
0.15 REF
L
0.200.30
0.200.30
L2
J
0.27 REF
J1
0.65 REF
SOLDERING FOOTPRINT*
2.30
1.10
1
0.66
DIMENSIONS: MILLIMETERS
6X
0.35
0.60
0.35
mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
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Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
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Phone: 81−3−5773−3850
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Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loca
Sales Representative
NTLJS1102P/D
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