Datasheet ntljd4116n-d Datasheet

NTLJD4116N

)

l

Power MOSFET

30 V, 4.6 A, mCoolt Dual N−Channel, 2x2 mm WDFN Package

Features

• WDFN Package Provides Exposed Drain Pad for Excellent Thermal

Conduction

• 2x2 mm Footprint Same as SC−88

• Lowest R

• 1.5 V R

Level

DS(on)

• Low Profile (< 0.8 mm) for Easy Fit in Thin Environments

• This is a Pb−Free Device

Applications

• DC−DC Converters (Buck and Boost Circuits)

• Low Side Load Switch

• Optimized for Battery and Load Management Applications in

Portable Equipment such as, Cell Phones, PDA’s, Media Players, etc.

• Level Shift for High Side Load Switch

MAXIMUM RATINGS (T

Drain−to−Source Voltage V Gate−to−Source Voltage V Continuous Drain

Current (Note 1)

Power Dissipation (Note 1)

Continuous Drain Current (Note 2)

Power Dissipation (Note 2)

Pulsed Drain Current Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) (Note 2) I Lead Temperature for Soldering Purposes

(1/8″ from case for 10 s)

Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

2. Surface Mounted on FR4 Board using the minimum recommended pad size of 30 mm2, 2 oz Cu.

Solution in 2x2 mm Package

DS(on)

Rating for Operation at Low Voltage Gate Drive Logic

= 25°C unless otherwise noted)

J

Parameter Symbol Value Unit

DSS

GS

T

= 25°C

Steady

State

t ≤ 5 s T

Steady

State

t ≤ 5 s 2.3

Steady

State

A

T

= 85°C 2.7

A

= 25°C 4.6

A

T

= 25°C

A

T

= 25°C

A

T

= 85°C 1.8

A

T

= 25°C

A

t

= 10 ms

p

I

D

P

D

I

D

P

D

I

DM

STG

S

T

L

30 V

±8.0 V

3.7

1.5

2.5

0.71 W

20 A

−55 to 150

2.0 A

260 °C

A

W

A

°C

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(BR)DSS

30 V

MAX

DS(on)

70 mW @ 4.5 V

90 mW @ 2.5 V 125 mW @ 1.8 V 250 mW @ 1.5 V

D

G

N−CHANNEL MOSFET

ID MAX (Note 1)V

4.6 A

S

R

MARKING DIAGRAM

WDFN6

CASE 506AN

1

JF = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location

1 2 3

JFMG

G

PIN CONNECTIONS

S1

G1

D2

1

2

D2

3

(Top View)

D1

6

G2

5

4

S2

ORDERING INFORMATION

Device Package Shipping

NTLJD4116NT1G WDFN6

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

3000/Tape & Ree

†

6 5 4

May, 2006 − Rev. 4

1 Publication Order Number:

NTLJD4116N/D

NTLJD4116N

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Unit

SINGLE OPERATION (SELF−HEATED)

Junction−to−Ambient – Steady State (Note 3) Junction−to−Ambient – Steady State Min Pad (Note 4) Junction−to−Ambient – t ≤ 5 s (Note 3)

DUAL OPERATION (EQUALLY HEATED)

Junction−to−Ambient – Steady State (Note 3) Junction−to−Ambient – Steady State Min Pad (Note 4) Junction−to−Ambient – t ≤ 5 s (Note 3)

3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm2, 2 oz Cu).

R

q

JA

R

q

JA

R

q

JA

R

q

JA

R

q

JA

R

q

JA

83

177

54

58

133

40

°C/W

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2

NTLJD4116N

MOSFET ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

J

Parameter Symbol Test Conditions Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V Drain−to−Source Breakdown Voltage

Temperature Coefficient

V

(BR)DSS/TJ

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

DSS

GSS

V

DS

V

= 0 V, I

GS

I

= 250 mA, Ref to 25°C

D

= 24 V, V

V

DS

GS

= 0 V, V

D

= 0 V

GS

= 250 mA

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage V Negative Gate Threshold

Temperature Coefficient

V

GS(TH)/TJ

Drain−to−Source On−Resistance R

Forward Transconductance g

GS(TH)

DS(on)

FS

V

GS

V V V V

V

= VDS, I

GS GS GS GS

= 5.0 V, I

DS

= 4.5, I = 2.5, I = 1.8, I = 1.5, I

= 250 mA

D

D D D D

D

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Total Gate Charge Q Threshold Gate Charge Q Gate−to−Source Charge Q Gate−to−Drain Charge Q Gate Resistance R

ISS OSS RSS

G(TOT)

G(TH)

GS

GD

G

V

= 0 V, f = 1.0 MHz,

GS

V

GS

V

DS

= 4.5 V, V

I

= 2.0 A

D

= 15 V

DS

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time t Rise Time t Turn−Off Delay Time t Fall Time t

d(ON)

r

d(OFF)

f

V

GS

I

D

= 4.5 V, V

= 2.0 A, R

DD G

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Recovery Voltage V

Reverse Recovery Time t Charge Time t Discharge Time t Reverse Recovery Time Q

RR

SD

a b

RR

VGS = 0 V, IS = 2.0 A

V

= 0 V, d

GS

I

S

ISD/dt

= 2.0 A

5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

30 V

18.1 mV/°C

TJ = 25°C 1.0 TJ = 85°C 10

= ±8.0 V 100 nA

0.4 0.7 1.0 V

2.8 mV/°C

= 2.0 A 47 70 = 2.0 A 56 90 = 1.8 A 88 125 = 1.5 A 133 250

= 2.0 A 4.5 S

427

51 32

5.4 6.5

= 15 V,

0.5

0.8

1.24

0.37

4.8

= 15 V,

= 2.0 W

11.8

14.2

1.7

TJ = 25°C 0.78 1.2

TJ = 125°C 0.62

10.5

= 100 A/ms,

7.6

2.9

5.0 nC

mA

mW

pF

nC

W

ns

V

ns

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3

NTLJD4116N

TYPICAL PERFORMANCE CURVES (T

5

4

3

2

1

, DRAIN CURRENT (AMPS)

D

I

0

0521

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

0.07 VGS = 4.5 V

0.06

0.05

0.04

0.03

, DRAIN−TO−SOURCE RESISTANCE (W)

0.02

DS(on)

1.0

R

Figure 3. On−Resistance versus Drain Current

VGS = 1.7 V to 8 V

3

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

TJ = 100°C

TJ = 25°C

TJ = −55°C

2.01.5

ID, DRAIN CURRENT (AMPS)

TJ = 25°C

1.6 V

1.5 V

1.4 V

1.3 V

1.2 V

4

2.5

= 25°C unless otherwise noted)

J

6

VDS ≥ 10 V

4

2

, DRAIN CURRENT (AMPS)

D

I

0

0.14 TJ = 25°C

0.13

0.12

0.11

0.1

0.09

0.08

0.07

0.06

, DRAIN−TO−SOURCE RESISTANCE (W)

0.05

0.04

1

DS(on)

R

TJ = 25°C

TJ = 100°C

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

ID, DRAIN CURRENT (AMPS)

Figure 4. On−Resistance versus Drain Current

TJ = −55°C

1

1.5

VGS = 1.8 V

VGS = 2.5 V

VGS = 4.5 V

32

and Gate Voltage

20.5

2.5

45

3

1.6 ID = 2 A

V

= 4.5 V

GS

1.4

1.2

1.0

(NORMALIZED)

0.8

, DRAIN−TO−SOURCE RESISTANCE

0.6

DS(on)

−50 50250−25 75 125100

R

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

100,000

10,000

1000

, LEAKAGE (nA)

DSS

I

100

150

10

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4

VGS = 0 V

TJ = 150°C

TJ = 100°C

21210 304

6 8 14 16 18 22 24 26 28

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

20

Figure 6. Drain−to−Source Leakage Current

versus Voltage

NTLJD4116N

TYPICAL PERFORMANCE CURVES (T

VDS = 0 V

1000

VGS = 0 V

800

600

C

iss

400

C

rss

C, CAPACITANCE (pF)

200

C

oss

0

5 5 15 20 25

010

V

GS

V

DS

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation

1000

VDD = 15 V ID = 2.0 A VGS = 4.5 V

100

t, TIME (ns)

10

TJ = 25°C

t

d(off)

t

f

t

r

t

d(on)

30

= 25°C unless otherwise noted)

J

5

QT

4

V

DS

3

Q

GS

2

Q

GD

1

, GATE−TO−SOURCE VOLTAGE (VOLTS)

V

GS

0

123

ID = 2.0 A TJ = 25°C

QG, TOTAL GATE CHARGE (nC)

Figure 8. Gate−To−Source and Drain−To−Source

Voltage versus Total Charge

3

VGS = 0 V

TJ = 150°C

2

1

TJ = 125°C

V

GS

54

TJ = 25°C

V

18

DS

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

15

12

9

6

3

0

6

1

1 10 100

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

100

TC = 25°C TJ = 150°C SINGLE PULSE

10

1

*See Note 2 on Page 1

0.1

, DRAIN CURRENT (AMPS)

D

−I

0.01

0.1 1 100

R

DS(on)

THERMAL LIMIT PACKAGE LIMIT

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

LIMIT

, SOURCE CURRENT (AMPS)

S

I

0

0.3

0.6

VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage versus Current

10 ms

100 ms

1 ms 10 ms

dc

10

0.9

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5

NTLJD4116N

1000

100

0.1

EFFECTIVE TRANSIENT THERMAL RESISTANCE

10

1

D = 0.5

0.2

0.1

0.05

0.02

0.01

TYPICAL PERFORMANCE CURVES (T

SINGLE PULSE

t, TIME (s)

Figure 12. Thermal Response

= 25°C unless otherwise noted)

J

P

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

*See Note 2 on Page 1

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

J(pk)

2

10.010.00001

− TA = P

(pk)

1

R

q

JA

100 1000100.10.0010.00010.000001

(t)

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6

NTLJD4116N

PACKAGE DIMENSIONS

WDFN6, 2x2

CASE 506AN−01

ISSUE B

6X

2X

PIN ONE

REFERENCE

0.10 C

0.08 C

6X

L

D2

D

A

B

E

A3

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN

0.15 AND 0.20mm FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.

MILLIMETERS

DIMAMIN MAX

0.70 0.80

A1 0.00 0.05 A3 0.20 REF

b 0.25 0.35

D 2.00 BSC

D2 0.57 0.77

2.00 BSC

E

E2

0.90 1.10

e

0.65 BSC

0.25 REF

K

L

0.20 0.30

J

0.15 REF

A

A1

SEATING

C

D2

4X

1

3

e

PLANE

6X

0.43

SOLDERMASK DEFINED MOUNTING FOOTPRINT*

2.30

6X

0.35

1

E2

2X

0.65

PITCH

6X

K

6

J6X

BOTTOM VIEW

4

b

6X

0.05 C

A0.10 C

NOTE 3

B

0.250.25

2X

0.72

1.05

DIMENSIONS: MILLIMETERS

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTLJD4116N/D

7