Datasheet ntljd3115p Datasheet

NTLJD3115P

Power MOSFET

−20 V, −4.1 A, mCoolt Dual P−Channel, 2x2 mm WDFN Package

Features

• WDFN Package Provides Exposed Drain Pad for Excellent Thermal

Conduction

• 2x2 mm Footprint Same as SC−88

• Lowest R

• 1.8 V R

Level

DS(on)

• Low Profile (< 0.8 mm) for Easy Fit in Thin Environments

• Bidirectional Current Flow with Common Source Configuration

• This is a Pb−Free Device

Solution in 2x2 mm Package

DS(on)

Rating for Operation at Low Voltage Gate Drive Logic

(BR)DSS

−20 V

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R

MAX

DS(on)

100 mW @ −4.5 V

135 mW @ −2.5 V

200 mW @ −1.8 V

S1

ID MAX (Note 1)V

−4.1 A

S2

Applications

• Optimized for Battery and Load Management Applications in

Portable Equipment

• Li−Ion Battery Charging and Protection Circuits

• High Side Load Switch

MAXIMUM RATINGS (T

Parameter

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current (Note 1)

Power Dissipation (Note 1)

Continuous Drain Current (Note 2)

Power Dissipation (Note 2)

Pulsed Drain Current

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) (Note 2) I

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

2. Surface Mounted on FR4 Board using the minimum recommended pad size of 30 mm

2

, 2 oz Cu.

= 25°C unless otherwise noted)

J

Symbol Value Unit

DSS

GS

I

P

I

P

DM

T

D

STG

S

L

T

= 25°C

Steady

State

t ≤ 5 s T

Steady

State

t ≤ 5 s 2.3

Steady

State

A

T

= 85°C −2.4

A

= 25°C −4.1

A

T

= 25°C

A

T

= 25°C

A

T

= 85°C −1.6

A

T

= 25°C

A

t

= 10 ms

p

−20 V

±8.0 V

−3.3

−2.3

0.71 W

−20 A

−55 to

150

−1.9 A

260 °C

1.5

A

W

A

°C

G1

D1

P−CHANNEL MOSFET

D2

Pin 1

D1

CASE 506AN

JD = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location)

G2

P−CHANNEL MOSFET

MARKING DIAGRAM

WDFN6

1 2 3

D2

JDMG

G

PIN CONNECTIONS

S1

G1

D2

1

2

D2

3

(Top View)

D1

6

G2

5

4

S2

ORDERING INFORMATION

Device Package Shipping

NTLJD3115PT1G WDFN6

(Pb−Free)

NTLJD3115PTAG WDFN6

(Pb−Free)

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

3000/Tape & Reel

†

6 5 4

July, 2009 − Rev. 5

1 Publication Order Number:

NTLJD3115P/D

NTLJD3115P

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Unit

SINGLE OPERATION (SELF−HEATED)

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – Steady State Min Pad (Note 4)

Junction−to−Ambient – t ≤ 5 s (Note 3)

DUAL OPERATION (EQUALLY HEATED)

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – Steady State Min Pad (Note 4)

Junction−to−Ambient – t ≤ 5 s (Note 3)

3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm

R

2

, 2 oz Cu).

q

JA

q

JA

q

JA

q

JA

q

JA

q

JA

83

177

54

58

133

40

°C/W

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2

NTLJD3115P

MOSFET ELECTRICAL CHARACTERISTICS (T

Parameter

Symbol Test Conditions Min Typ Max Unit

= 25°C unless otherwise noted)

J

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

V

(BR)DSS

V

(BR)DSS/TJ

DSS

GSS

V

DS

V

GS

I

= −250 mA, Ref to 25°C

D

= −16 V, V

V

= 0 V, V

DS

= 0 V, I

GS

= −250 mA

D

= 0 V

GS

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage

Negative Gate Threshold Temperature Coefficient

Drain−to−Source On−Resistance R

Forward Transconductance g

V

GS(TH)

V

GS(TH)/TJ

DS(on)

FS

V

GS

V

GS

V

GS

V

GS

V

DS

= VDS, I

= −4.5, I

= −2.5, I

= −1.8, I

= −5.0 V, I

= −250 mA

D

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Gate Resistance R

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

G

V

= 0 V, f = 1.0 MHz,

GS

V

DS

V

= −4.5 V, V

GS

I

D

= −10 V

DS

= −2.0 A

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

Turn−On Delay Time t

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

d(ON)

r

d(OFF)

f

V

GS

I

D

V

GS

I

D

= −4.5 V, V

= −1.0 A, R

= −4.5 V, V = −2.0 A, R

DD

G

DD

G

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Recovery Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Time Q

V

SD

RR

a

b

RR

VGS = 0 V, IS = −1.0 A

V

= 0 V, d

GS

ISD/dt

I

= −1.0 A

S

5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

−20 V

9.95 mV/°C

TJ = 25°C −1.0 mA

TJ = 85°C −10

= ±8.0 V ±100 nA

−0.4 −0.7 −1.0 V

2.44 mV/°C

= −2.0 A 75 100 mW

= −2.0 A 101 135

= −1.6 A 150 200

= −2.0 A 6.0 S

531

91

56

nC

= −10 V,

5.5 6.2

0.7

1.0

1.4

8.8

6.0

= −5.0 V,

= 6.0 W

11

21

8.0

6.0

= −10 V,

= 2.0 W

12

19

6.0

TJ = 25°C −0.75 −1.0

TJ = 125°C −0.64

12.6

= 100 A/ms,

7.0

5.6

5.0 nC

pF

W

ns

V

ns

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NTLJD3115P

TYPICAL PERFORMANCE CURVES (T

5

4.5

4

3.5

3

2.5

2

1.5

, DRAIN CURRENT (AMPS)

1

D

−I

0.5

0

0 4.521

−V

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

DS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.1

VGS = −4.5 V

0.09

0.08

0.07

VGS = −1.9 V to −6 V

3

2.51.50.5

TJ = 100°C

TJ = 25°C

3.5

−1.8 V

−1.7 V

−1.6 V

−1.5 V

−1.4 V

−1.3 V

−1.2 V

4

= 25°C unless otherwise noted)

J

5

VDS ≥ 10 V

4

3

2

TJ = 25°C

, DRAIN CURRENT (AMPS)

1

D

−I TJ = 125°C

0

−V

GS

1

, GATE−TO−SOURCE VOLTAGE (VOLTS)

0.15 TJ = 25°C

0.1

TJ = −55°C

1.5

VGS = −2.5 V

VGS = −4.5 V

20.5

2.5

3

0.06

0.05

, DRAIN−TO−SOURCE RESISTANCE (W)

0.04

DS(on)

1.0 2.01.5

R

TJ = −55°C

−ID, DRAIN CURRENT (AMPS)

Figure 3. On−Resistance versus Drain Current

1.6 ID = −2.2 A

V

= −4.5 V

GS

1.4

1.2

1.0

(NORMALIZED)

0.8

, DRAIN−TO−SOURCE RESISTANCE

0.6

DS(on)

−50 50250−25 75 125100

R

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

0.05

, DRAIN−TO−SOURCE RESISTANCE (W)

2.5 3

12

R

0

DS(on)

−ID, DRAIN CURRENT (AMPS)

Figure 4. On−Resistance versus Drain Current

and Gate Voltage

10000

1000

, LEAKAGE (nA)

DSS

−I

150

100

10

VGS = 0 V

TJ = 150°C

TJ = 100°C

212104

6 8 14 16 18

−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 6. Drain−to−Source Leakage Current

versus Voltage

4

5

20

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NTLJD3115P

TYPICAL PERFORMANCE CURVES (T

1200

VDS = 0 V

1000

C

iss

800

600

400

C

rss

C, CAPACITANCE (pF)

200

0

5 5 15 20

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

1000

VDD = −15 V I

= −2.2 A

D

V

GS

100

VGS = 0 V

C

oss

010

V

GS

V

DS

Figure 7. Capacitance Variation

= −4.5 V

TJ = 25°C

= 25°C unless otherwise noted)

J

5

QT

4

, GATE-TO-SOURCE VOLTAGE (VOLTS)

-V

GS

3

V

DS

Q

GS

2

Q

GD

1

0

V

GS

43

ID = −2.2 A T

J

QG, TOTAL GATE CHARGE (nC)

Figure 8. Gate−To−Source and Drain−To−Source

Voltage versus Total Charge

3

VGS = 0 V

2.5

2

= 25°C

5

-V

20

DS

, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

16

12

8

4

0

621

t

f

t

t, TIME (ns)

10

t

d(off)

t

d(on)

r

1

1 10 100

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

100

TC = 25°C T

= 150°C

J

SINGLE PULSE

10

1

*See Note 2 on Page 1

0.1

, DRAIN CURRENT (AMPS)

D

−I

0.01

0.1 1 100

−V

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

DS

Figure 11. Maximum Rated Forward Biased

1.5

0.5

, SOURCE CURRENT (AMPS)

s

−I

R

LIMIT

DS(on)

THERMAL LIMIT PACKAGE LIMIT

Safe Operating Area

1

TJ = 150°C

TJ = 25°C

0

0.1 0.7 0.90.50.3

0

−V

, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

SD

0.6

0.80.40.2

Figure 10. Diode Forward Voltage versus Current

10 ms

100 ms

1 ms

10 ms

dc

10

1.0

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NTLJD3115P

1000

100

0.1

EFFECTIVE TRANSIENT THERMAL RESISTANCE

10

1

D = 0.5

0.2

0.1

0.05

0.02

0.01

TYPICAL PERFORMANCE CURVES (T

P

SINGLE PULSE

t, TIME (s)

Figure 12. Thermal Response

= 25°C unless otherwise noted)

J

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

10.010.00001

*See Note 2 on Page 1

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

− TA = P

J(pk)

2

(pk)

1

R

(t)

q

JA

100 1000100.10.0010.00010.000001

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6

PIN ONE

REFERENCE

0.10 C

0.08 C

NOTE 4

L

DETAIL A

D2

1

D

TOP VIEW

DETAIL B

SIDE VIEW

NTLJD3115P

PACKAGE DIMENSIONS

WDFN6, 2x2

CASE 506AN−01

ISSUE D

NOTES:

A

MOLD CMPDEXPOSED Cu

B

PLATING

E

DETAIL B

OPTIONAL

CONSTRUCTIONS

L

L1

A3

DETAIL A

OPTIONAL

CONSTRUCTIONS

A

A1

C

SEATING PLANE

A0.10 CB

D2

F

3

6X

0.47

E2

A0.10 CB

PACKAGE

OUTLINE

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN

0.15 AND 0.30 mm FROM THE TERMINAL TIP.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.

MILLIMETERS

DIMAMIN MAX

0.70 0.80

A1 0.00 0.05 A3 0.20 REF

L

b 0.25 0.35 D 2.00 BSC

D2 0.57 0.67

2.00 BSC

E

E2

0.90 1.10

e

0.65 BSC

0.15 BSCF

0.25 REF

K L

0.20

L1

--- 0.10

SOLDERMASK DEFINED

MOUNTING FOOTPRINT

1.74

0.30

2X

0.77

1.10

2.30

K

e

6

BOTTOM VIEW

4

6X

b

0.05 C

A0.10 C

B

NOTE 3

1

6X

0.35

0.65 PITCH

DIMENSIONS: MILLIMETERS

mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTLJD3115P/D