Datasheet ntljd2104p Datasheet

NTLJD2104P

Power MOSFET

−12 V, −4.3 A, mCOOLE Dual P−Channel, 2x2 mm, WDFN package

Features

• WDFN 2x2 mm Package with Exposed Drain Pads for Excellent

Thermal Conduction

• Lowest RDS(on) in 2x2 mm Package

• Footprint Same as SC−88 Package

• Low Profile (<0.8 mm) for Easy Fit in Thin Environments

• Bidirectional Current Flow with Common Source Configuration

• These are Pb−Free Devices

Applications

• Optimized for Battery and Load Management Applications in

Portable Equipment

• Li Ion Battery Charging and Protection Circuits

• Dual High Side Load Switch

MAXIMUM RATINGS (T

Parameter

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current (Note 1)

Power Dissipation (Note 1)

Continuous Drain Current (Note 2)

Power Dissipation (Note 2)

Pulsed Drain Current

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) (Note 2) I

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

2. Surface Mounted on FR4 Board using the minimum recommended pad size of 30 mm

2

, 2 oz. Cu.

= 25°C unless otherwise noted)

J

Symbol Value Unit

DSS

GS

I

P

I

P

DM

T

D

STG

S

L

T

= 25°C

Steady

State

t ≤ 5 s T

Steady

State

t ≤ 5 s 2.3

Steady

State

J

T

= 85°C −2.5

J

= 25°C −4.3

J

T

= 25°C

J

T

= 25°C

J

T

= 85°C −1.7

J

T

= 25°C

J

t

= 10 ms

p

−12 V

±8.0 V

−3.5

−2.4

−20 A

−55 to

150

−1.5 A

260 °C

1.5

0.7 W

°C

A

W

A

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R

TYP

(BR)DSS

−12 V

G1

P−CHANNEL MOSFET

D2

Pin 1

JC = Specific Device Code M = Date Code G = Pb−Free Package (Note: Microdot may be in either location)

DS(on)

60 mW @ −4.5 V

85 mW @ −2.5 V

110 mW @ −1.8 V

140 mW @ −1.5 V

190 mW @ −1.3 V

230 mW @ −1.2 V −0.2 A

S1

G2

D1

P−CHANNEL MOSFET

D1

WDFN6

CASE 506AN

PIN CONNECTIONS

S1

G1

D2

1

2

D2

3

D1

ID MAXV

−3.0 A

−0.7 A

−0.5 A

−0.2 A

S2

D2

MARKING DIAGRAM

1

JCMG

2

G

3

D1

6

G2

5

4

S2

6 5 4

October, 2008 − Rev. 2

(Top View)

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet.

1 Publication Order Number:

NTLJD2104P/D

NTLJD2104P

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Unit

SINGLE OPERATION (SELF−HEATED)

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – Steady State Min Pad (Note 4)

Junction−to−Ambient – t ≤ 5 s (Note 3)

DUAL OPERATION (EQUALLY HEATED)

Junction−to−Ambient – Steady State (Note 3)

Junction−to−Ambient – Steady State Min Pad (Note 4)

Junction−to−Ambient – t ≤ 5 s (Note 3)

3. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).

4. Surface Mounted on FR4 Board using the minimum recommended pad size (30 mm

R

2

, 2 oz Cu).

q

JA

q

JA

q

JA

q

JA

q

JA

q

JA

83

177

54

58

133

40

°C/W

MOSFET ELECTRICAL CHARACTERISTICS (T

Parameter

Symbol Test Conditions Min Typ Max Unit

= 25°C unless otherwise noted)

J

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

V

(BR)DSS

V

(BR)DSS/TJ

DSS

GSS

V

DS

V

GS

I

= −250 mA, Ref to 25°C

D

= −12 V, V

V

= 0 V, V

DS

= 0 V, I

GS

= −250 mA

D

= 0 V

GS

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage

Gate Threshold Temperature Coefficient

Drain−to−Source On−Resistance R

Forward Transconductance g

V

GS(TH)

V

GS(TH)/TJ

DS(on)

FS

V

GS

V

GS

V

GS

V

GS

V

GS

V

GS

V

GS

V

DS

= VDS, I

= −4.5, I

= −2.5, I

= −1.8, I

= −1.5, I

= −1.3, I

= −1.2, I

= −10 V, I

= −250 mA

D

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Gate Resistance R

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

G

V

= 0 V, f = 1.0 MHz,

GS

V

DS

V

= −4.5 V, V

GS

I

D

= −6.0 V

DS

= −3.0 A

5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

−12 V

−7.0 mV/°C

TJ = 25°C −1.0 mA

TJ = 85°C −10

= ±8.0 V $100 nA

−0.35 −0.6 −0.8 V

2.4 mV/°C

= −3.0 A 60 90 mW

= −3.0 A 85 120

= −0.7 A 110 150

= −0.5 A 140 200

= −0.2 A 190

= −0.2 A 230

= −3.0 A 6.0 S

467

125

79

5.5 8.0

= −6.0 V,

0.3

0.8

1.5

12.2

pF

nC

W

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2

NTLJD2104P

MOSFET ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

J

Parameter UnitMaxTypMinTest ConditionsSymbol

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

t

Rise Time t

Turn−Off Delay Time t

d(OFF)

Fall Time t

d(ON)

r

f

V

GS

I

D

= −4.5 V, V

= −3.0 A, R

= −6.0 V,

DD

= 2.0 W

G

6.6

12.3

14

16.2

ns

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Recovery Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Time Q

V

SD

RR

a

b

RR

VGS = 0 V, IS = −1.0 A

V

= 0 V, d

GS

ISD/dt

I

= −1.0 A

S

TJ = 25°C −0.7 −1.0

TJ = 85°C −0.65

= 100 A/ms,

8.0

23 45

15

10 20 nC

V

ns

5. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

6. Switching characteristics are independent of operating junction temperatures.

ORDERING INFORMATION

Device Package Shipping

NTLJD2104PTBG WDFN6

3000 / Tape & Reel

(Pb−Free)

NTLJD2104PTAG WDFN6

3000 / Tape & Reel

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

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3

NTLJD2104P

TYPICAL CHARACTERISTICS

14

12

10

8.0

6.0

4.0

, DRAIN CURRENT (A)

D

−I

2.0

0

−VDS, DRAIN−TO−SOURCE VOLTAGE (V) −VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.20

0.18

0.16

0.14

0.12

0.10

0.08

0.06

0.04

, DRAIN−TO−SOURCE RESISTANCE (W)

0.02

DS(on)

R

Figure 3. On−Resistance vs. Gate−to−Source

VGS = −4.5 V to −3 V

1.5 4.0 5.0

−VGS, GATE VOLTAGE (V) −ID, DRAIN CURRENT (A)

−2.5 V

−2.0 V

−1.8 V

−1.5 V

−1.2 V

TJ = 25°C I

= −3 A

D

4.54.03.53.02.52.01.51.0

4.53.53.02.52.01.00.50

5.0

10

VDS = −5.0 V

8.0

6.0

4.0

, DRAIN CURRENT (A)

D

2.0

−I TJ = 125°C

0

0.50 VGS = −1.5 V

0.45

0.40

0.35

0.30

0.25

0.20

0.15

0.10

, DRAIN−TO−SOURCE RESISTANCE (W)

0.05

0

DS(on)

R

TJ = 25°C

−1.8 V

TJ = −55°C

−2.0 V

Figure 4. On−Resistance vs. Drain Current and

Voltage

Gate Voltage

2.01.751.51.251.00.750.5

TJ = 25°C

−2.5 V

−4.5 V

108.06.04.02.00

, NORMALIZED DRAIN−TO−

SOURCE RESISTANCE (W)

DS(on)

R

1.5

1.4

1.3

1.2

1.1

1.0

0.9

0.8

0.7

VGS = −4.5 V I

= −3 A

D

TJ, JUNCTION TEMPERATURE (°C) −VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 5. On−Resistance Variation with

Temperature

10,000

, LEAKAGE (nA)

DSS

I

1000

150

1251007550250−25−50

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4

TJ = 150°C

TJ = 125°C

579 12

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

1110864321

800

700

C

600

500

400

300

200

C, CAPACITANCE (pF)

C

100

0

NTLJD2104P

TYPICAL CHARACTERISTICS

5

VGS = 0 V

= 25°C

T

iss

C

oss

rss

J

f = 1 MHz

4

−V

DS

3

2

Q

GS

Q

1

, GATE−TO−SOURCE VOLTAGE (V)

GS

0

−V

121086420

−VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

Drain−to−Source Voltage vs. Total Charge

GD

Q

T

−V

GS

VDS = −6 V I

= −3 A

D

= 25°C

T

J

8

6

4

2

0

6543210

−V

DS

, DRAIN−TO−SOURCE VOLTAGE (V)

1000

VGS = −4.5 V V I

100

t, TIME (ns)

10

1

Figure 9. Resistive Switching Time Variation

0.8

0.7

0.6

(V)

0.5

GS(th)

−V

0.4

= −6 V

DD

= −3 A

D

RG, GATE RESISTANCE (W)

vs. Gate Resistance

ID = −250 mA

t

d(off)

t

f

t

r

t

d(on)

100

10

1

, SOURCE CURRENT (A)

S

−I

0.1

100101

30

25

20

15

POWER (W)

10

TJ = 150°C

TJ = 25°C

−V

, SOURCE−TO−DRAIN VOLTAGE (V)

SD

Figure 10. Diode Forward Voltage vs. Current

*See Note 2 on Page 1

1.41.21.00.80.60.40.2

0.3

0.2

5

0

150

1251007550250−25−50

TJ, TEMPERATURE (°C) SINGLE PULSE TIME (s)

Figure 11. Threshold Voltage Figure 12. Single Pulse Maximum Power

Dissipation

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5

10001001010.10.010.001

NTLJD2104P

TYPICAL CHARACTERISTICS

1000

Duty Cycle = 0.5

100

10

0.05

0.2

0.1

100

VGS = −8 V Single Pulse TC = 25°C

10

1

, DRAIN CURRENT (A)

D

−I

0.1

0.01

R Thermal Limit Package Limit

−VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 13. Maximum Rated Forward Biased

*See Note 2 on Page 1

Limit

DS(on)

Safe Operating Area

100 ms

1 ms

10 ms

dc

1001010.1

*See Note 2 on Page 1

1

THERMAL RESISTANCE

R(t), EFFECTIVE TRANSIENT

1E−06

Single Pulse

1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 1E+02 1E+03

0.1

t, TIME (s)

Figure 14. FET Thermal Response

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NTLJD2104P

PACKAGE DIMENSIONS

WDFN6 2x2

CASE 506AN−01

ISSUE C

A1

A3

D2

A

B

E

A

SEATING

C

PLANE

6X

0.43

4X

e

D

PIN ONE

REFERENCE

0.10 C

2X

0.10 C

6X

0.08 C

D2

6X

L

1

3

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN

0.15 AND 0.20mm FROM TERMINAL.

4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS.

MILLIMETERS

DIMAMIN MAX

0.70 0.80

A1 0.00 0.05 A3 0.20 REF

b 0.25 0.35 D 2.00 BSC

D2 0.57 0.77

2.00 BSC

E

E2

0.90 1.10

e

0.65 BSC

0.25 REF

K L J

0.20

0.15 REF

0.30

SOLDERING FOOTPRINT*

2.30

1

6X

0.35

E2

2X

6X

K

6

J6X

BOTTOM VIEW

4

b

6X

A0.10 C

B

0.05 C

NOTE 3

0.250.25

2X

0.72

DIMENSIONS: MILLIMETERS

PITCH

1.05

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

mCool is a trademark of Semiconductor Components Industries, LLC (SCILLC).

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

0.65

PUBLICATION ORDERING INFORMATION

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NTLJD2104P/D