−20 V, −280 mA, P−Channel with ESD
Protection, SOT−723
Features
• Enables High Density PCB Manufacturing
• 44% Smaller Footprint than SC−89 and 38% Thinner than SC−89
• Low Voltage Drive Makes this Device Ideal for Portable Equipment
• Low Threshold Levels, 1.8 V R
• Low Profile (< 0.5 mm) Allows It to Fit Easily into Extremely Thin
Environments such as Portable Electronics
• Operated at Standard Logic Level Gate Drive, Facilitating Future
Migration to Lower Levels Using the Same Basic Topology.
• This is a Pb−Free Device
DS(on)
Rating
V
(BR)DSS
−20 V
http://onsemi.com
R
TYPID Max
DS(on)
2.7 W @ −4.5 V
4.1 W @ −2.5 V
6.1 W @ −1.8 V
SOT−723 (3−LEAD)
−280 mA
Applications
• Interfacing, Switching
• High Speed Switching
• Cellular Phones, PDA’s
MAXIMUM RATINGS (T
Parameter
Drain−to−Source VoltageV
Gate−to−Source VoltageV
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Pulsed Drain Current
Operating Junction and Storage TemperatureTJ,
Source Current (Body Diode) (Note 2)I
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in
sq [1 oz] including traces)
2. Surface−mounted on FR4 board using the minimum recommended pad size.
= 25°C unless otherwise stated)
J
SymbolValueUnit
DSS
GS
Steady
State
t v 5 sTA = 25°C
Steady
State
t v 5 s
Steady
State
TA = 25°C
TA = 85°C
TA = 25°CP
TA = 25°CI
TA = 85°C
TA = 25°C
tp = 10 ms
T
I
P
I
DM
STG
T
D
D
D
D
S
L
−20V
±8.0V
−260
−185
−280
400
mW
500
−215
−155
280
mW
−310mA
−55 to
150
−240mA
260°C
mA
mA
°C
3
12
1 − Gate
2 − Source
3 − Drain
Top View
MARKING DIAGRAM
CASE 631AA
SOT−723
KB= Specific Device Code
M= Date Code
KB M
1
ORDERING INFORMATION
DevicePackageShipping
NTK3142PT1GSOT−723
(Pb−Free)
NTK3142PT5GSOT−723
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Junction−to−Ambient – Steady State Minimum Pad (Note 4)
3. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces)
4. Surface−mounted on FR4 board using the minimum recommended pad size.
R
q
JA
R
q
JA
R
q
JA
315
250
440
°C/W
MOSFET ELECTRICAL CHARACTERISTICS (T
Parameter
SymbolTest ConditionMinTy pMaxUnit
= 25°C unless otherwise specified)
J
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain CurrentI
Gate−to−Source Leakage CurrentI
V
(BR)DSS
V
(BR)DSS/TJ
DSS
GSS
VGS = 0 V, ID = −100 mA
ID = −100 mA, Reference to 25°C
VGS = 0 V,
VDS = −16 V
VDS = 0 V, VGS = ±5 V$1
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Gate Threshold Temperature
Coefficient
Drain−to−Source On ResistanceR
Drain−to−Source On ResistanceR
V
GS(TH)
V
GS(TH)/TJ
DS(ON)
DS(ON)
VGS = VDS, ID = −250 mA
VGS = −4.5V, ID = −260 mA2.94.0
VGS = −4.5V, ID = −10 mA2.73.4
VGS = −2.5 V, ID = −1 mA4.15.3
VGS = −1.8 V, ID = −1 mA6.110
Forward Transconductanceg
FS
VDS = −5 V, ID = −10 mA73mS
CAPACITANCES
Input Capacitance
Output CapacitanceC
Reverse Transfer CapacitanceC
C
ISS
OSS
RSS
VGS = 0 V, f = 1 MHz, VDS = −10 V
SWITCHING CHARACTERISTICS, VGS = 4.5 V (Note 6)
Turn−On Delay Time
Rise Timet
Turn−Off Delay Timet
Fall Timet
t
d(ON)
r
d(OFF)
f
VGS = −4.5 V, VDD = −5 V, ID = −100 mA,
= 6 W
R
G
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Timet
Charge Timet
Discharge Timet
Reverse Recovery ChargeQ
V
SD
RR
a
b
RR
VGS = 0 V, IS= −10 mA
VGS = 0 V, VDD = −20 V,
/dt = 100 A/ms, IS = −1.0 A
dI
SD
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
−20V
14
TJ = 25°C−1.0
TJ = 125°C−2.0
−0.4−1.3V
−2.0
15.3
4.3
2.3
8.416
15.328
37.580
22.743
TJ = 25°C0.69−1.2
TJ = 125°C0.56
3780
15.930
21.150
2070nC
mV/°C
mA
mA
mV/°C
W
W
pF
ns
V
ns
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2
Page 3
NTK3142P
TYPICAL PERFORMANCE CURVES
0.4
TJ = 25°C
VGS = −4 V to −10 V
0.4
VDS ≥−5 V
−3.0 V
0.3
0.2
−2.5 V
0.3
0.2
TJ = 25°C
−2.2 V
0.1
DRAIN CURRENT (AMPS)
D,
−I
0
0
, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
−V
DS
1
Figure 1. On−Region Characteristics
10
9
8
7
6
5
4
3
2
DRAIN−TO−SOURCE RESISTANCE (W)
1
1.5
2
−2.0 V
−1.8 V
−1.6 V
−1.4 V
2.5
ID = −0.26 A
T
= 25°C
J
0.1
DRAIN CURRENT (AMPS)
D,
TJ = 150°C
−I
30.5
12
0
TJ = −40°C
1.5
2.5
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
10
TJ = 25°C
9
8
7
6
5
4
3
2
DRAIN−TO−SOURCE RESISTANCE (W)
VGS = −2.5 V
VGS = −4.5 V
01
16
DS(on),
R
27593
−V
, GATE−TO−SOURCE VOLTAGE (VOLTS)
GS
4
80.2
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
10
00.30.1
DS(on),
R
−ID, DRAIN CURRENT (AMPS)
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
3
9.0
VGS = −0.01 V
8.0
7.0
6.0
5.0
4.0
DRAIN−TO−SOURCE
RESISTANCE
3.0
DS(on),
R
2.0
1.0
−500−2525
Figure 5. On−Resistance Variation with
VGS = −1.8 V
VGS = −2.5 V
VGS = −4.5 V
50150
75
TJ, JUNCTION TEMPERATURE (°C)
Temperature
1000
100
, LEAKAGE (nA)
10
DSS
−I
1
125100
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3
VGS = 0 V
TJ = 150°C
TJ = 125°C
5
10
15
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
20
Page 4
NTK3142P
TYPICAL PERFORMANCE CURVES
30
25
20
C
iss
15
10
C
C, CAPACITANCE (pF)
oss
5
C
rss
0
02.557.51012.515
−DRAIN−TO−SOURCE VOLTAGE (V)
Figure 7. Capacitance Variation
0.3
0.2
VGS = 0 V
TJ = 25°C
VGS = 0 V
17.520
1000
VDD = −5 V
I
= −10 mA
D
= −4.5 V
V
GS
100
t
d(off)
t
f
t, TIME (ns)
t
d(on)
10
1
t
r
110100
, GATE RESISTANCE (OHMS)
R
G
Figure 8. Resistive Switching Time
Variation vs. Gate Resistance
125°CTJ = 150°C25°C −40°C
0.1
, SOURCE CURRENT (AMPS)
S
−I
0
0.40.70.5
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
−V
SD
Figure 9. Diode Forward Voltage vs. Current
1.0
1.10.6
0.90.8
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4
Page 5
NTK3142P
PACKAGE DIMENSIONS
SOT−723
CASE 631AA−01
ISSUE D
b1
e
2X
3X
L2
BOTTOM VIEW
D
3
1
TOP VIEW
1
−X−
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
−Y−
A
E
b
2X
X0.08Y
3X
L
SIDE VIEW
H
E
C
2. CONTROLLING DIMENSION: MILLIMETERS.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MILLIMETERS
DIM MINNOMMAX
A0.450.500.55
b0.150.210.27
b10.250.310.37
C0.070.120.17
D1.151.201.25
E0.750.800.85
e
H1.151.201.25
L
L20.150.200.25
STYLE 3:
PIN 1. ANODE
E
2. ANODE
3. CATHODE
0.40 BSC
0.29 REF
RECOMMENDED
SOLDERING FOOTPRINT*
2X
0.40
2X
0.27
PACKAGE
OUTLINE
1.50
3X
0.52
0.36
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5773−3850
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ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTK3142P/D
5
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