Datasheet nths4501n-d Datasheet

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NTHS4501N

l l

Power MOSFET

30 V, 6.7 A, Single N−Channel, ChipFETt Package

Features

• Planar Technology Device Offers Low R

in a ChipFET Package

• Leadless ChipFET Package has 40% Smaller Footprint than TSOP−6.

Ideal Device for Applications Where Board Space is at a Premium.

• ChipFET Package Exhibits Excellent Thermal Capabilities Where

Heat Transfer is Required.

• Pb−Free Package is Available

and Fast Switching Speed

DS(on)

(BR)DSS

30 V

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Typ

DS(on)

30 mW @ 10 V

40 mW @ 4.5 V

ID MaxV

6.7 A

Applications

• Buck and Boost Converters

• Optimized for Battery and Load Management Applications in

Portable Equipment such as Notebook Computers, MP3 Players, Cell Phones, Digital Cameras, Personal Digital Assistants and Other Portable Applications

• Charge Control in Battery Chargers

MAXIMUM RATINGS (T

Parameter Symbol Value Unit

Drain−to−Source Voltage V Gate−to−Source Voltage V Continuous Drain

Current (Note 1)

Power Dissipation

(Note 1)

Pulsed Drain Current Operating Junction and Storage Temperature TJ,

Source Current (Body Diode) I Lead Temperature for Soldering Purposes

(1/8” from case for 10 s)

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Unit

Junction−to−Ambient – Steady State (Note 1) Junction−to−Foot (Drain) Steady State (Note 1) Junction−to−Ambient – t ≤ 5 s (Note 1)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface Mounted on FR4 Board using 1 in sq. pad size (Cu area = 1.127 in sq [1 oz] including traces).

= 25°C unless otherwise noted)

DSS

Steady State

t ≤ 5 s T Steady

State

t ≤ 5 s T t

= 10 ms

= 25°C

= 85°C 3.5

= 25°C 6.7

= 25°C

= 85°C 0.7

= 25°C 2.5

R R R

STG

30 V

±20 V

4.9

1.3

20 A

−55 to 150

1.1 A

260 °C

95 20 50

°C

°C/W

N−Channel MOSFET

MARKING DIAGRAM

AND PIN ASSIGNMENT

ChipFET

CASE 1206A

STYLE 1

D2 = Specific Device Code M = Month Code G = Pb−Free Package

DDD

D2 M

ORDERING INFORMATION

Device Package Shipping

NTHS4501NT1 ChipFET 3000/Tape & Ree NTHS4501NT1G

†For information on tape and reel specifications,

including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specification Brochure, BRD8011/D.

ChipFET

(Pb−Free)

3000/Tape & Ree

†

February, 2007 − Rev. 4

1 Publication Order Number:

NTHS4501N/D

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NTHS4501N

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Parameter Symbol Test Conditions Min Typ Max Units

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V Drain−to−Source Breakdown Voltage

Temperature Coefficient

(BR)DSS/TJ

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

DSS

GSS

= 0 V, V

= 0 V, I

= 0 V, V

= 24 V

ON CHARACTERISTICS (Note 2)

Gate Threshold Voltage V Negative Threshold

Temperature Coefficient

GS(TH)/TJ

Drain−to−Source On−Resistance R

Forward Transconductance g

GS(TH)

DS(on)

= VDS, I

= 10 V, I

= 4.5 V, I

= 10 V, I

CHARGES AND CAPACITANCES

Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Total Gate Charge Q Threshold Gate Charge Q Gate−to−Source Charge Q Gate−to−Drain Charge Q

ISS OSS RSS

G(TOT)

G(TH)

= 0 V, f = 1.0 MHz,

= 10 V, V

= 4.9 A

= 24 V

SWITCHING CHARACTERISTICS (Note 3)

Turn−On Delay Time t Rise Time t Turn−Off Delay Time t Fall Time t

d(on)

d(off)

= 1.0 A, R

= 10 V, V

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V Reverse Recovery Time t Charge Time t Discharge Time t Reverse Recovery Charge Q

a b

= 0 V, I

= 1.1 A TJ = 25°C 0.75 1.2 V

= 0 V, I

dIS/dt = 90 A/ms

2. Pulse Test: Pulse Width v 300 ms, Duty Cycle v 2%.

3. Switching characteristics are independent of operating junction temperatures.

= 250 mA

30 31 V

30 mV/°C

TJ = 25°C 1.0

TJ = 125°C 10

= ±20 V 100 nA

= 250 mA

1.0 1.6 2.0 V

4.0 mV/°C

= 4.9 A 30 38

= 3.9 A 40 50

= 4.9 A 15 S

462 137

9.1

= 15 V,

0.7

1.3

1.8

4.0

= 15 V,

= 6.0 W

11 17

7.5

19.1

= 1.1 A,

11.9

7.3 13 nC

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NTHS4501N

TYPICAL PERFORMANCE CURVES (T

9 8 7 6 5 4 3

DRAIN CURRENT (AMPS)

1 0

012345678

0.19

0.17

0.15

0.13

0.11

0.09

0.07

0.05

0.03

DRAIN−TO−SOURCE RESISTANCE (W)

0.01

DS(on),

3.2 V

10 V

3.0 V

TJ = 25°C

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

345678910

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

2.8 V

2.6 V

2.4 V

2.2 V

ID = 4.9 A TJ = 25°C

= 25°C unless otherwise noted)

VDS ≥ 10 V

DRAIN CURRENT (AMPS)

−55°C

25°C

TJ = 100°C

1.5 2.0 2.5 3.0 3.5 4.0 4.5

1.0 VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

0.06 TJ = 25°C

0.05

0.04

VGS = 4.5 V

VGS = 10 V

0.03

DRAIN−TO−SOURCE RESISTANCE (W)

0.02

246810

DS(on),

ID, DRAIN CURRENT (AMPS)

Figure 3. On−Resistance vs. Gate−to−Source

Voltage

ID = 4.9 A VGS = 10 V

1.8

1.6

1.4

1.2

DRAIN−TO−SOURCE

DS(on),

0.8

RESISTANCE (NORMALIZED)

0.6

−50 0−25 25 50 125100

75 150

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

10000

1000

, LEAKAGE (nA)

100

DSS

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Figure 4. On−Resistance vs. Drain Current and

Gate Voltage

VGS = 0 V

TJ = 150°C

TJ = 100°C

51525

10 20 30

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

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NTHS4501N

TYPICAL PERFORMANCE CURVES (T

1000

VGS = 0 V

800

600

ISS

400

C, CAPACITANCE (pF)

200

012

DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

1000

VDD = 15 V ID = 1.0 A VGS = 10 V

OSS

RSS

TJ = 25°C

= 25°C unless otherwise noted)

8 7

6 5 4

3 2

1 0

GATE−TO−SOURCE VOLTAGE (VOLTS)

GS,

QG, TOTAL GATE CHARGE (nC)

610

Drain−to−Source Voltage vs. Total Charge

VGS = 0 V TJ = 25°C

ID = 4.9 A TJ = 25°C

DS,

DRAIN−TO−SOURCE VOLTAGE (VOLTS)

100

t, TIME (ns)

d(off)

101

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance

d(on)

100

, SOURCE CURRENT (AMPS)

0.5 0.70.6

0.8

VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

Figure 10. Diode Forward Voltage vs. Current

0.9

1.00.40.3

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NTHS4501N

PACKAGE DIMENSIONS

ChipFETt

CASE 1206A−03

ISSUE H

8765

1234

0.05 (0.002)

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.

4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL

8765

1234

AND VERTICAL SHALL NOT EXCEED 0.08 MM.

5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.

6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE.

DIMAMIN NOM MAX MIN

b 0.25 0.30 0.35 0.010 c 0.10 0.15 0.20 0.004 D 2.95 3.05 3.10 0.116 E 1.55 1.65 1.70 0.061 e 0.65 BSC

e1 0.55 BSC

L 0.28 0.35 0.42 0.011

STYLE 1:

PIN 1. DRAIN

MILLIMETERS

1.00 1.05 1.10 0.039

1.80 1.90 2.00 0.071 0.075 0.079

5° NOM

2. DRAIN

3. DRAIN

4. GATE

5. SOURCE

6. DRAIN

7. DRAIN

8. DRAIN

INCHES

NOM MAX

0.041 0.043

0.012 0.014

0.006 0.008

0.120 0.122

0.065 0.067

0.025 BSC

0.022 BSC

0.014 0.017

5° NOM

SOLDERING FOOTPRINTS*

2.032

0.08

2.032

0.08

2.362

0.093

0.457

0.018

0.635

0.025

2.362

0.093

PITCH

0.66

0.026

inches

0.457

0.018

Basic

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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Style 1

0.66

0.026

1.727

0.068

inches

Page 6

NTHS4501N

ChipFET is a trademark of Vishay Siliconix

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTHS4501N/D