Page 1
NTHD3102C
y
y
Power MOSFET
Complementary, 20 V, +5.5 A /−4.2 A,
ChipFETt
Features
• Complementary N−Channel and P−Channel MOSFET
• Small Size, 40% Smaller than TSOP−6 Package
• Leadless SMD Package Provides Great Thermal Characteristics
• Leading Edge Trench Technology for Low On Resistance
• Reduced Gate Charge to Improve Switching Response
• This is a Pb−Free Device
Applications
• DC−DC Conversion Circuits
• Load/Power Switching
• Single or Dual Cell Li−Ion Battery Supplied Devices
• Ideal for Power Management Applications in Portable, Battery
Powered Products
V
(BR)DSS
N−Channel
20 V
P−Channel
−20 V
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R
TYP
DS(on)
29 mW @ 4.5 V
37 mW @ 2.5 V
48 mW @ 1.8 V
64 mW @ 4.5 V
83 mW @ 2.5 V
105 mW @ 1.8 V
D
1
I
MAX
D
(Note 1)
5.5 A
−4.2 A
S
2
MAXIMUM RATINGS (T
Parameter
Drain−to−Source Voltage V
Gate−to−Source Voltage
N−Channel
Continuous Drain
Current (Note 1)
P−Channel
Continuous Drain
Current (Note 1)
Power Dissipation
(Note 1)
Gate−to−Source ESD Rating −
(Human Body Model, Method 3015)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 in sq pad size
(Cu. area = 1.127 in sq [1 oz] including traces).
= 25°C unless otherwise noted)
J
Symbol Value Unit
DSS
N−Ch
P−Ch "8.0
Stead
State
t ≤ 5 s TA = 25°C 5.5
Stead
State
t ≤ 5 s TA = 25°C 4.2
Steady
State
t ≤ 5 s 2.1
TA = 25°C
TA = 85°C 2.9
TA = 25°C
TA = 85°C 2.2
TA = 25°C P
V
I
I
ESD 100 V
GS
D
D
"8.0
D
20 V
4.0
3.1
1.1
V
A
A
W
G
1
S
N−Channel MOSFET
PIN CONNECTIONS
8
D
1
7
D
1
6
D
2
D
2
(Bottom View) (Top View)
D6 = Specific Device Code
M = Date Code
G = Pb−Free Package
G
2
D
1
P−Channel MOSFET
ChipFET
CASE 1206A
STYLE 2
2
MARKING
DIAGRAM
1
S
1
1
2
3
45
2
G
1
S
2
G
2
G
3
4
D6 M
8
7
6
5
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
September, 2006 − Rev. 2
1 Publication Order Number:
NTHD3102C/D
Page 2
NTHD3102C
MAXIMUM RATINGS (continued) (T
N−Channel
Continuous Drain Current (Note 3)
P−Channel
Continuous Drain Current (Note 3)
Power Dissipation (Note 3) TA = 25°C P
Pulsed Drain Current
= 25°C unless otherwise noted)
J
Parameter
Steady
State
Steady
State
TA = 25°C
TA = 85°C 2.2
TA = 25°C
TA = 85°C 1.7
N−Ch tp = 10 ms
Symbol Value Unit
I
D
I
D
D
I
DM
3.0
2.3
0.6 W
16
A
A
A
P−Ch 12.6
Operating Junction and Storage Temperature TJ, T
Source Current (Body Diode) I
Lead Temperature for Soldering Purposes (1/8″ from case for 10 seconds) T
S
STG
L
−55 to 150 °C
1.7 A
260 °C
THERMAL RESISTANCE RATINGS
Parameter Symbol Max Unit
Junction−to−Ambient − Steady State (Note 2) R
q
JA
110
Junction−to−Ambient − t ≤ 5 s (Note 2) 60
Junction−to−Ambient − Steady State (Note 3) 195
ELECTRICAL CHARACTERISTICS (T
Parameter
= 25°C unless otherwise noted)
J
Symbol N/P Test Conditions Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage
(Note 4)
Drain−to−Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current I
V
(BR)DSS
V
(BR)DSS/TJ
DSS
N
P
VGS = 0 V
ID = 250 mA
ID = −250 mA
20
−20
N 20.2
P 16.2
N VGS = 0 V, VDS = 16 V
P VGS = 0 V, VDS = −16 V −1.0
TJ = 25 °C
N VGS = 0 V, VDS = 16 V
TJ = 85 °C
Gate−to−Source Leakage Current I
GSS
P VGS = 0 V, VDS = −16 V −5.0
N VDS = 0 V, VGS = ±8.0 V ±100
P
VDS = 0 V, VGS = ±8.0 V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Opera t i n g Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [1 oz] including traces).
3. Surface−mounted on FR4 board using the minimum recommended pad size (Cu area = TBD in sq).
4. Switching characteristics are independent of operating junction temperatures.
°C/W
V
mV/°C
1.0 mA
5.0
nA
±100
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2
Page 3
NTHD3102C
ELECTRICAL CHARACTERISTICS (continued) (T
Parameter
Symbol N/P Test Conditions Min Typ Max Unit
= 25°C unless otherwise noted)
J
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Drain−to−Source On Resistance R
V
GS(TH)
DS(on)
N
P
VGS = V
N VGS = 4.5 V , ID = 4.4 A 29 45 mW
P VGS = −4.5 V , ID = −3.2 A 64 80
N VGS = 2.5 V , ID = 4.1 A 37 50
P VGS = −2.5 V, ID = −2.5 A 83 110
N VGS = 1.8 V , ID = 1.9 A 48 70
P VGS = −1.8 V, ID = −0.6 A 105 150
Forward Transconductance g
FS
N VDS = 10 V, ID = 4.4 A 7.7
P VDS = −10 V , ID = −3.2 A 5.9
CHARGES, CAPACITANCES AND GATE RESISTANCE
Input Capacitance
C
ISS
N
P VDS = −10 V 650
Output Capacitance C
Reverse Transfer Capacitance C
OSS
RSS
N VDS = 10 V 100
f = 1.0 MHz, VGS = 0 V
P VDS = −10 V 100
N VDS = 10 V 50
P VDS = −10 V 50
Total Gate Charge Q
G(TOT)
N VGS = 4.5 V, VDS = 10 V, ID = 4.4 A 5.8 7.9
P VGS = −4.5 V, VDS = −10 V, ID = −3.2 A 6.6 8.9
Threshold Gate Charge Q
G(TH)
N VGS = 4.5 V, VDS = 10 V, ID = 4.4 A 0.96
P VGS = −4.5 V, VDS = −10 V, ID = −3.2 A 0.98
Gate−to−Source Charge Q
GS
N VGS = 4.5 V, VDS = 10 V, ID = 4.4 A 1.2
P VGS = −4.5 V, VDS = −10 V, ID = −3.2 A 1.4
Gate−to−Drain Charge Q
GD
N VGS = 4.5 V, VDS = 10 V, ID = 4.4 A 1.56
P VGS = −4.5 V, VDS = −10 V, ID = −3.2 A 1.64
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time t
Turn−Off Delay Time t
Fall Time t
Turn−On Delay Time t
Rise Time t
Turn−Off Delay Time t
Fall Time t
t
d(ON)
r
d(OFF)
f
d(ON)
r
d(OFF)
f
N
P
VGS = 4.5 V, VDD = 10 V,
= 4.4 A, RG = 2.5 W
I
D
VGS = −4.5 V, VDD = −10 V,
= −3.2 A, RG = 2.5 W
I
D
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
DS
ID = 250 mA
ID = −250 mA
0.4 1.2
−0.4 −1.2
VDS = 10 V 510
15.9
15.7
16.9
16.4
15.0
7.2
4.6
6.4
V
S
pF
nC
ns
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3
Page 4
NTHD3102C
ELECTRICAL CHARACTERISTICS (continued) (T
Parameter
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time t
Charge Time t
Discharge Time t
Reverse Recovery Charge Q
Symbol N/P Test Conditions Min Typ Max Unit
V
SD
RR
a
b
RR
= 25°C unless otherwise noted)
J
N
VGS = 0 V, TJ = 25 °C
P IS = −1.7 A −0.7 −1.2
N
IS = 1.7 A 0.68 1.2
IS = 1.7 A 13.5
P IS = −1.7 A 12.6
N IS = 1.7 A 8.6
P IS = −1.7 A 8.4
N IS = 1.7 A 4.9
VGS = 0 V,
/ dt = 100 A/ms
dI
S
P IS = −1.7 A 4.2
N IS = 1.7 A 7.0
P
IS = −1.7 A
6.0
V
ns
nC
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4
Page 5
NTHD3102C
8
0
0
TYPICAL N−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
1.6 V
TJ = 25°C
8
VGS = 8 V to 1.8 V
6
1.4 V
4
2
DRAIN CURRENT (AMPS)
D,
I
0
0
1
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 1. On−Region Characteristics
0.08
VGS = 4.5 V
0.06
4
1.2 V
2
DRAIN CURRENT (AMPS)
D,
I
1.0 V
0
56632
4
78
910
0
0.4
125°C
0.8
25°C
TJ = −55°C
1.61.2
2.0
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.08
VGS = 2.5 V
0.06
TJ = 125°C
TJ = 125°C
TJ = 25°C
0.04
0.04
TJ = 25°C
TJ = −55°C
DRAIN−TO−SOURCE RESISTANCE (W)
0.02
DS(on),
R
TJ = −55°C
0
24
8
106
ID, DRAIN CURRENT (AMPS)
DRAIN−TO−SOURCE RESISTANCE (W)
0.02
DS(on),
R
24
60
ID, DRAIN CURRENT (AMPS)
8
1
0.044
0.036
0.028
DRAIN−TO−SOURCE RESISTANCE (W)
0.02
DS(on),
R
Figure 3. On−Resistance vs. Drain Current
TJ = 25°C
24
I
VGS = 2.5 V
VGS = 4.5 V
DRAIN CURRENT (AMPS)
D,
8
Figure 5. On−Resistance vs. Drain Current
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Figure 4. On−Resistance vs. Drain Current and
1.6
1.4
1.2
1.0
DRAIN−TO−SOURCE
0.8
DS(on),
R
RESISTANCE (NORMALIZED)
1060
0.6
−50 0−25 25
5
Temperature
ID = 4 A
V
= 4.5 V
GS
50 125100
TJ, JUNCTION TEMPERATURE (°C)
75 15
Figure 6. On−Resistance Variation with
Temperature
Page 6
NTHD3102C
TYPICAL N−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
5
4
3
2
1
ID = 4.4 A
T
= 25°C
0
GATE−TO−SOURCE VOLTAGE (VOLTS)
02468
GS,
V
Qg, TOTAL GATE CHARGE (nC)
J
Figure 7. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
0.2
ID = 250 mA
0.1
0
−0.1
−0.2
, THRESHOLD VARIANCE (V)
−0.3
GS(th)
V
−0.4
−50 0−25 25
, JUNCTION TEMPERATURE (°C)
T
J
75 150
50 125100
Figure 9. Threshold Voltage
10
VGS = 0 V
T
= 25°C
J
1
0.1
, SOURCE CURRENT (AMPS)
S
I
0.01
0.20
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
V
SD
Figure 8. Diode Forward Voltage vs. Current
100
t
r
t
10
t, TIME (ns)
d(off)
t
d(on)
t
f
1
101
, GATE RESISTANCE (OHMS)
R
G
Figure 10. Resistive Switching Time Variation
vs. Gate Resistance
TJ = 25°CTJ = 125°C
0.6
VDS = 10 V
I
= 4.4 A
D
= 4.5 V
V
GS
0.80.4
100
1000
TJ = 25°C
VGS = 0 V
800
600
C
ISS
400
C, CAPACITANCE (pF)
200
0
C
OSS
C
RSS
010
5
15
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 11. Capacitance Variation
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6
Page 7
NTHD3102C
8
8
0
0
TYPICAL P−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
VGS = −8 V to −4 V
−2 V
TJ = 25°C
−1.8 V
8
6
−1.6 V
4
4
−1.4 V
2
DRAIN CURRENT (AMPS)
D,
−I
0
0
1
−VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 12. On−Region Characteristics
0.1
VGS = −4.5 V
0.09
56632
4
TJ = 125°C
78
−1.2 V
−1.0 V
910
2
DRAIN CURRENT (AMPS)
D,
−I
25°C
125°C
0
0.8
0.4
0
−VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
Figure 13. Transfer Characteristics
0.16
VGS = −2.5 V
0.14
TJ = −55°C
1.61.2 2.4
2.0
2.
TJ = 125°C
0.08
0.07
TJ = 25°C
0.12
0.10
TJ = 25°C
0.06
0.05
DRAIN−TO−SOURCE RESISTANCE (W)
0.04
DS(on),
R
0.1
0.09
0.08
0.07
0.06
0.05
DRAIN−TO−SOURCE RESISTANCE (W)
0.04
DS(on),
R
TJ = −55°C
0
24
−ID, DRAIN CURRENT (AMPS)
Figure 14. On−Resistance vs. Drain Current
TJ = 25°C
24
−I
VGS = −2.5 V
VGS = −4.5 V
DRAIN CURRENT (AMPS)
D,
0.08
TJ = −55°C
0.06
DRAIN−TO−SOURCE RESISTANCE (W)
0.04
8
106
DS(on),
R
24
−I
DRAIN CURRENT (AMPS)
D,
60
8
1
Figure 15. On−Resistance vs. Drain Current
and Temperature
1.6
ID = −4 A
V
= −4.5 V
GS
1.4
1.2
1.0
DRAIN−TO−SOURCE
0.8
DS(on),
R
RESISTANCE (NORMALIZED)
0.6
8
1060
−50 0−25 25
50 125100
TJ, JUNCTION TEMPERATURE (°C)
75 15
Figure 16. On−Resistance vs. Drain Current
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Figure 17. On−Resistance Variation with
Temperature
7
Page 8
NTHD3102C
TYPICAL P−CHANNEL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
5
4
3
2
1
0
GATE−TO−SOURCE VOLTAGE (VOLTS)
02468
GS,
−V
Qg, TOTAL GATE CHARGE (nC)
ID = −3.2 A
T
= 25°C
J
Figure 18. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
0.2
ID = −250 mA
0.1
0
−0.1
−0.2
, THRESHOLD VARIANCE (V)
−0.3
GS(th)
−V
−0.4
−50 0−25 25
, JUNCTION TEMPERATURE (°C)
T
J
75 150
50 125100
Figure 20. Threshold Voltage
10
VGS = 0 V
T
= 25°C
J
1
TJ = 25°CTJ = 125°C
0.1
, SOURCE CURRENT (AMPS)
S
−I
0.01
0.40.2
, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
−V
SD
0.8
Figure 19. Diode Forward Voltage vs. Current
100
t
r
t
d(off)
t
f
10
t
t, TIME (ns)
d(on)
1
101
, GATE RESISTANCE (OHMS)
R
G
Figure 21. Resistive Switching Time Variation
vs. Gate Resistance
VDS = −10 V
I
= −4.2 A
D
= −4.5 V
V
GS
1.00.6
100
800
TJ = 25°C
VGS = 0 V
600
C
ISS
400
200
C, CAPACITANCE (pF)
0
C
OSS
C
RSS
4
8012
16
20
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)
Figure 22. Capacitance Variation
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8
Page 9
2
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Thermal Impedance
Normalized Effective Transient
0.01
−4 −3 −2 −1
10 1010
Single Pulse
NTHD3102C
TYPICAL PERFORMANCE CURVES
(TJ = 25°C unless otherwise noted)
10 1 10 100 600
Square Wave Pulse Duration (sec)
Figure 23. Thermal Response
Notes:
P
DM
t
1
1. Duty Cycle, D =
2. Per Unit Base = R
TA = PDMZ
3. T
JM −
4. Surface Mounted
t
2
t
1
t
2
thJA
q
JA
= 90°C/W
(t)
ORDERING INFORMATION
Device Package Shipping
NTHD3102CT1G ChipFET
3000 Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specification Brochure, BRD8011/D.
†
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9
Page 10
NTHD3102C
PACKAGE DIMENSIONS
ChipFET]
CASE 1206A−03
ISSUE G
e1
D
8765
H
E
1234
b
e
q
L
E
c
STYLE 2:
PIN 1. SOURCE 1
2. GATE 1
3. SOURCE 2
4. GATE 2
5. DRAIN 2
A
6. DRAIN 2
7. DRAIN 1
8. DRAIN 1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
8765
1234
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
DIMAMIN NOM MAX MIN
b 0.25 0.30 0.35 0.010
c 0.10 0.15 0.20 0.004
D 2.95 3.05 3.10 0.116
E 1.55 1.65 1.70 0.061
e 0.65 BSC
e1 0.55 BSC
L 0.28 0.35 0.42 0.011
H
E
q
MILLIMETERS
1.00 1.05 1.10 0.039
1.80 1.90 2.00 0.071 0.075 0.079
5° NOM
INCHES
NOM MAX
0.041 0.043
0.012 0.014
0.006 0.008
0.120 0.122
0.065 0.067
0.025 BSC
0.022 BSC
0.014 0.017
5° NOM
0.05 (0.002)
SOLDERING FOOTPRINT*
0.457
0.018
2.032
0.08
0.635
0.025
0.635
0.025
2.032
0.08
1.092
0.043
0.66
0.026
0.457
0.018
0.711
0.028
SCALE 20:1
ǒ
inches
mm
Ǔ
0.66
0.026
0.254
0.010
Basic Style 2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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10
SCALE 20:1
ǒ
inches
mm
0.178
0.007
Ǔ
Page 11
NTHD3102C
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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For additional information, please contact your local
Sales Representative
NTHD3102C/D
11
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