Datasheet NTD78N03 Datasheet (ON Semiconductor)

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Page 1

NTD78N03

)

Power MOSFET

25 V, 78 A, Single N−Channel, DPAK

Features

• Low R

• Optimized Gate Charge

• Pb−Free Packages are Available

Applications

• Desktop VCORE

• DC−DC Converters

• Low Side Switch

MAXIMUM RATINGS (T

Drain−to−Source Voltage V Gate−to−Source Voltage V Continuous Drain

Current (Note 1) Power Dissipation

(Note 1) Continuous Drain

Current (Note 2) Power Dissipation

(Note 2) Continuous Drain

Current (R Power Dissipation

(R Pulsed Drain Current Current Limited by Package TA = 25°C I Drain to Source dV/dt dV/dt 8.0 V/ns Operating Junction and Storage Temperature TJ, T Source Current (Body Diode) I Single Pulse Drain−to−Source Avalanche

Energy (VDD = 24 V, VGS = 10 V, L = 5.0 mH, IL(pk) = 17 A, RG = 25 W)

Lead Temperature for Soldering Purposes (1/8″ from case for 10 seconds)

THERMAL RESISTANCE

Junction−to−Case (Drain) Junction−to−Ambient − Steady State (Note 1) Junction−to−Ambient − Steady State (Note 2)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface−mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in

2. Surface−mounted on FR4 board using the minimum recommended pad size.

DS(on)

Parameter Symbol Value Unit

Stead

)

sq [1 oz] including traces).

= 25°C unless otherwise noted)

DSS

TC = 25°C TC = 85°C 11.5 TC = 25°C P

TC = 25°C TC = 85°C 8.8

State

TC = 25°C P

TC = 25°C TC = 85°C 56 TC = 25°C P

tp = 10 ms

DmaxPkg

stg

25 V

"20 V

14.8

2.3 W

11.4

1.4 W

64 W

210 A

45 A

−55 to 175 °C 78 A

722.5 mJ

260 °C

1.95 65

110

°C/W

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TYP

(BR)DSS

25 V

CASE 369AA

DPAK

(Bend Lead)

STYLE 2

DS(on)

4.6 @ 10 V

6.5 @ 4.5 V

CASE 369D

DPAK

(Straight Lead)

STYLE 2

ID MAXV

78 A

N−Channel

CASE 369AD

IPAK

(Straight Lead

MARKING DIAGRAMS

& PIN ASSIGNMENTS

Gate

Drain

YWW78N03G

Drain

Sourc

Drain

YWW78N03G

Drain

Gate

Source

Y = Year WW = Work Week 78N03 = Device Code G = Pb−Free Package

Gate

Drain

YWW78N03G

Drain

Source

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

September, 2006 − Rev. 6

1 Publication Order Number:

NTD78N03/D

Page 2

NTD78N03

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V Drain−to−Source Breakdown Voltage

Temperature Coefficient

(BR)DSS/TJ

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

DSS

GSS

VGS = 0 V, ID = 250 mA

VGS = 0 V,

VDS = 20 V

TJ = 25°C 1.5 mA

TJ = 125°C 10

VDS = 0 V, VGS = "20 V "100 nA

25 V

24 mV/°C

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage V Negative Threshold Temperature Coefficient V Drain−to−Source On Resistance R

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V, ID = 78 A 4.6 6.0 mW

1.0 1.6 3.0 V

−5.0 mV/°C

VGS = 4.5 V, ID = 36 A 6.5 7.8

Forward Transconductance gFS VDS = 10 V, ID = 15 A 22 S

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Total Gate Charge Q Threshold Gate Charge Q Gate−to−Source Charge Q Gate−to−Drain Charge Q

iss

oss

rss

G(TOT)

G(TH)

GS GD

VGS = 0 V, f = 1.0 MHz,

VDS = 12 V

VGS = 4.5 V, VDS = 20 V,

ID = 20 A

1920 2250

960 420

25.5 35

2.4

5.3

18.2

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time t Rise Time t Turn−Off Delay Time t Fall Time t

d(on)

d(off)

VGS = 4.5 V, VDS = 20 V,

ID = 20 A, R

= 3.0 W

11 68 23 42

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V

VGS = 0 V,

IS = 20 A

Reverse Recovery Time t Charge Time ta 17.8 Discharge Time tb 21 Reverse Recovery Time Q

VGS = 0 V, dIs/dt = 100 A/ms,

IS = 20 A

TJ = 25°C 0.83 1.0

TJ = 125°C 0.7

33 nC

PACKAGE PARASITIC VALUES

Source Inductance L Drain Inductance L Gate Inductance L Gate Resistance R

S D G G

Ta = 25C

2.49

0.02

3.46

1.0

3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

4. Switching characteristics are independent of operating junction temperatures.

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NTD78N03

, DRAIN−TO−SOURCE RESISTANCE (

)

, DRAIN−TO−SOURCE RESISTANCE

100

VGS = 4 V

4.5 V

5 V

9 V

TJ = 25°C

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

864

3.8 V

3.6 V

3.4 V

3.2 V

3 V

2.6 V 10

90 80 70 60

50 40 30 20

, DRAIN CURRENT (AMPS)

Figure 1. On−Region Characteristics

0.01

0.009

0.008

0.007

0.006

0.005

0.004

0.003

0.002

0.001

DS(on)

20 60 70 80

TJ = 125°C

TJ = 25°C

TJ = −55°C

5030

ID, DRAIN CURRENT (A)

VGS = 10 V

160

VDS ≥ 10 V

150 140 130 120 110 100

90 80 70 60 50 40

, DRAIN CURRENT (AMPS)

20 10

TJ = 125°C

TJ = 25°C

TJ = −55°C

VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 2. Transfer Characteristics

0.015 TJ = 25°C

0.01

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

DS(on)

60 65 70 75 80

VGS = 4.5 V

VGS = 10 V

ID, DRAIN CURRENT (A)

Figure 3. On−Resistance versus

Drain Current and Temperature

ID = 78 A V

= 4.5 V

2.5

1.5

(NORMALIZED)

0.5

DS(on)

−50 100750−25 125 175 TJ, JUNCTION TEMPERATURE (°C)

5025

Figure 5. On−Resistance Variation with

Temperature

100000

10000

1000

, LEAKAGE (nA)

DSS

100

150

5201510 25

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Figure 4. On−Resistance versus Drain Current

and Gate Voltage

VGS = 0 V

TJ = 150°C

TJ = 125°C

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 6. Drain−To−Source Leakage

Current versus Voltage

Page 4

NTD78N03

6000

VDS = 0 V

VGS = 0 V

TJ = 25°C

5000

iss

4000

3000

rss

2000

C, CAPACITANCE (pF)

1000

10 5 0 5 10 15 20 25

VGSV

rss

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)

Figure 7. Capacitance Variation

1000

VDS = 20 V ID = 20 A VGS = 4.5 V

100

t, TIME (ns)

1 10 100

d(off)

d(on)

RG, GATE RESISTANCE (OHMS)

iss

oss

, GATE−TO−SOURCE VOLTAGE (V)

0 5 10 15 20 25

ID = 20 A TJ = 25°C

30 35

V , DRAIN−TO−SOURCE VOLTAGE (V)

Qg, TOTAL GATE CHARGE (nC)

Figure 8. Gate−to−Source and

Drain−to−Source Voltage versus Total Charge

VGS = 0 V

TJ = 25°C

60 50 40 30 20

, SOURCE CURRENT (AMPS)

0.5 0.6 0.7 0.8 0.9 1.1 1.2 VSD, SOURCE−TO−DRAIN VOLTAGE (V)

1.0

Figure 9. Resistive Switching Time

Variation versus Gate Resistance

1000

100

VGS = 20 V SINGLE PULSE TC = 25°C

, DRAIN CURRENT (AMPS)

0.1

0.1 1 100

LIMIT

DS(on)

THERMAL LIMIT PACKAGE LIMIT

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

10 ms

100 ms 1 ms

10 ms dc

EAS, SINGLE PULSE DRAIN−TO−

SOURCE AVALANCHE ENERGY (mJ)

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Figure 10. Diode Forward Voltage versus Current

800

ID = 78 A

700 600 500 400 300 200 100

25 50 75 100 125 150 175

TJ, STARTING JUNCTION TEMPERATURE (°C)

Figure 12. Maximum Avalanche Energy versus

Starting Junction Temperature

Page 5

NTD78N03

di/dt

TIME

1000

100

THERMAL RESISTANCE

Rthja(t), EFFECTIVE TRANSIENT

0.1

0.01

Figure 13. Diode Reverse Recovery Waveform

DUTY CYCLE

D = 0.5

0.2

0.1

0.05

0.02

0.01

SINGLE PULSE

1E−05 1E−03 1E−02 1E−01

1E−04 1E+02

t, TIME (seconds)

Figure 14. Thermal Response − Various Duty Cycles

0.25 I

MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT

(pk)

DUTY CYCLE, D = t1/t

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN

READ TIME AT t T

J(pk)

− TA = P

(pk)

(t) = r(t) R

1E+00 1E+01 1E+03

(t)

ORDERING INFORMATION

Order Number Package Shipping

NTD78N03 DPAK 75 Units/Rail NTD78N03G DPAK

75 Units/Rail

(Pb−Free) NTD78N03T4 DPAK NTD78N03T4G DPAK

2500 Tape & Reel

(Pb−Free) NTD78N03−1 DPAK Straight Lead NTD78N03−1G DPAK Straight Lead

75 Units/Rail

(Pb−Free) NTD78N03−35 DPAK−3 Straight Lead

(3.5 " 0.15 mm)

NTD78N03−35G DPAK−3 Straight Lead

75 Units/Rail

(3.5 " 0.15 mm)

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

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Page 6

NTD78N03

PACKAGE DIMENSIONS

DPAK (SINGLE GUAGE)

CASE 369AA−01

ISSUE A

NOTES:

SEATING

−T−

PLANE

123

2 PL

0.13 (0.005) T

SOLDERING FOOTPRINT*

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.025 0.035 0.63 0.89 E 0.018 0.024 0.46 0.61 F 0.030 0.045 0.77 1.14 H 0.386 0.410 9.80 10.40 J 0.018 0.023 0.46 0.58 L 0.090 BSC 2.29 BSC R 0.180 0.215 4.57 5.45 S 0.024 0.040 0.60 1.01 U 0.020 −−− 0.51 −−− V 0.035 0.050 0.89 1.27 Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

6.20

0.244

2.58

3.0

0.118

0.101

5.80

0.228

1.6

0.063

SCALE 3:1

6.172

0.243

inches

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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Page 7

−T−

SEATING PLANE

NTD78N03

PACKAGE DIMENSIONS

DPAK

CASE 369D−01

ISSUE B

123

3 PL

0.13 (0.005) T

3.5 MM IPAK, STRAIGHT LEAD

CASE 369AD−01

ISSUE O

0.13 T

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88

E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14

0.090 BSC 2.29 BSC

G H 0.034 0.040 0.87 1.01

J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45

S 0.025 0.040 0.63 1.01

V 0.035 0.050 0.89 1.27

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

NOTES:

1.. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2.. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND

0.30mm FROM TERMINAL TIP.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD GATE OR MOLD FLASH.

MILLIMETERS

DIM MIN MAX

A 2.19 2.38 A1 0.46 0.60 A2 0.87 1.10

b 0.69 0.89

b1 0.77 1.10

D 5.97 6.22 D2 4.80 −−−

E 6.35 6.73 E2 4.70 −−− E3 4.45 5.46

e 2.28 BSC

L 3.40 3.60 L1 −−− 2.10 L2 0.89 1.27

MILLIMETERSINCHES

OPTIONAL

CONSTRUCTION

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTD78N03/D