Datasheet ntd6416anl Datasheet

NTD6416ANL

N-Channel Power MOSFET 100 V, 19 A, 74 mW

Features

• Low R

• High Current Capability

• 100% Avalanche Tested

• These are Pb−Free Devices

DS(on)

V

(BR)DSS

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R

MAX ID MAX

DS(on)

MAXIMUM RATINGS (T

Parameter

Drain−to−Source Voltage V

Gate−to−Source Voltage − Continuous V

Continuous Drain Current

Power Dissipation Steady

Pulsed Drain Current

Operating and Storage Temperature Range TJ, T

Source Current (Body Diode) I

Single Pulse Drain−to−Source Avalanche Energy (V

18.2 A, L = 0.3 mH, R

Lead Temperature for Soldering Purposes, 1/8″ from Case for 10 Seconds

= 50 Vdc, VGS = 10 Vdc, I

DD

= 25°C unless otherwise noted)

J

Steady

State

= 25 W)

G

TC = 25°C

TC = 100°C 13

TC = 25°C P

tp = 10 ms

=

L(pk)

Symbol Value Unit

stg

100 V

$20 V

19

71 W

70 A

−55 to +175

19 A

50 mJ

260 °C

A

°C

I

E

DSS

GS

I

D

DM

S

AS

T

L

THERMAL RESISTANCE RATINGS

Parameter Symbol Max Unit

Junction−to−Case (Drain) − Steady State

Junction−to−Ambient − Steady State (Note 1)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface mounted on FR4 board using 1 sq in pad size, (Cu Area 1.127 sq in [2 oz] including traces).

R

q

JC

R

q

JA

2.1

47

°C/W

100 V 74 mW @ 10 V 19 A

D

G

S

4

2

1

3

DPAK

CASE 369AA

STYLE 2

1

2

IPAK

CASE 369D

STYLE 2

MARKING DIAGRAM

& PIN ASSIGNMENTS

4 Drain

YWW6416ANLG

1

Gate

Drain

6416ANL = Device Code Y = Year WW = Work Week G = Pb−Free Package

3

2

Source

Gate

4 Drain

1

Drain

4

3

YWW6416ANLG

3 Source

2

June, 2011 − Rev. 1

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

1 Publication Order Number:

NTD6416ANL/D

NTD6416ANL

ELECTRICAL CHARACTERISTICS (T

Parameter

= 25°C unless otherwise noted)

J

Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

V

(BR)DSS

V

(BR)DSS/TJ

VGS = 0 V, ID = 250 mA

Temperature Coefficient

Zero Gate Voltage Drain Current I

DSS

VGS = 0 V,

VDS = 100 V

Gate−to−Source Leakage Current I

GSS

VDS = 0 V, VGS = "20 V "100 nA

ON CHARACTERISTICS (Note 2)

Gate Threshold Voltage

Negative Threshold Temperature

V

GS(TH)

V

GS(TH)/TJ

VGS = VDS, ID = 250 mA

Coefficient

Drain−to−Source On−Resistance R

DS(on)

VGS = 4.5 V, ID = 10 A

VGS = 10 V, ID = 10 A

VGS = 10 V, ID = 19 A 68 74

Forward Transconductance g

FS

VDS = 5 V, ID = 10 A 18

CHARGES, CAPACITANCES AND GATE RESISTANCE

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Plateau Voltage V

Gate Resistance R

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

GP

G

VGS = 0 V, f = 1.0 MHz, VDS = 25 V

VGS = 10 V, VDS = 80 V, ID = 19 A

SWITCHING CHARACTERISTICS (Note 3)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(on)

d(off)

r

f

VGS = 10 V, VDD = 80 V,

= 19 A, RG = 6.1 W

I

D

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time T

Discharge Time T

Reverse Recovery Charge Q

V

SD

RR

a

b

RR

VGS = 0 V, IS = 19 A

VGS = 0 V, dIS/dt = 100 A/ms,

I

= 19 A

S

2. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

3. Switching characteristics are independent of operating junction temperatures.

100 V

120 mV/°C

TJ = 25°C 1.0

TJ = 125°C 10

1.0 2.2 V

5.4 mV/°C

70 80

62 74

700 1000

110

50

25 40

0.7

2.4

9.6

3.2 V

2.4

7.0

16

35

40

TJ = 25°C 0.9 1.2

TJ = 125°C 0.72

50

38

14

112 nC

mA

mW

S

pF

nC

W

ns

V

ns

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2

NTD6416ANL

8

40

TJ = 25°C

30

10 V

4.5 V

3.6 V

20

3.2 V

, DRAIN CURRENT (A)

10

D

I

3.0 V

2.8 V

VGS = 2.4 V

0

012345

V

, DRAIN−TO−SOURCE VOLTAGE (V)

DS

Figure 1. On−Region Characteristics

0.11

0.1

0.09

0.08

ID = 19 A

T

= 25°C

J

40

VDS w 10 V

30

20

, DRAIN CURRENT (A)

10

D

I

TJ = 125°C

TJ = 25°C

TJ = −55°C

0

012345

VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 2. Transfer Characteristics

0.080 TJ = 25°C

0.075

0.070

0.065

0.060

VGS = 4.5 V

VGS = 10 V

0.07

, DRAIN−TO−SOURCE RESISTANCE (W)

0.06 246810

DS(on)

R

V

, GATE−TO−SOURCE VOLTAGE (V)

GS

Figure 3. On−Region versus Gate−To−Source

Voltage

3

VGS = 10 V

I

= 19 A

D

2.5

2

1.5

(NORMALIZED)

1

, DRAIN−TO−SOURCE RESISTANCE

0.5

−50 −25 0 25 50 75 100 125 150 175

DS(on)

R

T

, JUNCTION TEMPERTURE (°C)

J

Figure 5. On−Resistance Variation with

Temperature

0.055

, DRAIN−TO−SOURCE RESISTANCE (W)

0.050 2 6 10 14 1

DS(on)

R

I

, DRAIN CURRENT (A)

D

Figure 4. On−Region versus Drain Current and

Gate−To −Source Voltage

10000

VGS = 0 V

TJ = 150°C

1000

, LEAKAGE (nA)

100

DSS

I

TJ = 125°C

10

10 20 30 40 50 60 70 80 90 10

, DRAIN−TO−SOURCE VOLTAGE (V)

V

DS

Figure 6. Drian−to−Source Leakage Current

versus Voltage

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3

NTD6416ANL

1400

1200

TJ = 25°C V

= 0 V

GS

1000

800

C

iss

600

400

C, CAPACITANCE (pF)

200

C

rss

0

C

oss

0 102030405060708090100

V

, DRAIN−TO−SOURCE VOLTAGE (V)

DS

Figure 7. Capacitance Variation

1000

t, TIME (ns)

100

10

VDS = 80 V

I

= 19 A

D

= 10 V

V

GS

t

d(off)

t

d(on)

t

r

10

Q

T

8

V

6

V

DS

4

Q

gs

Q

gd

2

, GATE−TO−SOURCE VOLTAGE (V)

GS

V

0

0 5 10 15 20 25

Q

, TOTAL GATE CHARGE (nC)

g

GS

VDS = 80 V

I

= 19 A

D

= 25°C

T

J

100

80

60

40

20

0

, DRAIN−TO−SOURCE VOLTAGE (V)

DS

V

Figure 8. Gate−to−Source Voltage and

Drain−to−Source Voltage versus Total Charge

20

TJ = 25°C

V

= 0 V

GS

15

f

10

5

, SOURCE CURRENT (A)

S

I

1

1 10 100

RG, GATE RESISTANCE (W)

Figure 9. Resistive Switching Time Variation

versus Gate Resistance

100

10

1

0.1

, DRAIN CURRENT (A)

D

I

R

LIMIT

DS(on)

THERMAL LIMIT PACKAGE LIMIT

10 ms

100 ms

ms

1

ms

10

dc

VGS = 10 V SINGLE PULSE TC = 25°C

0.01 1 10 100 1000

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 11. Resistive Switching Time Variation

versus Gate Resistance

0

0.5 0.55 0.60 0.65 0.70 0.75 0.80 0.85 0.90 0.95 1.0

VSD, SOURCE−TO−DRAIN VOLTAGE (V)

Figure 10. Diode Forward Voltage versus

Current

50

ID = 18.2 A

40

30

20

10

EAS, SINGLE PULSE DRAIN−TO−

SOURCE AVALANCHE ENERGY (mJ)

0

25 50 75 100 125 150 175

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 12. Resistive Switching Time Variation

versus Gate Resistance

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4

NTD6416ANL

1.0

D = 0.5

0.2

0.1

0.05

0.1

0.02

(NORMALIZED)

0.01

SINGLE PULSE

0.01

r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE

Figure 13. Thermal Response

ORDERING INFORMATION

Device Package Shipping

NTD6416ANLT4G DPAK

NTD6416ANL−1G IPAK

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specification Brochure, BRD8011/D.

P

(pk)

t, TIME (ms)

(Pb−Free)

t

1

t

2

DUTY CYCLE, D = t1/t

R

(t) = r(t) R

q

JC

q

JC

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

− TC = P

J(pk)

2

(pk)

1

R

(t)

q

JC

1.0E+00 1.0E+011.0E-011.0E-021.0E-031.0E-041.0E-05

†

2500 / Tape & Reel

75 Units / Rail

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5

L3

L4

b2

e

E

b3

4

12 3

A

B

D

b

0.005 (0.13) C

DETAIL A

M

NTD6416ANL

PACKAGE DIMENSIONS

DPAK (SINGLE GUAGE)

CASE 369AA−01

ISSUE B

C

A

c2

H

c

GAUGE

L2

PLANE

L

L1

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.102

A1

H

3.00

0.118

Z

SEATING

C

PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61

c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC H 0.370 0.410 9.40 10.41 L 0.055 0.070 1.40 1.78

L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

5.80

0.228

1.60

0.063

SCALE 3:1

6.17

0.243

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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6

NTD6416ANL

PACKAGE DIMENSIONS

IPAK

CASE 369D−01

ISSUE C

V

S

−T−

SEATING PLANE

F

B

R

4

123

G

A

K

3 PL

D

0.13 (0.005) T

C

E

J

H

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

Z

DIM MIN MAX MIN MAX

A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88

E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14

0.090 BSC 2.29 BSC

G H 0.034 0.040 0.87 1.01

J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45

S 0.025 0.040 0.63 1.01

V 0.035 0.050 0.89 1.27

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTD6416ANL/D

7