Datasheet ntd5802n-d Datasheet

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Page 1

NTD5802N

Power MOSFET

40 V, Single N−Channel, 101 A DPAK

Features

• Low R

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• MSL 1/260°C

• AEC Q101 Qualified

• 100% Avalanche Tested

• These are Pb−Free Devices

to Minimize Conduction Losses

DS(on)

(BR)DSS

40 V

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DS(on)

4.4 mW @ 10 V

7.8 mW @ 5.0 V

101 A

50 A

Applications

• CPU Power Delivery

• DC−DC Converters

• Motor Driver

MAXIMUM RATINGS (T

Parameter

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current (R

Power Dissipation (R

Continuous Drain Current (R

Power Dissipation (R

Pulsed Drain Current

Current Limited by Package TA = 25°C I

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) I

Drain to Source dV/dt dV/dt 6.0 V/ns

Single Pulse Drain−to−Source Avalanche Energy (V L = 0.3 mH, I

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

) (Note 1)

= 32 V, VGS = 10 V,

= 40 A, RG = 25 W)

L(pk)

= 25°C unless otherwise noted)

Symbol Value Unit

DSS

DmaxPkg

Steady

State

tp=10ms

TC = 25°C

TC = 85°C 78

TC = 25°C P

TA = 25°C

TA = 85°C 12.7

TA = 25°C P

TA = 25°C I

stg

40 V

"20 V

101

93.75 W

16.4

2.5 W

300 A

45 A

−55 to 175

50 A

240 mJ

260 °C

°C

CASE 369C

DPAK

(Bent Lead)

STYLE 2

N−Channel

MARKING DIAGRAMS

& PIN ASSIGNMENT

Drain

YWW5802NG

Drain

Gate

Y = Year WW = Work Week 5802N = Device Code G = Pb−Free Package

Source

March, 2011 − Rev. 5

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

1 Publication Order Number:

NTD5802N/D

Page 2

NTD5802N

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain)

Junction−to−Ambient − Steady State (Note 1)

Junction−to−Ambient − Steady State (Note 2)

1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size.

1.6

105

°C/W

ELECTRICAL CHARACTERISTICS (T

Parameter

= 25°C unless otherwise noted)

Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage Temperature Coefficient

(BR)DSS/TJ

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

(BR)DSS

DSS

GSS

VGS = 0 V, ID = 10 mA

VGS = 0 V,

= 40 V

TJ = 25°C 1.0 mA

TJ = 150°C 50

VDS = 0 V, VGS = "20 V "100 nA

40 V

40 mV/°C

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage

Negative Threshold Temperature

Coefficient

Drain−to−Source On Resistance R

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V, ID = 50 A 3.6 4.4 mW

1.5 3.5 V

−7.4 mV/°C

VGS = 5.0 V, ID = 50 A 6.5 7.8

Forward Transconductance gFS VDS = 15 V, ID = 15 A 16.8 S

CHARGES AND CAPACITANCES

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

iss

oss

rss

iss

oss

rss

G(TOT)

G(TH)

VGS = 0 V, f = 1.0 MHz,

= 12 V

VGS = 0 V, f = 1.0 MHz,

= 25 V

VGS = 10 V, VDS = 15 V,

ID = 50 A

5300

850

550

5025

580

400

75 100

6.0

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

d(on)

d(off)

VGS = 10 V, VDS = 20 V,

= 50 A, R

= 2.0 W

8.5

3. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

4. Switching characteristics are independent of operating junction temperatures.

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Page 3

NTD5802N

ELECTRICAL CHARACTERISTICS (T

Parameter

= 25°C unless otherwise noted)

Symbol Test Condition Min Typ Max Unit

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time ta 15

Discharge Time tb 10

Reverse Recovery Charge Q

VGS = 0 V,

= 50 A

VGS = 0 V,

= 20 A

TJ = 25°C 0.9 1.2

TJ = 25°C 0.8 1.0

VGS = 0 V, dIs/dt = 100 A/ms,

= 50 A

15 nC

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Page 4

NTD5802N

TYPICAL PERFORMANCE CHARACTERISTICS

200

180

160

140

120

10 V

7 V

6 V

VGS = 5 V

TJ = 25°C

4.5 V

100

, DRAIN CURRENT (A)

012 56

, DRAIN−TO−SOURCE VOLTAGE (V)

4.2 V

4 V

3.8 V

3.6 V

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.010

0.008

0.006

0.004

, DRAIN−TO−SOURCE RESISTANCE (W)

0.002

DS(on)

VGS = 10 V

TJ = 150°C

TJ = 25°C

TJ = −55°C

10 30 70 150 19090 130

50 110 170

ID, DRAIN CURRENT (A)

Figure 3. On−Resistance vs. Drain Current Figure 4. On−Resistance vs. Drain Current and

200

VDS ≥ 10 V

150

100

, DRAIN CURRENT (A)

TJ = 25°C

TJ = 100°C

TJ = −55°C

23456

, GATE−TO−SOURCE VOLTAGE (V)

0.015

0.014

TJ = 25°C

0.013

VGS = 5 V

0.012

0.011

0.010

0.009

0.008

0.007

0.006

0.005

0.004

, DRAIN−TO−SOURCE RESISTANCE (W)

0.003

0.002

DS(on)

30 50 70 90 110 130 150 170 190

VGS = 10 V

ID, DRAIN CURRENT (A)

Gate Voltage

1.7 ID = 50 A

1.6 V

= 10 V

1.5

1.4

1.3

1.2

1.1

(NORMALIZED)

0.9

, DRAIN−TO−SOURCE RESISTANCE

0.8

0.7

DS(on)

−50 −25 0 25 50 75 100 125 150 175

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

100000

10000

, LEAKAGE (nA)

1000

DSS

100

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VGS = 0 V

TJ = 150°C

TJ = 100°C

2 6 10 14 18 22 26 30 34 38

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

Page 5

NTD5802N

TYPICAL PERFORMANCE CHARACTERISTICS

8000

7000

iss

VGS = 0 V T

6000

5000

4000

3000

2000

C, CAPACITANCE (pF)

1000

105 0 5 10152025303540

GATE−TO−SOURCE OR DRAIN−TO−SOURCE

oss

rss

VOLTAGE (V)

Figure 7. Capacitance Variation

1000

VDD = 20 V I

= 50 A

= 10 V

100

t, TIME (ns)

d(on)

= 25°C

d(off)

ID = 50 A

= 25°C

, GATE−TO−SOURCE VOLTAGE (V)

020406080

Qg, TOTAL GATE CHARGE (nC)

Figure 8. Gate−to−Source and

Drain−to−Source Voltage vs. Total Charge

VGS = 0 V

= 25°C

, SOURCE CURRENT (A)

, DRAIN−TO−SOURCE VOLTAGE (V)

1 10 100

RG, GATE RESISTANCE (W)

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance

1000

100

VGS = 10 V Single Pulse TC = 25°C

, DRAIN CURRENT (A)

DS(on)

Limit

Thermal Limit

0.1

0.1 10 100

Package Limit

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

0.4 0.8 1.40.6 1.0 1.2

VSD, SOURCE−TO−DRAIN VOLTAGE (V)

Figure 10. Diode Forward Voltage vs. Current

10 ms

100 ms

1 ms

10 ms dc

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Page 6

NTD5802N

TYPICAL PERFORMANCE CHARACTERISTICS

D = 0.5

0.2

0.1

(°C/W)

0.05

0.1

0.02

0.01

Single Pulse

0.01

r(t), Effective Transient Thermal Resistance

0.00001 0.0001 0.001 0.01 0.1 1

t, PULSE TIME (s)

Figure 12. Thermal Response

ORDERING INFORMATION

Order Number Package Shipping

NTD5802NT4G DPAK

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

2500/Tape & Reel

†

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Page 7

12 3

0.005 (0.13) C

DETAIL A

NTD5802N

PACKAGE DIMENSIONS

DPAK

CASE 369C−01

ISSUE D

GAUGE

PLANE

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

SEATING

PLANE

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61 c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

MILLIMETERSINCHES

6.20

0.244

2.58

3.00

0.118

0.102

5.80

0.228

1.60

0.063

SCALE 3:1

6.17

0.243

inches

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTD5802N/D