Datasheet ntd4909n Datasheet

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Page 1

NTD4909N

Power MOSFET

30 V, 41 A, Single N−Channel, DPAK/IPAK

Features

• Low R

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• These are Pb−Free Devices

Applications

• CPU Power Delivery

• DC−DC Converters

to Minimize Conduction Losses

DS(on)

(BR)DSS

30 V

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MAX

DS(on)

8.0 mW @ 10 V

12 mW @ 4.5 V

ID MAXV

41 A

MAXIMUM RATINGS (T

Parameter Symbol Value Unit

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current (R (Note 1)

Power Dissipation (R

Continuous Drain Current (R (Note 2)

Power Dissipation (R

Continuous Drain Current (R (Note 1)

Power Dissipation (R

Pulsed Drain Current

Current Limited by Package TA = 25°C I

Operating Junction and Storage Temperature TJ, T

Source Current (Body Diode) I

Drain to Source dV/dt dV/dt 7.0 V/ns

Single Pulse Drain−to−Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, L = 0.1 mH, I

Lead Temperature for Soldering Purposes (1/8″ from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size.

) (Note 1)

) (Note 2)

) (Note 1)

)

= 24 A, RG = 25 W)

L(pk)

= 25°C unless otherwise noted)

TA = 25°C

TA = 100°C 8.6

TA = 25°C P

TA = 25°C

Steady

State

tp=10ms

TA = 100°C 6.2

TA = 25°C P

TC = 25°C

TC = 100°C 29

TC = 25°C P

TA = 25°C I

DmaxPkg

DSS

stg

30 V

"20 V

12.1

2.6 W

8.8

1.37 W

29.4 W

167 A

60 A

−55 to 175

27 A

28 mJ

260 °C

°C

CASE 369AA

DPAK

(Bent Lead)

STYLE 2

Drain

YWW4909NG

Drain

Gate

Source

CASE 369AD

IPAK

(Straight Lead)

MARKING DIAGRAMS

& PIN ASSIGNMENTS

Drain

YWW4909NG

Gate

Y = Year WW = Work Week 4909N = Device Code G = Pb−Free Package

Drain

Source

Gate

N−Channel

CASE 369D

IPAK

(Straight Lead

DPAK)

Drain

YWW4909NG

Drain

Source

June, 2010 − Rev. 2

See detailed ordering and shipping information in the package

ORDERING INFORMATION

dimensions section on page 3 of this data sheet.

1 Publication Order Number:

NTD4909N/D

Page 2

NTD4909N

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain)

Junction−to−TAB (Drain)

Junction−to−Ambient − Steady State (Note 3)

Junction−to−Ambient − Steady State (Note 4)

3. Surface−mounted on FR4 board using 1 in sq pad size, 1 oz Cu.

4. Surface−mounted on FR4 board using the minimum recommended pad size.

JC−TAB

5.1

4.3

58.2

110

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage V

Drain−to−Source Breakdown Voltage

(BR)DSS

(BR)DSS/TJ

VGS = 0 V, ID = 250 mA

30 V

15 mV/°C

Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

DSS

GSS

VGS = 0 V,

VDS = 24 V

VDS = 0 V, VGS = "20 V "100 nA

TJ = 25°C 1.0 mA

TJ = 125°C 10

ON CHARACTERISTICS (Note 5)

Gate Threshold Voltage V

Negative Threshold Temperature Coefficient V

Drain−to−Source On Resistance R

GS(TH)

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V

ID = 30 A 6.5 8.0 mW

1.0 1.7 2.2 V

4.0 mV/°C

ID = 15 A 6.5

VGS = 4.5 V

ID = 30 A 9.5 12

ID = 15 A 9.5

Forward Transconductance gFS VDS = 1.5 V, ID = 30 A 52 S

CHARGES AND CAPACITANCES

Input Capacitance C

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Total Gate Charge Q

iss

oss

rss

G(TOT)

G(TH)

G(TOT)

VGS = 0 V, f = 1.0 MHz,

VDS = 15 V

VGS = 4.5 V, VDS = 15 V,

ID = 30 A

VGS = 10 V, VDS = 15 V,

1314

487

17.4

7.6

2.1

4.3

1.3

17.5 nC

ID = 30 A

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time t

Rise Time t

Turn−Off Delay Time t

Fall Time t

Turn−On Delay Time t

Rise Time t

Turn−Off Delay Time t

Fall Time t

d(on)

d(off)

d(on)

d(off)

VGS = 4.5 V, VDS = 15 V,

ID = 15 A, R

= 3.0 W

VGS = 10 V, VDS = 15 V,

ID = 15 A, R

= 3.0 W

2.7

8.0

2.3

5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.

6. Switching characteristics are independent of operating junction temperatures.

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Page 3

NTD4909N

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

Parameter Symbol Test Condition Min Typ Max Unit

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage V

VGS = 0 V,

IS = 30 A

Reverse Recovery Time t

Charge Time ta 16

VGS = 0 V, dIs/dt = 100 A/ms,

Discharge Time tb 14

Reverse Recovery Time Q

TJ = 25°C 0.9 1.1

TJ = 125°C 0.8

IS = 30 A

PACKAGE PARASITIC VALUES

Source Inductance (Note 7) L

Drain Inductance, DPAK L

Drain Inductance, IPAK (Note 7) L

Gate Inductance (Note 7) L

Gate Resistance R

TA = 25°C

7. Assume terminal length of 110 mils.

20 nC

2.99

0.0164

1.88

4.9

1.0 2.0

ORDERING INFORMATION

Order Number Package Shipping

NTD4909NT4G DPAK

(Pb−Free)

NTD4909N−1G IPAK

(Pb−Free)

NTD4909N−35G IPAK Trimmed Lead

(Pb−Free)

2500 / Tape & Reel

75 Units / Rail

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

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Page 4

NTD4909N

TYPICAL CHARACTERISTICS

10 V

, DRAIN CURRENT (A)

VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.020

0.018

0.016

0.014

0.012

0.010

0.008

0.006

, DRAIN−TO−SOURCE RESISTANCE (W)

0.004

DS(on)

Figure 3. On−Resistance vs. V

4.5 V

VGS = 4.0 V7 V

4.2 V

VGS (V) ID, DRAIN CURRENT (A)

TJ = 25°C

3.8 V

3.6 V

3.4 V

3.2 V

3.0 V

2.8 V

2.6 V

2.4 V

43210

ID = 30 A TJ = 25°C

9.08.07.0 106.05.04.03.0

VDS = 10 V

TJ = 25°C

, DRAIN CURRENT (A)

TJ = 125°C

0.014

0.013

0.012

0.011

0.010

0.009

0.008

0.007

0.006

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

0.004

DS(on)

TJ = 25°C

VGS = 4.5 V

Figure 4. On−Resistance vs. Drain Current and

TJ = −55°C

VGS = 10 V

Gate Voltage

4.54.03.53.02.52.0

8575655545352515

2.0 ID = 30 A VGS = 10 V

1.8

1.6

1.4

1.2

, DRAIN−TO−SOURCE

1.0

DS(on)

RESISTANCE (NORMALIZED)

0.8

0.6

TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 5. On−Resistance Variation with

50 175

Temperature

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10,000

, LEAKAGE (nA)

15012510075250−25−50

1000

100

DSS

VGS = 0 V

TJ = 150°C

TJ = 125°C

TJ = 85°C

30252015105

Figure 6. Drain−to−Source Leakage Current

vs. Voltage

Page 5

NTD4909N

TYPICAL CHARACTERISTICS

2000

1500

1000

500

C, CAPACITANCE (pF)

1000

VDD = 15 V ID = 15 A VGS = 10 V

100

t, TIME (ns)

Figure 9. Resistive Switching Time Variation

15.0

VGS = 0 V TJ = 25°C

iss

13.5 TJ = 25°C

12.0

10.5

9.0

7.5

6.0

oss

4.5

3.0

, GATE−TO−SOURCE VOLTAGE (V)

rss

25201510 3050

1.5

Qgd

Qgs

VDD = 15 V VGS = 10 V ID = 30 A

61620

VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

Drain−to−Source Voltage vs. Total Charge

VGS = 0 V

d(off)

TJ = 125°C

d(on)

, SOURCE CURRENT (A)

100101

RG, GATE RESISTANCE (W)

VSD, SOURCE−TO−DRAIN VOLTAGE (V)

Figure 10. Diode Forward Voltage vs. Current

vs. Gate Resistance

181412108420

TJ = 25°C

0.80.2 1.00.60 0.4

1000

100

VGS = 10 V Single Pulse

TC = 25°C

DS(on)

Limit

, DRAIN CURRENT (A)

Thermal Limit Package Limit

0.1

VDS, DRAIN−TO−SOURCE VOLTAGE (V) TJ, STARTING JUNCTION TEMPERATURE (°C)

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

10 ms

100 ms

1 ms

10 ms

, SINGLE PULSE DRAIN−TO−

SOURCE AVALANCHE ENERGY (mJ)

1001010.1

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ID = 24 A

175150125100755025

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

Page 6

100

0.1

R(t) (°C/W)

0.01

Duty Cycle = 50%

20%

10% 5% 2%

Single Pulse

NTD4909N

TYPICAL CHARACTERISTICS

0.001

Psi Tab−A

GFS (S)

0.010.0010.00010.000010.000001

PULSE TIME (sec)

0.1 1 10 100 1000

Figure 13. FET Thermal Response

20 35 50

ID (A)

Figure 14. GFS vs. ID

45403025151050

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Page 7

12 3

0.005 (0.13) C

DETAIL A

NTD4909N

PACKAGE DIMENSIONS

DPAK (SINGLE GUAGE)

CASE 369AA−01

ISSUE B

GAUGE

PLANE

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.102

0.118

3.00

SEATING PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61 c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

5.80

0.228

1.60

0.063

SCALE 3:1

6.17

0.243

inches

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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Page 8

SEATING PLANE

NTD4909N

PACKAGE DIMENSIONS

3.5 MM IPAK, STRAIGHT LEAD

CASE 369AD−01

ISSUE O

0.13 T

OPTIONAL

CONSTRUCTION

NOTES:

1.. DIMENSIONING AND TOLERANCING PER

ASME Y14.5M, 1994.

2.. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSION b APPLIES TO PLATED TERMINAL

AND IS MEASURED BETWEEN 0.15 AND

0.30mm FROM TERMINAL TIP.

4. DIMENSIONS D AND E DO NOT INCLUDE

MOLD GATE OR MOLD FLASH.

MILLIMETERS

DIM MIN MAX

A 2.19 2.38 A1 0.46 0.60 A2 0.87 1.10

b 0.69 0.89 b1 0.77 1.10

D 5.97 6.22 D2 4.80 −−−

E 6.35 6.73 E2 4.70 −−− E3 4.45 5.46

e 2.28 BSC

L 3.40 3.60 L1 −−− 2.10 L2 0.89 1.27

IPAK (STRAIGHT LEAD DPAK)

CASE 369D−01

ISSUE B

NOTES:

123

−T−

SEATING PLANE

D 3 PL

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

0.13 (0.005) T

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88

E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14

0.090 BSC 2.29 BSC

G H 0.034 0.040 0.87 1.01

J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45

S 0.025 0.040 0.63 1.01

V 0.035 0.050 0.89 1.27

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

PUBLICATION ORDERING INFORMATION

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For additional information, please contact your loca Sales Representative

NTD4909N/D