Datasheet ntd4815n Datasheet

NTD4815N

Power MOSFET

30 V, 35 A, Single N−Channel, DPAK/IPAK

Features

• Low R

• Low Capacitance to Minimize Driver Losses

• Optimized Gate Charge to Minimize Switching Losses

• These are Pb−Free Devices

Applications

• CPU Power Delivery

• DC−DC Converters

• High Side Switching

to Minimize Conduction Losses

DS(on)

V

(BR)DSS

30 V

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R

MAX ID MAX

DS(ON)

15 mW @ 10 V

25 mW @ 4.5 V

D

35 A

MAXIMUM RATINGS (T

Parameter Symbol Value Unit

Drain−to−Source Voltage V

Gate−to−Source Voltage V

Continuous Drain Current R (Note 1)

Power Dissipation R

Continuous Drain Current R (Note 2)

Power Dissipation R

Continuous Drain Current R (Note 1)

Power Dissipation R

Pulsed Drain Current

Current Limited by Package TA = 25°C I

Operating Junction and Storage Temperature

Source Current (Body Diode) I

Drain to Source dV/dt dV/dt 6 V/ns

Single Pulse Drain−to−Source Avalanche Energy (V I

L

Lead Temperature for Soldering Purposes (1/8” from case for 10 s)

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

q

JA

(Note 1)

q

JA

q

JA

(Note 2)

q

JA

q

JC

(Note 1)

q

JC

= 24 V, VGS = 10 V,

DD

= 11 Apk, L = 1.0 mH, RG = 25 W)

= 25°C unless otherwise stated)

J

TA = 25°C

TA = 85°C 6.5

TA = 25°C P

TA = 25°C

Steady

State

tp=10ms

TA = 85°C 5.3

TA = 25°C P

TC = 25°C

TC = 85°C 27

TC = 25°C P

TA = 25°C I

DSS

GS

I

D

ID

D

I

D

DM

DmaxPkg

TJ,

T

STG

S

EAS 60.5 mJ

T

L

30 V

±20 V

8.5

1.92 W

6.9

1.26 W

35

32.6 W

87 A

35 A

−55 to +175

27 A

260 °C

A

°C

2

1

3

CASE 369AA

DPAK

(Bent Lead)

STYLE 2

4

Drain

YWW

4815NG

2

Drain

1

Gate

Source

G

S

N−CHANNEL MOSFET

4

1

2

3

CASE 369AC

3 IPAK

(Straight Lead)

MARKING DIAGRAMS

& PIN ASSIGNMENTS

4

Drain

YWW

4815NG

2

1

3

Gate

Y = Year WW = Work Week 4815N = Device Code G = Pb−Free Package

Drain

3

Source

Gate

4

1

2

3

CASE 369D

IPAK

(Straight Lead

DPAK)

4

Drain

YWW

4815NG

2

1

3

Drain

Source

October, 2010 − Rev. 6

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet.

1 Publication Order Number:

NTD4815N/D

NTD4815N

THERMAL RESISTANCE MAXIMUM RATINGS

Parameter Symbol Value Unit

Junction−to−Case (Drain)

Junction−to−TAB (Drain)

Junction−to−Ambient – Steady State (Note 1)

Junction−to−Ambient – Steady State (Note 2)

1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.

2. Surface−mounted on FR4 board using the minimum recommended pad size.

R

q

R

q

JC

JC−TAB

R

q

JA

R

q

JA

4.6

3.5

78

119

°C/W

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

J

Parameter Symbol Test Condition Min Typ Max Unit

OFF CHARACTERISTICS

Drain−to−Source Breakdown Voltage

Drain−to−Source Breakdown Voltage Temperature Coefficient

Zero Gate Voltage Drain Current I

Gate−to−Source Leakage Current I

V

(BR)DSS

V

(BR)DSS

T

DSS

GSS

VGS = 0 V, ID = 250 mA

/

J

VGS = 0 V,

VDS = 24 V

VDS = 0 V, VGS = ±20 V ±100 nA

ON CHARACTERISTICS (Note 3)

Gate Threshold Voltage

Negative Threshold Temperature Coefficient

Drain−to−Source On Resistance R

V

GS(TH)

V

GS(TH)/TJ

DS(on)

VGS = VDS, ID = 250 mA

VGS = 10 V to

11.5 V

VGS = 4.5 V

Forward Transconductance g

FS

VDS = 15 V, ID = 10 A 6.0 S

CHARGES AND CAPACITANCES

Input Capacitance

Output Capacitance C

Reverse Transfer Capacitance C

Total Gate Charge Q

Threshold Gate Charge Q

Gate−to−Source Charge Q

Gate−to−Drain Charge Q

Total Gate Charge Q

C

ISS

OSS

RSS

G(TOT)

G(TH)

GS

GD

G(TOT)

VGS = 0 V, f = 1.0 MHz, VDS = 12 V

VGS = 4.5 V, VDS = 15 V; ID = 30 A

VGS = 11.5 V, VDS = 15 V;

ID = 30 A

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

VGS = 4.5 V, VDS = 15 V, ID = 15 A,

= 3.0 W

R

G

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

30 V

25

TJ = 25 °C 1

TJ = 125°C 10

1.5 2.5 V

5.6

ID = 30 A 12 15

ID = 15 A 11.5

ID = 30 A 21 25

ID = 15 A 18.3

770

181

108

6.0 6.6

0.9

2.5

3.1

14.1 nC

10.5

21.4

11.4

3.5

mV/°C

mA

mV/°C

mW

pF

nC

ns

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2

NTD4815N

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise specified)

J

Parameter UnitMaxTypMinTest ConditionSymbol

SWITCHING CHARACTERISTICS (Note 4)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

Fall Time t

t

d(ON)

r

d(OFF)

f

VGS = 11.5 V, VDS = 15 V,

= 15 A, RG = 3.0 W

I

D

DRAIN−SOURCE DIODE CHARACTERISTICS

Forward Diode Voltage

Reverse Recovery Time t

Charge Time t

Discharge Time t

Reverse Recovery Charge Q

V

SD

RR

a

b

RR

VGS = 0 V,

I

= 30 A

S

VGS = 0 V, dIS/dt = 100 A/ms,

IS = 30 A

PACKAGE PARASITIC VALUES

Source Inductance

Drain Inductance, DPAK L

Drain Inductance, IPAK L

Gate Inductance L

Gate Resistance R

L

S

D

G

TA = 25°C

3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.

4. Switching characteristics are independent of operating junction temperatures.

6.3

17.6

18.4

2.3

TJ = 25°C 1.0 1.2

TJ = 125°C 0.92

15.3

8.7

6.6

5.5 nC

2.49

0.0164

1.88

3.46

2.6

ns

V

ns

nH

W

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3

NTD4815N

TYPICAL PERFORMANCE CURVES

60

50

5.5 V to 10 V 5 V

40

30

20

, DRAIN CURRENT (AMPS)

D

10

I

0

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

V

DS

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.030

0.025

0.020

0.015

80

TJ = 25°C

4.5 V

VDS ≥ 10 V

70

60

4 V

3.8 V

3.6 V

3.4 V

3.2 V

3 V

21

3

4

5

50

40

30

20

, DRAIN CURRENT (AMPS)

D

I

10

TJ = 125°C

TJ = 25°C

0

23

10

, GATE−TO−SOURCE VOLTAGE (VOLTS)

V

GS

TJ = −55°C

45

6789

10

0.030

ID = 30 A T

= 25°C

J

0.025

TJ = 25°C

0.020

VGS = 4.5 V

0.015

0.010

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

0

DS(on)

24

R

31011

612

5

VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)

Figure 3. On−Resistance vs. Gate−to−Source

Voltage

2.0

ID = 30 A V

= 10 V

GS

1.5

1.0

(NORMALIZED)

, DRAIN−TO−SOURCE RESISTANCE

0.5

DS(on)

−50 50250−25 75 125100

R

TJ, JUNCTION TEMPERATURE (°C)

Figure 5. On−Resistance Variation with

Temperature

789

150

0.010

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

DS(on)

R

100,000

10,000

1000

, LEAKAGE (nA)

DSS

I

100

175

VGS = 11.5 V

0

5

10

15

20

25

ID, DRAIN CURRENT (AMPS)

Figure 4. On−Resistance vs. Drain Current and

Gate Voltage

VGS = 0 V

TJ = 175°C

TJ = 125°C

10

82428

1612 324

20

VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

Figure 6. Drain−to−Source Leakage Current

vs. Drain Voltage

30

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4

NTD4815N

TYPICAL PERFORMANCE CURVES

1500 1400 1300 1200

C

1100

iss

1000

900 800 700 600

C

rss

500 400

C, CAPACITANCE (pF)

300 200 100

0

55

10 0 10 15 30

V

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (VOLTS)

VGS = 0 VVDS = 0 V

C

rss

20

V

GS

DS

Figure 7. Capacitance Variation

TJ = 25°C

C

iss

C

oss

25

6

V

5

4

DS

Q

T

Q

1

Q

2

3

2

1

, GATE−TO−SOURCE VOLTAGE (VOLTS)

GS

V

0

Q

, TOTAL GATE CHARGE (nC)

G

3241

ID = 30 A T

= 25°C

J

65

Figure 8. Gate−To−Source and Drain−To−Source

Voltage vs. Total Charge

V

16

DS

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

14

12

V

GS

10

8

6

4

2

0

7

1000

VDD = 15 V I

= 30 A

D

V

GS

100

t, TIME (ns)

10

t

d(off)

t

d(on)

t

r

t

f

1

1 10 100

RG, GATE RESISTANCE (OHMS)

Figure 9. Resistive Switching Time

Variation vs. Gate Resistance

1000

100

10

VGS = 20 V SINGLE PULSE

1

, DRAIN CURRENT (AMPS)

D

I

0.1

0.1 1 100

TC = 25°C

R

LIMIT

DS(on)

THERMAL LIMIT PACKAGE LIMIT

10

V

, DRAIN−TO−SOURCE VOLTAGE (VOLTS)

DS

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

= 11.5 V

10 ms

100 ms

1 ms

10 ms dc

30

VGS = 0 V

TJ = 25°C

25

20

15

10

, SOURCE CURRENT (AMPS)

5

S

I

0

0.4

0.5 1.0

, SOURCE−TO−DRAIN VOLTAGE (VOLTS)

V

SD

Figure 10. Diode Forward Voltage vs. Current

70

60

50

40

30

20

10

AVALANCHE ENERGY (mJ)

0

25

EAS, SINGLE PULSE DRAIN−TO−SOURCE

50 75 175

T

, JUNCTION TEMPERATURE (°C)

J

Figure 12. Maximum Avalanche Energy vs.

Starting Junction Temperature

0.6 0.7 1.1

0.8 0.9

ID = 11 A

100 125

150

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5

100

NTD4815N

TYPICAL PERFORMANCE CURVES

1.0

D = 0.5

0.1

0.05

0.1

0.02

(NORMALIZED)

0.01

r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE

0.2

0.01

SINGLE PULSE

10

1

, DRAIN CURRENT (AMPS)

D

I

0.1

125°C

100°C

25°C

10

PULSE WIDTH (ms)

Figure 13. Avalanche Characteristics

P

(pk)

t

1

t

2

DUTY CYCLE, D = t1/t

t, TIME (ms)

Figure 14. Thermal Response

10001 100

R

(t) = r(t) R

q

JC

q

JC

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

− TC = P

J(pk)

2

(pk)

1

R

(t)

q

JC

1.0E+00 1.0E+011.0E-011.0E-021.0E-031.0E-041.0E-05

ORDERING INFORMATION

Device Package Shipping

NTD4815NT4G DPAK

2500 / Tape & Reel

(Pb−Free)

NTD4815NT4H DPAK

2500 / Tape & Reel

(Pb−Free, Halide−Free)

NTD4815N−1G IPAK

75 Units / Rail

(Pb−Free)

NTD4815N−35G IPAK Trimmed Lead

75 Units / Rail

(3.5 " 0.15 mm)

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

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6

L3

L4

b2

e

E

b3

4

12 3

A

B

D

b

0.005 (0.13) C

DETAIL A

M

NTD4815N

PACKAGE DIMENSIONS

DPAK (SINGLE GUAGE)

CASE 369AA−01

ISSUE B

C

A

c2

H

c

GAUGE

L2

PLANE

L

L1

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.102

A1

H

0.118

3.00

Z

C

SEATING PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61 c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

5.80

0.228

1.60

0.063

SCALE 3:1

6.17

0.243

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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7

SEATING PLANE

NTD4815N

PACKAGE DIMENSIONS

3 IPAK, STRAIGHT LEAD

CASE 369AC−01

ISSUE O

NOTES:

1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

B

V

R

C

E

A

W

F

G

K

J

H

D

3 PL

0.13 (0.005) W

IPAK (STRAIGHT LEAD DPAK)

CASE 369D−01

ISSUE B

2.. CONTROLLING DIMENSION: INCH.

3. SEATING PLANE IS ON TOP OF DAMBAR POSITION.

4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE.

DIM MIN MAX MIN MAX

A 0.235 0.245 5.97 6.22 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.043 0.94 1.09 G 0.090 BSC 2.29 BSC H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.134 0.142 3.40 3.60 R 0.180 0.215 4.57 5.46 V 0.035 0.050 0.89 1.27

W 0.000 0.010 0.000 0.25

MILLIMETERSINCHES

B

V

S

R

4

A

123

−T−

SEATING PLANE

K

F

3 PL

D

G

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

0.13 (0.005) T

C

E

J

H

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

Z

DIM MIN MAX MIN MAX

A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58 F 0.037 0.045 0.94 1.14

0.090 BSC 2.29 BSC

G H 0.034 0.040 0.87 1.01 J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27 Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

PUBLICATION ORDERING INFORMATION

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NTD4815N/D