• Optimized Gate Charge to Minimize Switching Losses
• These are Pb--Free Devices
Applications
• CPU Power Delivery
• DC--DC Converters
MAXIMUM RATINGS (T
Drain--to--Source VoltageV
Gate--to--Source VoltageV
Continuous Drain
Current (R
Power Dissipation
(R
)(Note1)
θ
JA
Continuous Drain
Current (R
Power Dissipation
(R
)(Note2)
θ
JA
Continuous Drain
Current (R
(Note 1)
Power Dissipation
(R
)(Note1)
θ
JC
Pulsed Drain Current
Current Limited by PackageTA=25°C I
Operating Junction and Storage TemperatureTJ,T
Source Current (Body Diode)I
Drain to Source dV/dtdV/dt6.0V/ns
Single Pulse Drain --to-- Source Avalanche
Energy (V
L=1.0mH,I
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
to Minimize Conduction Losses
DS(on)
=25°C unless otherwise noted)
J
Parameter
)(Note1)
θ
JA
)(Note2)
θ
JA
)
θ
JC
=24V,VGS=10V,
DD
L(pk)
Steady
State
tp=10ms
=14A,RG=25Ω)
SymbolValueUnit
DSS
GS
TA=25°C
TA=85°C8.4
TA=25°CP
TA=25°C
TA=85°C6.7
TA=25°CP
TC=25°C
TC=85°C42
TC=25°CP
TA=25°CI
I
D
D
I
D
D
I
D
D
DM
DmaxPkg
stg
S
E
AS
T
L
30V
20V
10.8
2.0W
8.6
1.28W
54
50W
120A
45A
-- 5 5 t o
175
41A
98mJ
260°C
A
A
A
°C
http://onsemi.com
(BR)DSS
30 V
G
2
1
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
R
DS(on)
10 m Ω @10V
15.7 m Ω @4.5V
D
4
1
2
CASE 369AC
3IPAK
(Straight Lead)
MAX
S
4
3
IDMAXV
54 A
N--Channel
4
1
2
3
CASE 369D
IPAK
(Straight Lead
DPAK)
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Gate
1
Drain
YWW
2
Drain
4810NG
3
Source
1
Gate
4
Drain
YWW
4810NG
2
Drain
3
Source
Y= Year
WW= Work Week
4810N = Device Code
G= Pb-- Free Package
Gate
1
Drain
YWW
Drain
4
2
4810NG
3
Source
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our Pb--Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
7
Page 8
SEATING PLANE
NTD4810N
PACKAGE DIMENSIONS
3 IPAK, STRAIGHT LEAD
CASE 369AC--01
ISSUE O
NOTES:
1.. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
B
V
R
C
E
A
W
F
G
K
J
H
D
3PL
0.13 (0.005) W
2.. CONTROLLING DIMENSION: INCH.
3. SEATING PLANE IS ON TOP OF
DAMBAR POSITION.
4. DIMENSION A DOES NOT INCLUDE
DAMBAR POSITION OR MOLD GATE.
DIM MINMAXMIN MAX
A 0.235 0.2455.976.22
B 0.250 0.2656.356.73
C 0.086 0.0942.192.38
D 0.027 0.0350.690.88
E 0.018 0.0230.460.58
F 0.037 0.0430.941.09
G0.090 BSC2.29 BSC
H 0.034 0.0400.871.01
J 0.018 0.0230.460.58
K 0.134 0.1423.403.60
R 0.180 0.2154.575.46
V 0.035 0.0500.891.27
W 0.000 0.010 0.0000.25
MILLIMETERSINCHES
IPAK (STRAIGHT LEAD DPAK)
CASE 369D--01
ISSUE B
NOTES:
B
V
S
R
4
A
123
C
E
Z
-- T --
SEATING
PLANE
F
G
ON Semiconductor andare registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty,representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights o f others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers,employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
K
3PL
D
0.13 (0.005)T
J
H
M
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MINMAXMIN MAX
A 0.235 0.2455.976.35
B 0.250 0.2656.356.73
C 0.086 0.0942.192.38
D 0.027 0.0350.690.88
E 0.018 0.0230.460.58
F 0.037 0.0450.941.14
0.090 BSC2.29 BSC
G
H 0.034 0.0400.871.01
J 0.018 0.0230.460.58
K 0.350 0.3808.899.65
R 0.180 0.2154.455.45
S 0.025 0.0400.631.01
V 0.035 0.0500.891.27
Z 0.155------3.93------
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution C enter for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303--675--2175 or 800--344--3860 Toll Free USA/Canada
Fax: 303--675--2176 or 800--344--3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800-- 282--9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81--3--5773-- 3850
http://onsemi.com
8
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTD4810N/D
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