Datasheet ntd4302-d Datasheet

NTD4302

Power MOSFET

68 A, 30 V, N−Channel DPAK

Features

• Ultra Low R

• Higher Efficiency Extending Battery Life

• Logic Level Gate Drive

• Diode Exhibits High Speed, Soft Recovery

• Avalanche Energy Specified

• I

Specified at Elevated Temperature

DSS

• DPAK Mounting Information Provided

• These Devices are Pb−Free and are RoHS Compliant

Applications

• DC−DC Converters

• Low Voltage Motor Control

• Power Management in Portable and Battery Powered Products:

i.e., Computers, Printers, Cellular and Cordless Telephones, and PCMCIA Cards

MAXIMUM RATINGS (T

Drain−to−Source Voltage V

Gate−to−Source Voltage − Continuous V

Thermal Resistance − Junction−to−Case Total Power Dissipation @ TC = 25°C Continuous Drain Current @ TC = 25°C (Note 4) Continuous Drain Current @ TC = 100°C

Thermal Resistance − Junction−to−Ambient (Note 2) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 100°C Pulsed Drain Current (Note 3)

Thermal Resistance − Junction−to−Ambient (Note 1) Total Power Dissipation @ TA = 25°C Continuous Drain Current @ TA = 25°C Continuous Drain Current @ TA = 100°C Pulsed Drain Current (Note 3)

Operating and Storage Temperature Range TJ, T

Single Pulse Drain−to−Source Avalanche Energy − Starting TJ = 25°C (VDD = 30 Vdc, VGS = 10 Vdc, Peak IL = 17 Apk, L = 5.0 mH, RG = 25 W)

Maximum Lead Temperature for Soldering Purposes, 1/8 in from case for 10 seconds

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.

1. When surface mounted to an FR4 board using the minimum recommended pad size.

2. When surface mounted to an FR4 board using 0.5 sq. in. drain pad size.

3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.

4. Current Limited by Internal Lead Wires.

DS(on)

= 25°C unless otherwise noted)

C

Rating Symbol Value Unit

JC D

JA D

stg

L

30 Vdc

±20 Vdc

1.65 75 68 43

67

1.87

11.3

7.1 36

120

1.04

8.4

5.3 28

−55 to 150

722 mJ

260 °C

R

P

I

P

I

E

DSS

GS

q

I

D

I

D

q

I

D

I

D

DM

q

I

D

I

D

DM

AS

T

°C/W

W

A A

°C/W

W

A A A

°C/W

W

A A A

°C

http://onsemi.com

(BR)DSS

30 V

7.8 mW @ 10 V

G

TYP

DS(on)

N−Channel

D

S

ID MAXV

68 A

R

MARKING DIAGRAMS

& PIN ASSIGNMENTS

4

Drain

4

2

1

3

4

1

2

3

Y = Year WW = Work Week T4302 = Device Code G = Pb−Free Package

DPAK

CASE 369C

(Surface Mount)

STYLE 2

DPAK

CASE 369D

(Straight Lead)

STYLE 2

1

Gate

1

Gate

YWWT4302G

2

3

Drain

Source

4

Drain

YWWT4302G

3

2

Source

Drain

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet.

October, 2010 − Rev. 8

1 Publication Order Number:

NTD4302/D

NTD4302

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

J

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Drain−Source Breakdown Voltage

(VGS = 0 Vdc, ID = 250 mA)

Positive Temperature Coefficient

Zero Gate Voltage Drain Current

(VGS = 0 Vdc, VDS = 30 Vdc, TJ = 25°C) (VGS = 0 Vdc, VDS = 30 Vdc, TJ = 125°C)

Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) I

V

(BR)DSS

I

DSS

GSS

30

−

25

−

1.0 10

− − ±100 nAdc

ON CHARACTERISTICS

Gate Threshold Voltage

(VDS = VGS, ID = 250 mAdc)

Negative Temperature Coefficient

Static Drain−Source On−State Resistance

(VGS = 10 Vdc, ID = 20 Adc) (VGS = 10 Vdc, ID = 10 Adc) (VGS = 4.5 Vdc, ID = 5.0 Adc)

V

GS(th)

R

DS(on)

1.0

−

−3.8

0.0078

0.010

1.9

3.0

−

0.010

0.013

Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc) gFS − 20 − Mhos

DYNAMIC CHARACTERISTICS

Input Capacitance

Output Capacitance C

(VDS = 24 Vdc, VGS = 0 Vdc,

f = 1.0 MHz)

Reverse Transfer Capacitance C

C

iss

oss

rss

− 2050 2400 pF

− 640 800

− 225 310

SWITCHING CHARACTERISTICS (Note 6)

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

(VDD = 25 Vdc, ID = 1.0 Adc,

VGS = 10 Vdc,

R

= 6.0 W)

G

Fall Time t

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

(VDD = 25 Vdc, ID = 1.0 Adc,

VGS = 10 Vdc,

R

= 2.5 W)

G

Fall Time t

Turn−On Delay Time

Rise Time t

Turn−Off Delay Time t

(VDD = 24 Vdc, ID = 20 Adc,

VGS = 10 Vdc,

R

= 2.5 W)

G

Fall Time t

Gate Charge

(VDS = 24 Vdc, ID = 2.0 Adc,

VGS = 10 Vdc)

t

d(on)

r

d(off)

f

t

d(on)

r

d(off)

f

t

d(on)

r

d(off)

f

Q

T

Q

(Q1) − 5.5 −

gs

Q

(Q2) − 15 −

gd

− 11 20 ns

− 15 25

− 85 130

− 55 90

− 11 20 ns

− 13 20

− 55 90

− 40 75

− 15 − ns

− 25 −

− 40 −

− 58 −

− 55 80 nC

BODY−DRAIN DIODE RATINGS (Note 5)

Diode Forward On−Voltage

(IS = 2.3 Adc, VGS = 0 Vdc) (IS = 20 Adc, VGS = 0 Vdc) (IS = 2.3 Adc, VGS = 0 Vdc, TJ = 125°C)

Reverse Recovery Time

(IS = 2.3 Adc, VGS = 0 Vdc,

dIS/dt = 100 A/ms)

Reverse Recovery Stored Charge Q

V

SD

t

rr

t

a

t

b

rr

−

0.75

0.90

0.65

1.0

− 39 65

− 20 −

− 19 −

− 0.043 −

−

5. Indicates Pulse Test: Pulse Width = 300 msec max, Duty Cycle ≤ 2%.

6. Switching characteristics are independent of operating junction temperature.

Vdc

mV/°C

mAdc

Vdc

W

Vdc

ns

mC

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2

NTD4302

TYPICAL CHARACTERISTICS

50

40

VGS = 4 V

VGS = 4.4 V

VGS = 4.6 V

30

VGS = 5 V

VGS = 7 V

20

VGS = 10 V

10

, DRAIN CURRENT (AMPS)

D

I

0

0.5

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics

0.1

0.075

VGS = 2.8 V

21.51

TJ = 25°C

VGS = 3.8 V

VGS = 3.4 V

VGS = 3.2 V

VGS = 3.0 V

2.5 3

ID = 10 A TJ = 25°C

60

VDS > = 10 V

50

40

30

TJ = 25°C

TJ = 100°C

20

, DRAIN CURRENT (AMPS)

10

D

I

0

23 6

TJ = −55°C

45

VGS, GATE−TO−SOURCE VOLTAGE (V)

0.015 TJ = 25°C

VGS = 4.5 V

0.01

0.05

0.025

, DRAIN−TO−SOURCE RESISTANCE (W)

0

DS(on)

R

0

26810

4

VGS, GATE−TO−SOURCE VOLTAGE (V)

Figure 3. On−Resistance vs.

Gate−To−Source Voltage

1.6 ID = 18.5 A

V

= 10 V

GS

1.4

1.2

1

(NORMALIZED)

0.8

, DRAIN−TO−SOURCE RESISTANCE

0.6

DS(on)

−50 100750−25 125 150

R

TJ, JUNCTION TEMPERATURE (°C)

5025

VGS = 10 V

0.005

, DRAIN−TO−SOURCE RESISTANCE (W)

0

0.00E+00

DS(on)

R

1.00E+01

2.00E+01 3.00E+01 4.00E+01 5.00E+01 6.00E+01

ID, DRAIN CURRENT (AMPS)

Figure 4. On−Resistance vs. Drain Current

and Gate Voltage

10000

VGS = 0 V

TJ = 150°C

1000

100

TJ = 100°C

, LEAKAGE (nA)

10

DSS

I

1

525201510 30

VDS, DRAIN−TO−SOURCE VOLTAGE (V)

Figure 5. On−Resistance Variation with

Temperature

Figure 6. Drain−To−Source Leakage

Current vs. Voltage

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3

NTD4302

TYPICAL CHARACTERISTICS

6000

VGS = 0 VVDS = 0 V

TJ = 25°C

5000

C

iss

4000

3000

C

rss

C

iss

2000

C, CAPACITANCE (pF)

1000

0

10

V

GSVDS

C

rss

C

oss

20100

GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)

Figure 7. Capacitance Variation Figure 8. Gate−to−Source and

1000

VDD = 24 V ID = 18.5 A VGS = 10 V

100

t

t, TIME (ns)

10

1

t

d(off)

t

d(on)

f

t

r

10 100

RG, GATE RESISTANCE (W)

12.5

Q

10

V

D

T

7.5

V

GS

5

Q

1

Q

2

2.5

, GATE−TO−SOURCE− VOLTAGE (V)

GS

V

0

010 60

30

20 30 40 50

ID = 2 A TJ = 25°C

Qg, TOTAL GATE CHARGE (nC)

Drain−to−Source Voltage vs. Total Charge

25

VGS = 0 V TJ = 25°C

20

15

10

5

, SOURCE CURRENT (AMPS)

S

I

0

0.5 0.90.80.70.6 1

VSD, SOURCE−TO−DRAIN VOLTAGE (V)

30

25

20

15

10

0

, DRAIN−TO−SOURCE− VOLTAGE (V)

DS

V

Figure 9. Resistive Switching Time Variation

vs. Gate Resistance

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Figure 10. Diode Forward Voltage vs. Current

4

100

Rthj

(t)

EFFECTIVE

TRANSIENT

10

, DRAIN CURRENT (AMPS)

D

I

1

0.1

TYPICAL CHARACTERISTICS

VGS = 10 V SINGLE PULSE TC = 25°C

R

LIMIT

DS(on)

THERMAL LIMIT PACKAGE LIMIT

1

VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)

10

100 ms

1 ms

10 ms

dc

NTD4302

100

di/dt

I

S

t

rr

t

a

b

TIME

t

p

0.25 I

S

I

S

, a

Figure 11. Maximum Rated Forward Biased

Safe Operating Area

1000

DUTY CYCLE

100

D = 0.5

0.2

10

0.1

0.05

0.02

1

0.01

THERMAL RESISTANCE

0.1

SINGLE PULSE

0.01 1E-05 1E-03 1E-02 1E-01

1E-04 1E+02

Figure 13. Thermal Response − Various Duty Cycles

t, TIME (seconds)

Figure 12. Diode Reverse Recovery Waveform

MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT

R

(t) = r(t) R

q

P

(pk)

t

1

DUTY CYCLE, D = t1/t

t

2

JA

D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t T

J(pk)

2

1E+00 1E+01 1E+03

- TA = P

q

(pk)

JA

1

R

(t)

q

JA

ORDERING INFORMATION

Device Package Type Package Shipping

NTD4302G DPAK 369C

75 Units / Rail

(Pb−Free)

NTD4302−1G DPAK−3 369D

75 Units / Rail

(Pb−Free)

NTD4302T4G DPAK 369C

2500 Tape & Reel

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

†

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5

L3

L4

b2

e

E

b3

4

12 3

A

B

D

b

0.005 (0.13) C

DETAIL A

M

NTD4302

PACKAGE DIMENSIONS

DPAK (SINGLE GAUGE)

CASE 369C−01

ISSUE D

C

A

c2

H

c

GAUGE

L2

PLANE

L

L1

DETAIL A

ROTATED 90 CW5

SOLDERING FOOTPRINT*

6.20

0.244

2.58

0.101

A1

H

3.0

0.118

C

Z

SEATING PLANE

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: INCHES.

3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE.

5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY.

6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H.

DIM MIN MAX MIN MAX

A 0.086 0.094 2.18 2.38

A1 0.000 0.005 0.00 0.13

b 0.025 0.035 0.63 0.89 b2 0.030 0.045 0.76 1.14 b3 0.180 0.215 4.57 5.46

c 0.018 0.024 0.46 0.61 c2 0.018 0.024 0.46 0.61

D 0.235 0.245 5.97 6.22

E 0.250 0.265 6.35 6.73

e 0.090 BSC 2.29 BSC

H 0.370 0.410 9.40 10.41

L 0.055 0.070 1.40 1.78 L1 0.108 REF 2.74 REF L2 0.020 BSC 0.51 BSC L3 0.035 0.050 0.89 1.27 L4 −−− 0.040 −−− 1.01

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

5.80

0.228

1.6

0.063

SCALE 3:1

6.172

0.243

ǒ

inches

mm

Ǔ

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.

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6

NTD4302

PACKAGE DIMENSIONS

DPAK

CASE 369D−01

ISSUE B

V

S

−T−

SEATING PLANE

F

B

R

4

123

G

A

K

D 3 PL

0.13 (0.005) T

C

E

J

H

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCH.

DIM MIN MAX MIN MAX

Z

A 0.235 0.245 5.97 6.35 B 0.250 0.265 6.35 6.73 C 0.086 0.094 2.19 2.38 D 0.027 0.035 0.69 0.88 E 0.018 0.023 0.46 0.58

F 0.037 0.045 0.94 1.14

0.090 BSC 2.29 BSC

G H 0.034 0.040 0.87 1.01

J 0.018 0.023 0.46 0.58 K 0.350 0.380 8.89 9.65 R 0.180 0.215 4.45 5.45 S 0.025 0.040 0.63 1.01 V 0.035 0.050 0.89 1.27

Z 0.155 −−− 3.93 −−−

STYLE 2:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

MILLIMETERSINCHES

ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice

to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.

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NTD4302/D

7