Designed for low voltage, high speed switching applications in
power supplies, converters and power motor controls and bridge
circuits.
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Features
• Pb−Free Packages are Available
Typical Applications
• Planar HD3e Process for Fast Switching Performance
• Low R
• Low C
to Minimize Conduction Loss
DS(on)
to Minimize Driver Loss
iss
• Low Gate Charge
• Optimized for High Side Switching Requirements in
High−Efficiency DC−DC Converters
MAXIMUM RATINGS (T
ParameterSymbolValueUnit
Drain−to−Source VoltageV
Gate−to−Source Voltage − ContinuousV
Drain Current
− Continuous @ TA = 25°C, Limited by Chip
− Continuous @ TA = 25°C, Limited by Package
− Single Pulse (tp = 10 ms)
Total Power Dissipation @ TA = 25°CP
Operating and Storage Temperature RangeTJ, T
Thermal Resistance − Junction−to−Case
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from case for 10 seconds
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
= 25°C unless otherwise specified)
J
DSS
GS
I
D
I
D
I
DM
D
stg
R
q
JC
T
L
25Vdc
±20Vdc
23
6.0
60
37.5W
−55 to
150
3.3°C/W
260°C
A
°C
23 AMPERES, 25 VOLTS
G
= 32 mW (Typ)
N−CHANNEL
D
S
MARKING DIAGRAM
& PIN ASSIGNMENTS
4
T23
N03G
AYWW
1
Gate
2
1
D2PAK
CASE 418B
STYLE 2
R
DS(on)
3
T23N03 = Specific Device Code
A= Assembly Location
Y= Year
WW= Work Week
G= Pb−Free Package
2. Switching characteristics are independent of operating junction temperatures.
V(br)
I
I
V
GS(th)
R
DS(on)
g
C
t
d(on)
d(off)
V
DSS
GSS
FS
iss
oss
rss
r
f
Q
Q
Q
SD
t
rr
t
a
t
b
RR
DSS
T
1
2
25
−
28
−
−
mV/°C
−
mAdc
Vdc
−
−
−
−
1.0
10
−−±100nAdc
Vdc
1.0
−
1.8
−
2.0
−
mV/°C
mW
−
−
50.3
32.3
60
45
Mhos
−14−
−225−
−108−
−48−
−2.0−
−14.9−
−9.9−
−2.0−
−3.76−
−1.7−
−1.6−
Vdc
−
−
0.87
0.74
1.2
−
−8.7−
−5.2−
−3.5−
−0.003−
pF
ns
nC
ns
mC
ORDERING INFORMATION
DevicePackageShipping
NTB23N03R
NTB23N03RG
D2PAK
D2PAK
50 Units / Rail
50 Units / Rail
(Pb−Free)
NTB23N03RT4
NTB23N03RT4G
D2PAK
D2PAK
800 Units / Tape & Reel
800 Units / Tape & Reel
(Pb−Free)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
†
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2
Page 3
NTB23N03R
20
I
, DRAIN CURRENT (AMPS)
R
, DRAIN−TO−SOURCE RESISTANCE (
)
R
, DRAIN−TO−SOURCE RESISTANCE
20
5
10 V
16
12
8
4
D
0
0
W
0.20
0.16
0.12
0.08
0.04
DS(on)
0
0
Figure 3. On−Resistance versus Drain Current
4.5 V
8 V
6 V
5 V
42
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
6
4 V
3.5 V
3 V
VGS = 2.5 V
8
10
, DRAIN CURRENT (AMPS)
D
I
VDS ≥ 10 V
16
12
8
4
0
034215
VGS, GATE−TO−SOURCE VOLTAGE (VOLTS)
TJ = 25°C
TJ = 125°C
TJ = −55°C
Figure 1. On−Region CharacteristicsFigure 2. Transfer Characteristics
0.20
VGS = 10 V
TJ = 125°C
TJ = 25°C
TJ = −55°C
84
ID, DRAIN CURRENT (AMPS)
, DRAIN−TO−SOURCE RESISTANCE (W)
1612
20
DS(on)
R
VGS = 4.5 V
0.16
0.12
0.08
0.04
0
0841612
ID, DRAIN CURRENT (AMPS)
TJ = 125°C
TJ = 25°C
TJ = −55°C
Figure 4. On−Resistance versus Drain Current
and Temperature
and Temperature
6
20
1.8
ID = 6 A
V
1.6
1.4
1.2
1
(NORMALIZED)
0.8
0.6
DS(on)
−5050250−2575125100
= 10 V
GS
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On−Resistance Variation with
Temperature
10,000
1000
, LEAKAGE (nA)
100
DSS
I
150
10
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3
VGS = 0 V
TJ = 150°C
TJ = 125°C
0202
VDS, DRAIN−TO−SOURCE VOLTAGE (VOLTS)
15105
Figure 6. Drain−to−Source Leakage Current
versus Voltage
Page 4
NTB23N03R
C, CAPACITANCE (pF)
t, TIME (ns)
5
400
VGS = 0 VVDS = 0 V
C
iss
TJ = 25°C
300
C
rss
200
100
0
1010
V
5
GS
V
DS
155020
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE
(VOLTS)
Figure 7. Capacitance VariationFigure 8. Gate−to−Source and
100
VDS = 10 V
ID = 6 A
VGS = 10 V
8
V
6
Q
C
iss
4
C
oss
Q
1
T
Q
2
GS
2
C
rss
, GATE−TO−SOURCE VOLTAGE (VOLTS)
0
GS
V
03.54.
2.51.50.5
ID = 6 A
TJ = 25°C
3.04.02.01.0
Qg, TOTAL GATE CHARGE (nC)
Drain−to−Source Voltage versus Total Charge
10
VGS = 0 V
8
6
10
t
d(off)
t
r
4
TJ = 150°C
t
d(on)
t
f
1
11010000.40.20.81.0
RG, GATE RESISTANCE (W)
Figure 9. Resistive Switching Time Variation
versus Gate Resistance
2
, SOURCE CURRENT (AMPS)
S
I
0
VSD, SOURCE−TO−DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage versus
Current
TJ = 25°C
0.6
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4
Page 5
NTB23N03R
PACKAGE DIMENSIONS
D2PAK
CASE 418AA−01
ISSUE O
−T−
SEATING
PLANE
VARIABLE
CONFIGURATION
ZONE
M
−B−
G
C
E
V
4
W
A
231
S
K
W
J
D
3 PL
M
0.13 (0.005)T
M
B
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM MINMAXMINMAX
A 0.340 0.3808.649.65
B 0.380 0.4059.65 10.29
C 0.160 0.1904.064.83
D 0.020 0.0360.510.92
E 0.045 0.0551.141.40
F 0.310−−−7.87−−−
G0.100 BSC2.54 BSC
J 0.018 0.0250.460.64
K 0.090 0.1102.292.79
M 0.280−−−7.11−−−
S 0.575 0.625 14.60 15.88
V 0.045 0.0551.141.40
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
U
M
M
F
VIEW W−WVIEW W−WVIEW W−W
123
F
F
SOLDERING FOOTPRINT*
8.38
0.33
10.66
0.42
17.02
0.67
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
1.016
3.05
0.12
SCALE 3:1
0.04
ǒ
inches
5.08
0.20
mm
Ǔ
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5
Page 6
NTB23N03R
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 61312, Phoenix, Arizona 85082−1312 USA
Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
Fax: 480−829−7709 or 800−344−3867Toll Free USA/Canada
Email: orderlit@onsemi.com
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NTB23N03R/D
6
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