Datasheet nss12600cf8 Datasheet

Page 1
NSS12600CF8T1G 12 V, 6.0 A, Low V
CE(sat)
PNP Transistor
ON Semiconductor’s e2PowerEdge family of low V
transistors are miniature surface mount devices featuring ultra low saturation voltage (V
) and high current gain capability. These
CE(sat)
are designed for use in low voltage, high speed switching applications where affordable efficient energy control is important.
Typical applications are DC−DC converters and power management in portable and battery powered products such as cellular and cordless phones, PDAs, computers, printers, digital cameras and MP3 players. Other applications are low voltage motor controls in mass storage products such as disc drives and tape drives. In the automotive industry they can be used in air bag deployment and in the instrument cluster. The high current gain allows e
2
PowerEdge devices to be driven directly from PMU’s control outputs, and the Linear Gain (Beta) makes them ideal components in analog amplifiers.
• This is a Pb−Free Device
MAXIMUM RATINGS (T
Rating Symbol Max Unit
Collector-Emitter Voltage V
Collector-Base Voltage V
Emitter-Base Voltage V
Collector Current − Continuous I
Collector Current − Peak I
Electrostatic Discharge ESD HBM Class 3B
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Total Device Dissipation, TA = 25°C Derate above 25°C
Thermal Resistance, Junction−to−Ambient
Total Device Dissipation, TA = 25°C Derate above 25°C
Thermal Resistance, Junction−to−Ambient
Thermal Resistance, Junction−to−Lead #1
Total Device Dissipation (Single Pulse < 10 sec)
Junction and Storage Temperature Range
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
1. FR− 4 @ 100 mm
2. FR− 4 @ 500 mm
3. Thermal response.
= 25°C)
A
2
, 1 oz copper traces.
2
, 1 oz copper traces.
CEO
CBO
EBO
C
CM
PD (Note 1) 830
R
(Note 1)
q
JA
PD (Note 2) 1.4
R
(Note 2)
q
JA
R
(Note 2)
q
JL
P
Dsingle
(Notes 2 & 3)
TJ, T
stg
−55 to +150
−12 Vdc
−12 Vdc
−7.0 Vdc
−5.0 Adc
−6.0 A
MM Class C
6.7
150 °C/W
11.1WmW/°C
90 °C/W
15 °C/W
2.75 W
CE(sat)
mW
mW/°C
°C
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−12 VOLTS, 6.0 AMPS
PNP LOW V
CE(sat)
EQUIVALENT R
4
BASE
MARKING DIAGRAM
VE = Specific Device Code M = Date Code G = Pb−Free Package
CONNECTIONS
81
C
7
C
6
C
5
E
ORDERING INFORMATION
Device Package Shipping
NSS12600CF8T1G
†For information on tape and reel specifications,
including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
TRANSISTOR
DS(on)
COLLECTOR 1, 2, 3, 6, 7, 8
EMITTER
VE M
G
PIN
ChipFET
(Pb−Free)
45 mW
5
ChipFET]
CASE 1206A
STYLE 4
C
2
C
3
C
4
B
3000/
Tape & Reel
†
© Semiconductor Components Industries, LLC, 2007
March, 2007 − Rev. 1
1 Publication Order Number:
NSS12600CF8/D
Page 2
NSS12600CF8T1G
ELECTRICAL CHARACTERISTICS (T
Characteristic
= 25°C unless otherwise noted)
A
Symbol Min Typical Max Unit
OFF CHARACTERISTICS
Collector−Emitter Breakdown Voltage
= −10 mAdc, IB = 0)
(I
C
Collector−Base Breakdown Voltage (I
= −0.1 mAdc, IE = 0)
C
Emitter−Base Breakdown Voltage (I
= −0.1 mAdc, IC = 0)
E
Collector Cutoff Current (V
= −12 Vdc, IE = 0)
CB
Emitter Cutoff Current (V
= −7.0 Vdc)
EB
V
(BR)CEO
V
(BR)CBO
V
(BR)EBO
I
CBO
I
EBO
−12 − −
−12 − −
−7.0 − −
− − −0.1
− − −0.1
ON CHARACTERISTICS
DC Current Gain (Note 4) (IC = −10 mA, VCE = −2.0 V) (IC = −500 mA, VCE = −2.0 V) (IC = −1.0 A, VCE = −2.0 V)
= −2.0 A, VCE = −2.0 V)
(I
C
(I
= −3.0 A, VCE = −2.0 V)
C
Collector−Emitter Saturation Voltage (Note 4) (I
= −0.1 A, IB = −0.010 A) (Note 5)
C
= −1.0 A, IB = −0.100 A)
(I
C
(IC = −1.0 A, IB = −0.010 A) (IC = −2.0 A, IB = −0.020 A) (I
= −3.0 A, IB = −0.030 A)
C
(I
= −4.0 A, IB = −0.400 A)
C
Base −Emitter Saturation Voltage (Note 4) (I
= −1.0 A, IB = −0.01 A)
C
Base −Emitter Turn−on Voltage (Note 4) (I
= −2.0 A, VCE = −3.0 V)
C
Cutoff Frequency (I
= −100 mA, VCE = −5.0 V, f = 100 MHz)
C
h
V
CE(sat)
V
BE(sat)
V
BE(on)
FE
250 250 250 200 180
−
−
−
−
−
−
−
−
300
−
−
−0.005
−0.045
−0.070
−0.095
−0.120
−0.140
−
−
−
−
−
−0.010
−0.060
−0.080
−0.120
−0.160
−0.170
− − −0.90
− − −0.90
f
T
100 − −
Input Capacitance (VEB = −0.5 V, f = 1.0 MHz) Cibo − − 800 pF
Output Capacitance (VCB = −3.0 V, f = 1.0 MHz) Cobo − − 300 pF
SWITCHING CHARACTERISTICS
Delay (V
= −10 V, IC = 750 mA, IB1 = 15 mA) t
CC
Rise (VCC = −10 V, IC = 750 mA, IB1 = 15 mA) t
Storage (VCC = −10 V, IC = 750 mA, IB1 = 15 mA) t
Fall (VCC = −10 V, IC = 750 mA, IB1 = 15 mA) t
d
r
s
f
− − 130 ns
− − 220 ns
− − 350 ns
− − 240 ns
4. Pulsed Condition: Pulse Width = 300 msec, Duty Cycle ≤ 2%.
5. Guaranteed by design but not tested.
Vdc
Vdc
Vdc
mAdc
mAdc
V
V
V
MHz
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Page 3
NSS12600CF8T1G
0.25
IC/IB = 10
0.20
0.15
0.10
, COLLECTOR EMITTER
0.05
SATURATION VOLTAGE (V)
CE(sat)
V
0
0.001
0.01 0.1 1.0 10
I
, COLLECTOR CURRENT (A)
C
V
CE(sat)
= 150°C
25°C
Figure 1. Collector Emitter Saturation Voltage
vs. Collector Current
800
700
600
500
400
300
, DC CURRENT GAIN
FE
h
200
100
0.001 0.01 0.1 1.0 10
150°C (5 V)
150°C (2 V)
25°C (5 V)
25°C (2 V)
−55°C (5 V)
−55°C (2 V)
IC, COLLECTOR CURRENT (A) IC, COLLECTOR CURRENT (A)
−55°C
0.40 IC/IB = 100
0.35
0.30
0.25
0.20
0.15
, COLLECTOR EMITTER
0.10
SATURATION VOLTAGE (V)
CE(sat)
0.05
V
0
0.001
Figure 2. Collector Emitter Saturation Voltage
1.2 IC/IB = 10
1.1
1.0
0.9
0.8
0.7
, BASE EMITTER
0.6
BE(sat)
0.5
V
SATURATION VOLTAGE (V)
0.4
0.3
V
= −55°C
CE(sat)
150°C
0.01 0.1 1.0 10
I
, COLLECTOR CURRENT (A)
C
25°C
vs. Collector Current
−55°C
25°C
150°C
0.010.001
0.1 10
1.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
, BASE EMITTER TURN−ON VOLTAGE (V)
0.1
BE(on)
V
Figure 3. DC Current Gain vs.
Collector Current
VCE = −1.0 V
0.01
IC, COLLECTOR CURRENT (A)
0.10.001
−55°C
25°C
150°C
1.0 0.1
Figure 5. Base Emitter Turn−On Voltage vs.
Collector Current
1.0
0.8
0.6
0.4
0.2
, COLLECTOR−EMITTER VOLTAGE (V)
0
CE
10
V
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3
Figure 4. Base Emitter Saturation Voltage vs.
Collector Current
10 mA
0.01 10
100 mA
IB, BASE CURRENT (mA)
IC = 500 mA
300 mA
1.0 100
Figure 6. Saturation Region
Page 4
NSS12600CF8T1G
900 850
800 750
700 650 600
550
500
450
, INPUT CAPACITANCE (pF)
400
ibo
C
350 300
0
C
3.01.0 2.0
VEB, EMITTER BASE VOLTAGE (V)
Figure 7. Input Capacitance
10
1.0
(A)
C
I
(pF)
ibo
5.04.0 6.0
450
400
350
300
250
, OUTPUT CAPACITANCE (pF)
200
obo
C
150
0
2.0
VCB, COLLECTOR BASE VOLTAGE (V)
4.0 6.0 10
8.0
Figure 8. Output Capacitance
1.0 mS
10 mS
100 mS
1.0 S
C
(pF)
obo
12
0.1
0.01
0.01
Thermal Limit
0.1
1.0 10 100
VCE (Vdc)
Figure 9. Safe Operating Area
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e1
NSS12600CF8T1G
PACKAGE DIMENSIONS
ChipFET
CASE 1206A−03
ISSUE G
D
8765
H
E
1234
b
e
q
L
E
c
A
0.05 (0.002)
SOLDERING FOOTPRINT*
2.032
0.08
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
8765
1234
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD SURFACE.
DIMAMIN NOM MAX MIN
b 0.25 0.30 0.35 0.010 c 0.10 0.15 0.20 0.004 D 2.95 3.05 3.10 0.116 E 1.55 1.65 1.70 0.061 e 0.65 BSC
e1 0.55 BSC
L 0.28 0.35 0.42 0.011
H
E
q
MILLIMETERS
1.00 1.05 1.10 0.039
1.80 1.90 2.00 0.071 0.075 0.079
5°NOM
2.032
0.08
INCHES
NOM MAX
0.041 0.043
0.012 0.014
0.006 0.008
0.120 0.122
0.065 0.067
0.025 BSC
0.022 BSC
0.014 0.017
5°NOM
0.457
0.018
0.635
0.025
1.727
0.068
0.66
0.026
0.711
0.028
SCALE 20:1
ǒ
inches
mm
0.457
0.018
0.711
0.028
Ǔ
0.66
SCALE 20:1
0.026
ǒ
inches
mm
0.178
0.007
Ǔ
Style 4Basic
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
ChipFET is a trademark of Vishay Siliconix.
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
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NSS12600CF8/D
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